Switched-opamp: an approach to realize full CMOS switched-capacitorcircuits at very low power supply voltages

The implementation of analog CMOS circuits that operate in the very low power supply voltage range (1 V to 2 V) becomes more important nowadays. Most accurate filter circuits are designed in the switched-capacitor technique. The existing design techniques require, however, the on-chip generation of a higher voltage by means of a voltage multiplier. In this paper, a novel technique, derived from the standard switched-capacitor technique, is presented. It is called switched-opamp because it is based on the replacement of the critical switches with opamps which are turned on and off. This technique results in a true, very low voltage operation without the need for voltage multipliers. As an example, a second order lowpass switched-capacitor filter is implemented in the switched-opamp technique. This filter operates with only a 1.5 V power supply. It is realized in a 2.4-μm CMOS process with V_T=±0.9 V. It has a measured total harmonic distortion of -60 dB for a signal swing of 600 mV_ptp and a powerdrain of only 110 μW     

Pseudopower in switched-capacitor filters

The concepts of pseudopower, pseudopassivity, and pseudolosslessness are introduced in connection with switched-capacitor filters employing voltage invertor switches. With such concepts the verification of the low sensitivity and stability properties is straightforward.     

一种基于开关电容的带隙基准电路

设计了一种基于开关电容的新型带隙基准源。该基准源利用开关电容放大器，减小运算放大器输入失调电压的影响，同时，采用基极电流消除技术和虚拟开关管，减小PTAT电压的误差，以及开关管断开时带来的寄生效应。仿真结果表明，该基准源电路具有良好的温度系数和线性调整率，属于离散时间带隙基准。     

线性控制电荷泵

在传统的电荷泵设计申，往往采用“突发”工作模式以获得最小的静态电流，提高芯片效率。但是，这种一开一关的突发将导致很大的输入电流噪声和输出电压纹波．文章提出了一种“线性”控制模式的电荷泵设计，可将此输入输出噪声降至最小。     

Simulation of mixed switched-capacitor/digital networks withsignal-driven switches

The simulation of mixed switched-capacitor/digital (SC/D) networks containing capacitors, independent and linear-dependent voltage sources, switches controlled either by periodic or nonperiodic Boolean signals, latched comparators, and logic gates is considered. A unified linear switched-capacitor network (SCN) and mixed SC/D network simulator, SWITCAP2, and its applications to several widely used and novel nonlinear SCNs are discussed. The switches may be controlled by periodic waveforms and by nonperiodic waveforms from the outputs of comparators and logic gates. The signal-dependent modification of network topology through the comparators, logic gates, and signal-driven switches makes the modeling of various nonlinear switched-capacitor circuits possible. Simulation results for a pulse-code modulation (PCM) voice encoder, a sigma-delta modulator, a neural network, and a phase-locked loop (PLL) are presented to demonstrate the flexibility of the approach     

Buffer-based switched-capacitor gain stages

New unity-gain buffer-based switched-capacitor S/H circuit and gain stages are described which have low sensitivity to buffer gain and offset voltage, and are only moderately sensitive to stray capacitances. The circuits are simple, require fewer switches and less capacitance and offer higher speed, lower noise and lower DC power consumption than op-amp based gain stages     

Ka波段分布式MEMS移相器低驱动电平容性开关的机电设计

为降低Ka波段分布式MEMS移相器容性开关的驱动电压,提出不同形状新型低弹性系数铰链梁结构MEMS电容开关的机电设计概念.采用Intelli SuiteTM和ADS软件分析了三种梁结构MEMS电容开关的位移分布、驱动电压、机械振动模式和射频性能等参数,结果表明:所设计新型beam2结构MEMS电容开关具有优越的机电特性和射频特性,即开关的驱动电压为3V,机械振动模式固有频率都大于31kHz,在35GHz处插入损耗和回波损耗分别为0.082dB和18.6dB,而相移量可达到105.9o.     

Step-up DC power supply based on a switched-capacitor circuit

A new step-up DC-to-DC power converter with high power density is presented. It contains no inductors or transformers. The controlled energy transfer from an unregulated voltage source to a regulated output voltage is realized through a switched-capacitor circuit. The operation of the switches in the power stage is dictated by a PWM-type feedback circuit. The new regulator is simulated by using an averaged state-space approach. The transient and steady-state waveforms, as well as the AC small-signal input-to-output and control-to-output transfer functions are obtained by both simulation and experiments. The power supply, implemented for a nominal power of 15 W, and input-to-output voltage ratio of 5/12, features high efficiency for this class of powers, small output voltage ripple, continuous input current, low weight and small size     

X波段MEMS分布式移相器开关机电性能研究

介绍一种应用于X波段MEMS分布式移相器的新型单元开关。MEMS分布式移相器具有高品质因数、低插损、低功耗和高隔离度的优点,但由于传统MEMS开关采用固支梁结构,弹性系数过大,下拉电压过高,无法与传统电子系统相兼容,大大限制了其应用和发展。基于此设计一种新型单元开关,采用弹性弯曲结构取代传统固支梁结构,并在MEMS金属梁上刻蚀释放孔,极大降低了单元开关的弹性系数,从而实现了超低下拉电压6V。通过理论分析,给出MEMS开关弹性系数、下拉电压的解析公式,并使用ANSYS进行了仿真分析。     

Strays-insensitive switched-capacitor network realisation for nth-order voltage transfer functions

A general synthesis method is given for the realisation of nth-order voltage transfer functions in the z-domain by active SC (switched-capacitor) networks using only biphased switches, capacitors and ideal operational amplifiers. The method presented is based on signal-flow graphs and the resulting networks are completely insensitive to stray capacitances.     

VIS-SC filters for higher clock frequency applications

A method is described by which switched-capacitor filters employing voltage invertor switches can be designed using a two-phase clock. The resulting circuits are completely insensitive to bottom plate parasitics and the operating rate of the amplifiers is only twice the operating rate of the filter so that this method is suitable for higher clock frequency applications. Furthermore, the SC filters have low attenuation sensitivity to element variations, due to the one-to-one correspondence between the capacitors and the elements of the reference filter and owing to the fact that no matching is required between the network capacitors and the auxiliary hold capacitors.     

Switched-capacitor gain stage with reduced sensitivity to finite amplifier gain and offset voltage

A new switched-capacitor gain stage is presented that exhibits reduced sensitivity to operational amplifier gain and offset voltage. In addition, the design employs fewer switches and capacitors than previous techniques, and is less sensitive to parasitic capacitance effects. It should find wide application in A/D, D/A and other analogue arithmetic building blocks.     

Switched-capacitor DC/DC converters with resonant gate drive

In this paper, we examine how switched-capacitor (SC) converters can be used in low-voltage low-power DC/DC applications with power management. Analysis of losses is presented to facilitate SC converter design and optimization. A resonant gate drive is proposed to reduce switching losses and simplify control of switches in SC converters. A closed-loop controller is designed to enable and disable oscillations of the resonant gate drive so that the output DC voltage is well regulated down to zero load and so that high efficiency is maintained for a very wide range of loads. Results are experimentally verified on two low-power (0.2 and 5 W) five-one step-down converters with regulated 3 Vdc output and efficiency greater than 80% in a 100-1 load range     

任意电压源输入下开关电容网络分析的回路电荷法

本文提出了一种适用于开关电容网络精确分析的回路电荷法。该网络包含电容、独立电压源,开关和零极子(nullors)。该方法适用于任意K相开关状态,能处理任意的连续时间和离散时间输入。用回路电荷法,还导出了用输入电压表示电容电压的精确表达式。     

High voltage gain CMOS OTA for micropower SC filters

The letter describes a single stage operational transconductance amplifier (OTA) with cascoded output transistors, designed for micropower switched-capacitor filters. The device features high voltage gain (>90 dB) under capacitive load, large output swing, very low power consumption (5 ?W at 3 V supply voltage for 100 kHz bandwidth with 10 pF load) and reduced circuit area (<0.1 mm2).     

新型集成开关电容DC─DC变换器及其计算机仿真

本文介绍了一种新型ＤＣ─ＤＣ变换器，它具有损耗低、不采用功率电感性元件、体积小、重量轻的优点，非常适合于制作为混合功率集成电路。与一般开关电容变换器相比，它还具有直接反馈控制、电压和电流调整范围宽、对器件参数要求不高、集成后成品率高的优点。文中给出了利用ＳＰＩＣＥ仿真的电路模型和仿真结果。     

A differential switched-capacitor amplifier

A monolithic realization of a switched-capacitor amplifier is reported. It has op-amp offset voltage cancellation without requiring the output to slew to ground each time the amplifier is reset. The amplifier is very insensitive to low op-amp gain. It also has clock-feedthrough cancellation. Finally, it can be used as a differential amplifier with both inputs being sampled at the same instance.     

A 1-V 140-/spl mu/W 88-dB audio sigma-delta modulator in 90-nm CMOS

A single-loop third-order switched-capacitor /spl Sigma/-/spl Delta/ modulator in 90-nm standard digital CMOS technology is presented. The design is intended to minimize the power consumption in a low-voltage environment. A load-compensated OTA with rail-to-rail output swing and gain enhancement is chosen in this design, which provides higher power efficiency than the two-stage OTA. To lower the power consumption further, class-AB operation is also adapted in the OTA design. Due to the relatively low threshold voltage of the advanced technology, no clock bootstrapping circuits are needed to drive the switches and the power consumption of the digital circuits is reduced. All the capacitors are implemented using multilayer metal-wall structure, which can provide high-density capacitance. The modulator achieves 88-dB dynamic range in 20-kHz signal bandwidth with an oversampling ratio of 100. The power consumption is 140 /spl mu/W under 1-V supply voltage and the chip core size is 0.18 mm/sup 2/.     

Sequential voltage-inversion principle for switched-capacitor filters

For a special class of switched-capacitor filters, voltage-inverter switches are needed. It is shown how several voltage-inverter switches can be realised using only one operational amplifier.     

1.2-V CMOS op-amp with a dynamically biased output stage

A very low-voltage operational amplifier in a standard CMOS process with a 0.75 V threshold voltage is presented. It uses a novel dynamically biased output stage based on the switched-capacitor approach. Thanks to this, drive performance is greatly improved and accurate current control is also achieved. The amplifier is capable of working with a power supply as low as 1.2 V while providing a -74 dB total harmonic distortion with a 700 mV peak-to-peak output voltage into a 500 Ω and 20 pF output load. The open-loop gain and the gain-bandwidth product are higher than 90 dB and 2.2 MHz, respectively