An Experimental Study on High-Frequency Substrate Noise Isolation in BiCMOS Technology

In this letter, four substrate noise isolation structures in standard 0.18-mum SiGe bipolar CMOS technology were investigated using S-parameter measurements. The experimental and simulated results on different isolation structures, such as triple-well p-n junction isolated walls, deep trench isolation, and double P⁺ guard-ring structures, are presented. Each element in the equivalent circuits has been calculated or fitted based on the parasitic resistance, capacitance, and physical dimensions using the device simulator MEDICI and the measured results of the test patterns. The proposed structure B significantly reduced substrate noise below -70 dB up to 20 GHz. The proposed structure C with an extra triple-well junction achieved the best isolation at the lower frequency range, in which |S₂₁| was less than -71 dB from 50 MHz to 10.05 GHz, and -56 dB from 10.05 to 20.05 GHz. The measured results showed an excellent agreement with the calculations. Structure B is good enough and is recommended for a general-purpose RF circuit design, whereas structure C can be used in a highly sensitive RF circuit block below 10 GHz.     

Low-noise, low-power monolithically integrated active 20 GHz mixerin SiGe technology

A monolithically integrated active broadband mixer for wireless communications in a 0.5 μm 80 GHz f_T SiGe bipolar technology is presented. The circuit is optimised for low-noise and low-power consumption and operates up to 20 GHz with a conversion gain >10 dB consuming only 9 mW from a single 4.5 V supply     

一种低噪声SiGe微波单片放大电路

介绍了一种利用SiGe技术制作的低噪声SiGe微波单片放大电路(MMIC)。该电路以达林顿结构的形式级联,由两个异质结双极型晶体管(HBT)和4个电阻组成;HBT采用准自对准结构,其SiGe基区为非选择性外延。在1 GHz频率下,电路噪声为1.59 dB,功率增益为14.3 dB,输入驻波比为1.6,输出驻波比为2.0。     

Low-power low-noise active mixers for 5.7 and 11.2 GHz usingcommercially available SiGe HBT MMIC technology

The authors demonstrate the application of a commercially available SiGe heterojunction bipolar transistor monolithic microwave integrated circuit technology to active mixers in future communication systems at 5.7 GHz and above. This technology can be used to realise circuits with less than 50 mW power consumption, conversion gains above 15 dB and small double sideband noise figures of 3.6 and 9.4 dB for 5.7 and 11.2 GHz Gilbert cell mixer circuits, respectively     

CMOS high-speed dual-modulus frequency divider for RF frequencysynthesis

The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presented. Compared to other designs fabricated with comparable CMOS technologies, this architecture has a better potential for high-speed operation. The circuit consumes less power than previously reported CMOS circuits, and it approaches the performance previously achieved only by bipolar or GaAs devices. The proposed circuit uses level-triggered differential logic to create an input-frequency-entrained oscillator performing a dual-modulus frequency division. In addition to high-speed and low-power consumption, the divider has a low-input signal level requirement which facilitates its incorporation into RF applications. Fabricated with a 1.2-μm 5-V CMOS technology, the divider operates up to 1.5 GHz, consuming 13.15 mW, and requiring less than 100 mV rms input amplitude     

SiGe HBT and BiCMOS technologies for optical transmission and wireless communication systems

Technologies for a self-aligned SiGe heterojunction bipolar transistor (HBT) and SiGe HBTs with CMOS transistors (SiGe BiCMOS) have been developed for use in optical transmission and wireless communication systems. n-Si cap/SiGe-base multilayer fabricated by selective epitaxial growth (SEG) was used to obtain both high-speed and low-power performance for the SiGe HBTs. The process except the SEG is almost completely compatible with well-established Si bipolar-CMOS technology, and the SiGe HBT and BiCMOS were fabricated on a 200-mm wafer line. High-quality passive elements, i.e., high-precision poly-Si resistors, a high-Q varactor, an MIM capacitor, and high-Q spiral inductors have also been developed to meet the demand for integration of the sophisticated functions. A cutoff frequency of 130 GHz, a maximum oscillation frequency of 180 GHz, and an ECL gate-delay time of 5.3 ps have been demonstrated for the SiGe HBTs. An IC chipset for 40-Gb/s optical-fiber links, a single-chip 10-Gb/s transceiver large-scale IC (LSI), a 5.8-GHz electronic toll collection transceiver IC, and other practical circuits have been implemented by applying the SiGe HBT or BiCMOS technique.     

基于SiGe BiCMOS工艺的25Gbit/s跨阻放大器设计

采用0.25 μm SiGe双极CMOS (BiCMOS)工艺设计并实现了一种传输速率为25 Gbit/s的高速跨阻前置放大器(TIA).在寄生电容为65fF的情况下,电路分为主放大器模块、两级差分模块和输出缓冲模块.相比传统的跨阻放大器,TIA采用Dummy形式实现了一种伪差分的输入,减小了共模噪声,提高了电路的稳定性;在差分级加入了电容简并技术,有效地提高了跨阻放大器的带宽;在各级之间引入了射极跟随器,减小了前后级之间的影响,改善了电路的频域特性.电路整体采用了差分结构,抑制了电源噪声和衬底噪声.仿真结果表明跨阻放大器的增益为63.6 dBQ,带宽可达20.4 GHz,灵敏度为-18.2 dBm,最大输出电压为260 mV,功耗为82 mW.     

Monolithic SiGe Up‐/Down‐Conversion Mixers with Active Baluns

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on‐chip 1 to 6 GHz up‐conversion and 1 to 8 GHz down‐conversion mixers using a 0.8 µm SiGe hetero‐junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up‐conversion mixer was implemented on‐chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up‐conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down‐conversion mixer was implemented on‐chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down‐conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.     

An epitaxial emitter-cap SiGe-base bipolar technology optimized forliquid-nitrogen temperature operation

We give the first demonstration that a properly designed silicon bipolar technology can achieve faster unloaded circuit speed at liquid-nitrogen temperature than at room temperature. Transistors were fabricated using a reduced-temperature process employing an in situ arsenic-doped polysilicon emitter contact, a lightly phosphorus-doped epitaxial emitter-cap layer, and a graded SiGe base. At 84 K, transistors have a current gain of 500, with a cutoff frequency of 61 GHz, and a maximum oscillation frequency of 50 GHz. ECL circuits switch at a record 21.9 ps at 84 K, 3.5-ps faster than at room temperature. Circuits which were optimized for low-power operation achieve a minimum power-delay product of 61 fJ (41.3 ps at 1.47 mW), nearly a factor of two smaller than the best achieved to date at 84 K. The unprecedented performance of these transistors suggests that SiGe-base bipolar technology is a promising candidate for cryogenic applications requiring the fastest possible devices together with the processing maturity and integration level achievable with silicon fabrication     

Ultracompact SOI CMOS frequency doubler for low power applications at 26.5-28.5 GHz

In this paper, a complementary metal oxide semiconductor (CMOS) frequency doubler for wireless applications at Ka-band is presented. The microwave monolithic integrated circuit (MMIC) is fabricated using digital 90 nm silicon on insulator (SOI) technology. All impedance matching, filter and bias elements are implemented on the chip, which has a very compact size of 0.37 mm/spl times/0.27 mm. At an output frequency of 27 GHz, source/load impedances of 50 /spl Omega/, a supply voltage of 1.25 V, a supply current of 8 mA and an input power of -4.5 dBm, a conversion gain of 1.5 dB was measured. To the knowledge of the authors, the circuit has by far the highest operation frequency for a CMOS frequency multiplier reported to date and requires lower supply power than circuits using leading edge III/V and silicon germanium (SiGe) technologies.     

Low Power 1 GHz Frequency Synthesizer LSI's

To realize a low-power low-cost highly-reliable frequency synthesizer for a 1 GHz band radio, a bipolar presealer IC, and a CMOS LSI, consisting of a programmable counter, phase frequency comparator, and fixed divider, have been developed. The PLL synthesizer principle, using a pulse swallow counter, has been adopted for 1 GHz direct programmable count down. Adopting an advanced bipolar process and a diode AND circuit for the dual modulus presealer IC, high frequency operation at 1 GHz and 150 mW low power dissipation have been achieved simultaneously. To reduce the loop delay in the CMOS programmable counter, which limits the operating frequency, a new circuit configuration for the programmable counter and pulse swallow counter is adopted. As a result, 1 GHz frequency synthesizer LSI's have been developed with 150 mW low power dissipation for the presealer IC and 18 mW low power dissipation for CMOS LSI.     

A monolithically integrated 190-GHz SiGe push-push oscillator

In this letter, we present a fully monolithically integrated G-band push-push oscillator. The device is fabricated in a production-near SiGe:C bipolar technology. The transistors used in this work show a maximum transit frequency f/sub T/= 200GHz and a maximum frequency of oscillation fmax= 275GHz. The passive circuitry is realized by integrated transmission-line components, metal-insulator-metal (MIM)-capacitors and TaN resistors. The frequency of the output signal can be tuned between 183.3GHz and 190.5GHz, the maximum output power of the oscillator is -4.5dBm and the measured minimum single sideband phase noise is -73dBc/Hz at 1-MHz offset frequency. This represents the highest output frequency for oscillators using heterojunction bipolar transistor technology and published up to now.     

96-GHz static frequency divider in SiGe bipolar technology

A static frequency divider designed in a 210-GHz f/sub T/, 0.13-/spl mu/m SiGe bipolar technology is reported. At a -5.5-V power supply, the circuit consumes 44 mA per latch (140 mA total for the chip, with input-output stages). With single-ended sine wave clock input, the divider is operational from 7.5 to 91.6 GHz. Differential clocking under the same conditions extends the frequency range to 96.6 GHz. At -5.0 V and 100 mA total current (28 mA per latch), the divider operates from 2 to 85.2 GHz (single-ended sine wave input).     

Deep submicron CMOS based on silicon germanium technology

The advantages to be gained by using SiGe in CMOS technology are examined, Conventional MOSFETs are compared with SiGe heterojunction MOSFETs suitable for CMOS technology and having channel lengths between 0.5 and 0.1 μm. Two-dimensional computer simulation demonstrates that the improved mobility in the SiGe devices, due to higher bulk mobility and the elimination of Si/SiO₂ interface scattering by the inclusion of a capping layer, results in significant velocity overshoot close to the source-end of the channel. The cut-off frequency, f_t , is found to increase by around 50% for n-channel devices while more than doubling for p-channel devices for typical estimates of mobility. The results offer the prospect of a more balanced CMOS and improved circuit speed especially when using dynamic logic     

An ultra-high-speed ECL-BiCMOS technology with silicon filletself-aligned contacts

We have developed a half-micron super self-aligned BiCMOS technology for high speed application. A new SIlicon Fillet self-aligned conTact (SIFT) process is integrated in this BiCMOS technology enabling high speed performances for both CMOS and ECL bipolar circuits. In this paper, we describe the process design, device characteristics and circuit performance of this BiCMOS technology. The minimum CMOS gate delay is 38 ps on 0.5 μm gate and 50 ps on 0.6 μm gate ring oscillators at 5 V. Bipolar ECL gate delay is 24 ps on 0.6 μm emitter ring oscillators with collector current density of 40 kA/cm². A single phase decision circuit operating error free over 8 Gb/s and a static frequency divider operating at 13.5 GHz is demonstrated in our BiCMOS technology     

Low-power multi-GHz and multi-Gb/s SiGe BiCMOS circuits

Over the last decade, SiGe HBT BiCIMOS technology has matured from a laboratory research effort to become a 50/65-GHz fT/fmax silicon-based 0.5-μm BiCMOS production technology. This progress has extended silicon-based production technology into the multigigahertz (multi-GHz) and multigigabits-per-second (multi-Gb/s) range, thus, opening up an array of wireless and wired circuit and network applications and markets. SiGe circuits are now being designed in the same application space as GaAs MESFET and HBTs, and offer the yield cost, stability and manufacturing advantages associated with conventional silicon fabrication. A wide range of microwave circuits have been built in this technology including 5.8-GHz low-noise amplifiers with 1-V supply, up to 17-GHz fully monolithic VCOs with excellent figures of merit, high-efficiency 2.4-GHz power devices with supply voltage of 1.5 V, and move complicated functions such as 2.5/5.0-GHz frequency synthesizer circuits as well as 10/12.5-Gb/s clock and data recovery PLLs. This paper focuses on several key circuit applications of SiGe BiCMOS technology and describes the performance improvements that can be obtained by its utilization in mixed-signal microwave circuit design. By way of examples, the article highlights the fact that the combination of high-bandwidth, high-gain and low-noise SiGe HBTs with dense CMOS functionality in a SiGe BiCMOS technology enables implementation of powerful single-chip transceiver architectures for multi-GHz and multi-Gb/s communication applications     

A low supply voltage SiGe LNA for ultra-wideband frontends

A low-power low-noise amplifier (LNA) for ultra-wideband (UWB) radio systems is presented. The microwave monolithic integrated circuit (MMIC) has been fabricated using a commercial 0.25-/spl mu/m silicon-germanium (SiGe) bipolar CMOS (BiCMOS) technology. The amplifier uses peaking and feedback techniques to optimize its gain, bandwidth and impedance matching. It operates from 3.4 to 6.9GHz, which corresponds with the low end of the available UWB radio spectrum. The LNA has a peak gain of 10dB and a noise figure less than 5dB over the entire bandwidth. The circuit consumes only 3.5mW using a 1-V supply voltage. A figure of merit (FoM) for LNAs considering bandwidth, gain, noise, power consumption, and technology is proposed. The realized LNA circuit is compared with other recently published low-power LNA designs and shows the highest reported FoM.     

SiGe heterojunction bipolar transistors and circuits toward terahertz communication applications

The relatively less exploited terahertz band possesses great potential for a variety of important applications, including communication applications that would benefit from the enormous bandwidth within the terahertz spectrum. This paper overviews an approach toward terahertz applications based on SiGe heterojunction bipolar transistor (HBT) technology, focusing on broad-band communication applications. The design, characteristics, and reliability of SiGe HBTs exhibiting record f/sub T/ of 375 GHz and associated f/sub max/ of 210 GHz are presented. The impact of device optimization on noise characteristics is described for both low-frequency and broad-band noise. Circuit implementations of SiGe technologies are demonstrated with selected circuit blocks for broad-band communication systems, including a 3.9-ps emitter coupled logic ring oscillator, a 100-GHz frequency divider, 40-GHz voltage-controlled oscillator, and a 70-Gb/s 4:1 multiplexer. With no visible limitation for further enhancement of device speed at hand, the march toward terahertz band with Si-based technology will continue for the foreseeable future.     

A 28-GHz monolithic integrated quadrature oscillator in SiGe bipolar technology

This paper presents a 28-GHz monolithic quadrature voltage-controlled oscillator (QVCO) realized in a preproduction 0.4-/spl mu/m SiGe bipolar technology with 85-GHz transit frequency. QVCOs efficiently drive quadrature modulators and demodulators in receivers or transmitters. At 28.9 GHz, the circuit provides -14.7 dBm of output power and phase noise of -84.2 dBc/Hz at a 1-MHz offset. The two output signals are in quadrature with phase error of about 5/spl deg/. Tuning of the QVCO may be done in the frequency range from 24.8 to 28.9 GHz with nearly constant output power. The circuit consumes 25.8 mA from the 5 V voltage supply.     

SiGe Radio Frequency ICs for Low-Power Portable Communication

The range and impact of SiGe bipolar and BiCMOS technologies on wireless transceivers for portable telephony and data communications are surveyed. SiGe technology enables transceiver designs that compare favorably with competing technologies such as RF CMOS or III-Vs, with advantages in design cycle time and performance versus cost. As wireless devices continue to increase in complexity using conventional battery technology as the power source, the desire to reduce current consumption in future transceivers continues to favor SiGe technology. Examples are drawn from contemporary wireless communications ICs. The performance of on-chip passive components in silicon technologies are also reviewed in this paper. Greater understanding of the limitations of passive devices coupled with improved models for their performance are leading to circuits offering wider RF dynamic range at ever higher operating frequencies. The innovations in on-chip passive design and construction currently being pioneered in mixed-signal SiGe technologies are enabling circuits operating deep into millimeter-wave frequency bands (i.e., well above 30 GHz). In addition, sophisticated on-chip magnetic components combined with deep submicrometer SiGe active devices in a transceiver front end are envisioned that enable single-volt SiGe circuits, with even lower current consumption than is achievable today. Relevant examples from the recent literature are presented.