共查询到15条相似文献,搜索用时 234 毫秒
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量子可逆逻辑电路综合是以较小量子代价自动构造所求量子可逆逻辑电路.本文提出了一种新颖高效的4量子电路综合算法,巧妙构造置换的最短编码,通过对量子电路进行特定拓扑变换,无损压缩n量子最优电路占用内存空间近2×n!倍,通过对已生成最优电路的双向级联,可使用多种量子门,采用最小长度标准,以极高效率生成较长的4量子电路,如率先生成基于控制非门、非门、Toffoli门库的全部前8层共3120218828个电路,还可快速综合任意长度不超过16的最优电路,并对4量子标准测试电路进行快速且全面的优化. 相似文献
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为了能以较小的代价自动高效地构造量子可逆逻辑电路,提出了一种新颖的量子可逆逻辑电路综合方法.该方法通过线拓扑变换和对换演算,利用递归思想,将n量子电路综合问题转换成单量子电路综合问题,从而完成电路综合,经过局部优化生成最终电路.该算法综合出全部的3变量可逆函数,未优化时平均需6.41个EGT门,优化后平均只需5.22个EGT门;理论分析表明,综合n量子电路最多只需要n2n-1个EGT门.与同类算法相比,综合电路所用可逆门的数量大幅减少.同时该算法还避免了时空复杂度太大的问题,便于经典计算机实现. 相似文献
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本文提出了基于NCP门库的一维量子行走可逆逻辑电路设计方案.根据一维量子行走的特点,电路被划分为投掷硬币和S操作两个部分;文章详细分析一维量子行走,对其行为数学建模,巧妙利用可控加减电路实现了S操作.目前对于量子行走算法的研究多数局限于数学理论和数理解析层面,在量子电路理论层面对量子行走算法的研究为数不多.本文利用原始递归给出了一维量子行走中每一步在量子电路理论层面上的数学表达式;提出的可逆逻辑电路描述了一维量子行走的最基本操作,并且将其使用模块化表示,使一维量子行走算法的研究从理论到实现上前进了一步. 相似文献
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Camellia算法是一种在国际上使用广泛的分组密码算法,其拥有着高安全性、软硬件实现效率高等特点.为了在量子计算的硬件平台使用这类密码算法,首先要从综合角度出发考虑实现他们的量子电路.通过结合Camellia算法的结构特点,给出了算法在量子电路模型下的量子资源消耗,其中包括量子比特数、通用量子逻辑门数、量子电路深度以及电路的量子比特数与T深度的乘积值等.首先,使用改进的Itoh-Tsujii算法、高斯消元法以及有限域上求逆等方法,优化了算法S盒的量子实现方案.其次,根据轮函数线性部件的设计特点,给出了密钥拓展结构的量子优化实现方案,该方案在一定程度上减少了辅助量子比特的使用.在此基础上,利用计算常数参量汉明重量的方法,将CNOT门转化为Pauli-X门以减少量子资源的消耗.并使用改进的zig-zag结构将算法的主要组件结合起来,给出了Camellia算法的量子电路实现.最后,该方案给出了Camellia算法在三种不同版本密钥下所消耗的量子资源.与传统方法和其他算法的量子电路实现对比,该文的方案所消耗的量子资源更少.该电路的提出将会为量子环境下Camellia算法的深入研究奠定基础. 相似文献
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Because of recent nano-technological advances, nano-structured systems have become highly ordered, making it quantum computing schemas possible. We propose an approach to optimally synthesise quantum circuits from non-permutative quantum gates such as controlled-square-root-of-not (i.e., controlled-V). Our approach reduces the synthesis problem to multiple-valued optimisation and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimisation problem to a permutable representation. The transformation enables us to use group theory to exploit the symmetric properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc., and give another algorithm to realise these reversible circuits with quantum gates. The approach can be used for both binary permutative deterministic circuits and probabilistic circuits such as controlled random-number generators and hidden Markov models. 相似文献
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《Microelectronics Journal》2014,45(6):825-834
Reversible logic is a computing paradigm in which there is a one to one mapping between the input and the output vectors. Reversible logic gates are implemented in an optical domain as it provides high speed and low energy computations. In the existing literature there are two types of optical mapping of reversible logic gates: (i) based on a semiconductor optical amplifier (SOA) using a Mach–Zehnder interferometer (MZI) switch; (ii) based on linear optical quantum computation (LOQC) using linear optical quantum logic gates. In reversible computing, the NAND logic based reversible gates and design methodologies based on them are widely popular. The NOR logic based reversible gates and design methodologies based on them are still unexplored. In this work, we propose two NOR logic based n-input and n-output reversible gates one of which can be efficiently mapped in optical computing using the Mach–Zehnder interferometer (MZI) while the other one can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with a reduced number of linear optical quantum logic gates or reduced optical cost and propagation delay compared to their implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach–Zehnder interferometer. 相似文献
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Reversible logic circuits have received emerging attentions in recent years. Reversible logic is widely applied in some new technical fields, such as quantum computing, nanocomputing and optical computing and so on. In this paper, three fault tolerant gates are proposed, ZPL gate, ZQC gate and ZC gate. By using the proposed gates, fault tolerant quantum and reversible BCD adder and skip carry BCD adder are designed, which overcome the limitations of the existing methods. The proposed reversible BCD adders have also parity-preserving property. They are better than the existing counterparts, especially in the quantum cost. Proposed designs have been compared with existing designs with respect to the number of gates, number of garbage outputs and quantum cost. 相似文献
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H. M. Gaur A. K. Singh A. Mohan D. K. Pradhan 《International Journal of Electronics》2013,100(11):1679-1693
Quantum computing is one of the most significant anticipation towards the accomplishment of interminable consumer demands of small, high speed, and low-power operable electronics devices. As reversible logic circuits have direct applicability to quantum circuits, design and synthesis of these circuits are finding grounds for emerging nano-technologies of quantum computing. Multiple Controlled Toffoli (MCT) and Multiple Controlled Fredkin (MCF) are the fundamental reversible gates that playing key role in this phase of development. A number of special reversible gates have also been presented so far, which were claimed superior for providing certain purposes like logic development and testing. This paper critically analyses a range of these gates to procure an optimal solution for design, synthesis and testing of reversible circuits. The experimentation is facilitated at three subsequent levels, i.e. gates properties, quantum cost and design & testability. MCT and MCF gates are found up to 50% more cost-effective than special gates at design level and 34.4% at testability level. Maximum reversibility depth (MRD) is included as a new measurement parameter for comparison. Special gates exhibit MRD up to 7 which ideally should be 1 for a system to be physically reversible as that of MCT and MCF gates. 相似文献