基于龙芯多核处理器的云计算节点机

提出了一种基于龙芯多核处理器的高效能云计算节点机的软硬件设计和实现方法,并研制成功相应原型系统。实验和测试表明,本系统单节点取得了每秒0.256×1012次浮点运算能力（Tflops）,单一机柜可容纳42个1U节点机箱,672颗CPU,2 688个CPU核（672×4）的性能,总体具有基于龙芯多核处理器、高密度、高性能功耗比等优点,为基于龙芯多核处理器的云计算系统奠定了坚实基础。     

一种异构多核处理器的并行流存储结构

 异构多核处理器可结合多种处理器体系结构的优势,既保留传统通用体系结构的灵活性,又拥有大量计算资源,可提供更高的峰值计算性能.YHFT64-3异构多核处理器中浮点处理部件18套,峰值计算能力强大,设计与之相匹配的存储系统是一项重大挑战.针对YHFT64-3处理器,本文提出了一种并行流层次存储结构,深入阐述了如何体现应用特点、支持并行数据流处理的存储系统的设计思想和方法,从多个层次实现对并行数据流的挖掘或捕获.测试结果表明,这种存储结构体现了应用特点,能够较好地发挥YHFT64-3处理器的性能,同频情况下(500MHz),YHFT64-3比YHFT64-2性能高2—3个数量级,与1.6GHz的Itanium2性能相当,但代价更低.     

Cavium OCTEON处理器精确定位下一代智能安全网络

近年来,关于多核处理器的开发可谓是方兴未艾,层出不穷。索尼、IBM和东芝的CELL处理器,以及英特尔、AMD各自的多核处理器,均为通用型产品,目标是多种应用和运算处理,其架构复杂,成本很高。作为小型新兴公司的美国CaviumNetworks公司,依托其经验丰富的高端微处理器设计团队及嵌入式系统和应用软件团队,根据自身技术特点,精确定位于下一代智能安全网络市场,开发出了为网络、无线、控制和存储应用提供高度集成化和低成本64位计算的多核OCTEON处理器系列解决方案。CaviumNetworks总裁兼首席执行官SyedAli介绍说:“新推出的10款OCTEO…     

折断迅驰的翅膀？

众所周知，AMD在移动处理器市场的影响力远远不及英特尔。但凭借着独特的Mobile Athlon 64处理器．AMD在去年还是取得了一定成绩．得到了华硕．宏基．HP、NEC等大厂的支持，不过其高发热量决定了它在超便携笔记本上始终无法和英特尔相抗衡。当英特尔推出代号为Sonoma的新一代迅驰移动计算平台之后，AMD在经历相当长一段时间的沉默之后．带来了名为Turion 64的新一代低耗能移动处理器。Turion取“旅行”(tour)之暗喻．实际上它是在Moblle Athlon 64处理器的基础上．针对高机动性的商务人士与消费者量身打造的新系列移动处理器,其功耗最低为25W．而英特尔Sorloma平台的Dothan处理器则为21W。由此可见，AMD在功耗控制上已经取得了一定程度的进步。有理由相信．凭借Turion强大的性能．AMD完全可以在高性能机型上具有与英特尔抗衡的实力。     

矩阵乘法在Open SPARC T2多核处理器上的优化

矩阵乘法是很多应用问题的核心计算模块,在OpenSPARC T2处理器平台上,对矩阵乘法算法进行了设计优化,针对矩阵乘法访存特点,利用处理器本身8核64线程的特征,基于Open MP并行编程模型设计了矩阵乘多线程并行算法,并对访存和块大小进行了优化,采用C语言编程,对比单核单线程,并行矩阵乘算法在8核64线程的加速比达到21.9%,发挥峰值性能的53.9%。     

基于Tilera平台的AVS视频编码器的研究与实现

Tile处理器是Tilera公司研发的一种新型的多核处理器，文章在介绍Tilera平台的多核处理器的基础上，根据该处理器的架构特点，在该平台上实现了AVS和H.264的标清/高清实时视频编码器。     

基于MQTT的配电终端多核处理器核间通信设计

为进一步提高配电终端的运行能力以及快速可靠的故障处理能力，配电终端逐渐由单核处理器发展为多核处理器，由此带来了多核处理器之间数据通信的需求。本文基于物联网协议MQTT实现了一种新型的多核处理器核间通信技术，将共享内存封装成MQTT交互协议格式，保证各核数据的独立、互斥与共享，从而实现多核处理器各内核间简易可靠的数据通信方式。在此基础上采用MYC-C7Z015芯片进行配电终端硬件设计，并研究MYC-C7Z015芯片核间的数据通信方式，提升了配电终端的数据容量及运行能力。通过核间通信时延测试、通信极限测试，配电终端功能测试，验证了基于MQTT的配电终端核间通信的性能，简化了核间应用层通信代码设计，提升了配电终端性能。     

惠普全面推出新工业标准服务器 扩展基于AMD的产品线

2OO8年5月22日惠普发布了基于AMD四核皓龙处理器平台的新型ProLiant系列服务器。这些全新的服务器产品具有能够交付下一代计算性能的高扩展性架构,并提供了一条从32位计算灵活升级至64位计算的途径。同时,AMD四核皓龙处理器可提供更大的内存空间,帮助企业从容运行数据密集型应用。     

惠普推出新工业标准服务器

惠普日前发布了基于AMD四核皓龙TM处理器平台的新型ProLiant系歹0服务器。这些全新的服务器产品具有能够交付下一代计算性能的高扩展性架构,并提供了一条从32位计算灵活升级至64位计算的途径。同时,AMD四核皓龙TM处理器可提供更大的内存空间,帮助企业从容运行数据密集型应用。     

基于Xilinx MicroBlaze多核嵌入式系统的设计

MicroBlaze核是嵌入在Xilinx FPGA之中的属于32位RISC Harvard架构软处理器核。针对Xilinx MicroBlaze软处理器的核间互连,实现多处理器核之间的快速通信的目的,采用了PLB和FSL总线混连的方法,利用xps_mail-box和xps_mutex核完成核间的通信与同步,通过在Xilinx EDK平台下,将3个软处理器核嵌入到FPGA Spartan-3E芯片上的试验,开发出了一个运行在FPGA上的基于多处理器的嵌入式可编程片上系统,得出此种多核处理器混连的可行性与实用性,核间通信速度得到提升的结论。     

数字放大器—3G无线基站的助推器

为了构筑第三代无线网络,人们需要对现有基础设施进行彻底改造,包括网络的发射基站。配置在无线基站中的新型数字控制功率放大器能够改善频谱利用率和功率效率,从而提高系统容量。PMC-Sierra公司的数字控制功率放大器采用了数字校正信号处理器(DCSP)以及自适应控制处理器和补偿估值器(ACPCE),该放大器可改善无线基础设施的可靠性,同时降低系统成本、规模及复杂性。     

5G通信技术在电力物联网中的应用

5G通信技术因具有高带宽、低时延、低功耗等优势,受到各行各业的青睐。电力物联网是电力系统和信息通信的产物,旨在整合通信基础设施资源和电力系统基础设施资源,提高电力系统的信息化水平。基于此,首先对电力物联网的概念及特点进行了论述,其次结合电网特点,研究了电力物联网的多业务场景及通信需求,最后对5G的网络结构、主要通信技术和5G在电力物联网中的应用进行了研究。     

Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder

Viterbi decoder is a common module in communication system, which has the requirement of low power and low decoding latency. The conventional register exchange (RE) algorithm and memory-based trace-back (TB) algorithm cannot meet both constraints of power and decoding latency. In this paper, we propose a new Survivor Memory Unit (SMU) algorithm, named State Exchange (SE) algorithm. The SE algorithm uses the trace-forward unit (TFU) to run the decoding operation for low decoding latency. Besides, we enhance the SE algorithm by the concept of the trace-back (TB). Based on this enhancement, we propose two types of SE-SMU. Proposed type-I SE-SMU has lower register requirement with a long critical path. Proposed type-II SE-SMU can support the high speed requirement with the cost of additional TFUs and latency. Both two proposed SE-SMUs have the decoding latency slightly higher than the decoding latency of RE-SMU. We synthesized the proposed architecture in TSMC 0.13 um technology. Both two approaches have fewer active registers as decoding. From the power analysis, proposed SE-SMUs can give a 70% power reduction comparing with RE-SMU at 100 MHz with the decoding length = 96. The power saving ration will increase further with the longer decoding length.     

Algebraic survivor memory management design for Viterbi detectors

The problem of survivor memory management of a Viterbi detector is classically solved either by a register-exchange implementation which has minimal latency, but large hardware complexity and power consumption, or by a trace-back scheme with small power consumption, but larger latency. Here an algebraic formulation of the survivor memory management is introduced which provides a framework for the derivation of new algorithmic and architectural solutions. This allows for solutions to be designed with greatly reduced latency and/or complexity, as well as for achieving tradeoff between latency and complexity. VLSI case studies of specific new solutions have shown that at minimal latency more than 50% savings are possible in hardware complexity as well as power consumption     

Performance Comparisons Between Carbon Nanotubes, Optical, and Cu for Future High-Performance On-Chip Interconnect Applications

Optical interconnects and carbon nanotubes (CNTs) present promising options for replacing the existing Cu-based global/semiglobal (optics and CNT) and local (CNT) wires. We quantify the performance of these novel interconnects and compare it with Cu/low-kappa wires for future high-performance integrated circuits. We find that for a local wire, a CNT bundle exhibits a smaller latency than Cu for a given geometry. In addition, by leveraging the superior electromigration properties of CNT and optimizing its geometry, the latency advantage can be further amplified. For semiglobal and global wires, we compare both optical and CNT options with Cu in terms of latency, energy efficiency/power dissipation, and bandwidth density. The above trends are studied with technology node. In addition, for a future technology node, we compare the relationship between bandwidth density, power density, and latency, thus alluding to the latency and power penalty to achieve a given bandwidth density. Optical wires have the lowest latency and the highest possible bandwidth density using wavelength division multiplexing, whereas a CNT bundle has a lower latency than Cu. The power density comparison is highly switching activity (SA) dependent, with high SA favoring optics. At low SA, optics is only power efficient compared to CNT for a bandwidth density beyond a critical value. Finally, we also quantify the impact of improvement in optical and CNT technology on the above comparisons. A small monolithically integrated detector and modulator capacitance for optical interconnects (~10 fF) yields a superior power density and latency even at relatively lower SA (~20%) but at high bandwidth density. At lower bandwidth density and SA lower than 20%, an improvement in mean free path and packing density of CNT can render it most energy efficient.     

Media Independent Mobility Management for D2D Communications over Heterogeneous Networks (HetNets)

The rapid growth of traffic demand and innovation of mobile networks have pushed the current communication infrastructure to provide a tight integration of different wireless technologies. On the one hand, all user connections are expected to be heterogeneous in future networks and thus an intelligent mobility management is essential to satisfy the requirements of lower latency, less power consumptions and last but not least possible uninterrupted ongoing session when a User Equipment (UE) moves across network boundaries. On the other hand, Device-to-Device (D2D) communication as a revolutionary technology to enhance network performance has shown a great potential in dominating future communication market. Consequently, in this paper, we investigate the mobility management problem for D2D communications in heterogeneous networks. We leverage on IEEE 802.21 Media Independent Service (MIS) and propose a new framework, so-called enhanced version of IEEE 802.21 MIS that supports D2D communication (E-MIS-D2D) to enhance D2D mobility experience over heterogeneous networks. The E-MIS-D2D is a network assisted and initiated architecture, in which a load-aware mode selection algorithm is also proposed for selecting the transmission mode between D2D and non-D2D modes. Through extensive simulations, we validate that the proposed method outperforms the existing methods in terms of packet loss ratio, average throughput, latency, bandwidth usage and load rate of eNB.

     

Impact of Natural Gas Infrastructure on Electric Power Systems

The restructuring of electricity has introduced new risks associated with the security of natural gas infrastructure on a significantly large scale, which entails changes in physical capabilities of pipelines, operational procedures, sensors and communications, contracting (supply and transportation), and tariffs. This paper will discuss the essence of the natural gas infrastructure for supplying the ever-increasing number of gas-powered units and use security-constrained unit commitment to analyze the short-time impact of natural gas prices on power generation scheduling. The paper analyzes the impact of natural gas infrastructure contingencies on the operation of electric power systems. Furthermore, the paper examines the impact of renewable sources of energy such as pumped-storage units and photovoltaic/battery systems on power system security by reducing the dependence of electricity infrastructure on the natural gas infrastructure. A modified IEEE 118-bus with 12 combined-cycle units is presented for analyzing the gas/electric interdependency.     

Time Synchronization Protocol with Minimum Message Communication for High Latency Networks

Time synchronization is a critical component of the infrastructure of wireless sensor networks (WSN). In a high latency environment such as underwater, traditional approaches to time synchronization have limited accuracy. A new method is describe for time synchronization that takes into account clock skew, clock offset, and also propagation delay. Minimum message communication is used as a performance measure of the quality of this new time synchronization protocol.     

Compact Performance Models and Comparisons for Gigascale On-Chip Global Interconnect Technologies

The on-chip global interconnect with conventional Cu/low-k and delay-optimized repeater scheme faces great challenges in the nanometer regime owing to its severe performance degradation. This paper describes the analytical models and performance comparisons of novel interconnect technologies and circuit architectures to cope with the interconnect performance bottlenecks. Carbon nanotubes (CNTs) and optics-based interconnects exhibit promising physical properties for replacing the current Cu/low-k-based global interconnects. We quantify the performance of these novel interconnects and compare them with Cu/low-k wires for future high-performance integrated circuits. The foregoing trends are studied with technology node and bandwidth density in terms of latency and power dissipation. Optical wires have the lowest latency and power consumption, whereas a CNT bundle has a lower latency than Cu. The new circuit scheme, i.e., “capacitively driven low-swing interconnect (CDLSI),” has the potential to effect a significant energy saving and latency reduction. We present an accurate analytical optimization model for the CDLSI wire scheme. In addition, we quantify and compare the delay and energy expenditure for not only the different interconnect circuit schemes but also the various future technologies, such as Cu, CNT, and optics. We find that the CDLSI circuit scheme outperforms the conventional interconnects in latency and energy per bit for a lower bandwidth requirement, whereas these advantages degrade for higher bandwidth requirements. Finally, we explore the impact of the CNT bundle and the CDLSI on a via blockage factor. The CNT shows a significant reduction in via blockage, whereas the CDLSI does not help to alleviate it, although the CDLSI results in a reduced number of repeaters due to the differential signaling scheme.      

新基建风潮下的全国数据中心算力布局规划研究

作为新型基础设施的典型代表,数据中心算力布局是否科学适用已经成为决定全国和区域消费互联网经济和产业互联网经济高水平发展的重要因素。在新基建的风潮下,为防止和减轻数据中心的社会性基础设施属性带来的负面影响,需要从地域环境、产业行业、技术演进、国内国际和安全管理等多个维度,做好数据中心算力布局的顶层设计和统筹规划。