Adaptive digital/RF predistortion using a nonuniform LUT indexing function with built-in dependence on the amplifier nonlinearity

This paper reports on an integrated adaptive digital/RF predistorter using a nonuniform spaced lookup table (LUT) and in-phase/quadrature (I/Q) RF vector multiplier (VM). The LUT contents are directly deduced from the baseband input and output signals of the power amplifier (PA). In addition, a new nonlinear indexing function of the predistortion LUT with built-in dependence on the PA nonlinearity is proposed. This function is made to be robust to the input signal statistics. A comparison of this new indexation method with conventional approaches, namely, power and logarithmic power indexation functions, is carried out. The superiority of the proposed scheme is demonstrated in particular for class-AB amplifiers where the gain of the PA varies over the whole input range of the drive signal. The measured output spectrum of a linearized 90-W peak lateral double-diffused metal-oxide-semiconductor PA reveals a significant reduction of the power emission at the adjacent channels of approximately 15 dB under IS95, single-carrier, and multicarrier wide-band code-division multiple-access signals. The experimental evaluation is carried out using an RF/digital predistorter prototype that mainly includes an envelope detector, a linear I/Q RF VM, field-programmable gate array and digital signal processor, and fast analog/digital and digital/analog converters.     

An Approximation of Volterra Series Using Delay Envelopes, Applied to Digital Predistortion of RF Power Amplifiers With Memory Effects

In this letter, a new model for digital predistortion (DPD) of radio frequency power amplifiers for wide-band applications is proposed. The model is based on a spline approximation of Volterra series by considering second-order cross-terms. The advantage of the spline cross-term model is a reduction in the number of model parameters. We further reduce the model order by operating on delayed envelope samples, rather than the complex baseband samples. A block of wide-band code-division multiple access signal is sent through a 90 W class-AB power amplifier, based on the freescale LDMOS output device, and the input/output baseband samples were used to identify the DPD parameters.     

Frequency-Selective Predistortion Linearization of RF Power Amplifiers

This paper presents a frequency-selective RF vector predistortion linearization system for RF multicarrier power amplifiers (PAs) affected by strong differential memory effects. Differential memory effects can be revealed in two-tone experiment by the divergence for increasing tone-spacing of the vector Volterra coefficients associated with the lower and upper intermodulations tones. Using large-signal vector measurement with a large-signal network analyzer, a class-AB LDMOS RF PA is demonstrated to exhibit a strong differential memory effect for modulation bandwidth above 0.3 MHz. New frequency-selective RF and baseband predistortion linearization algorithms are proposed to separately address the linearization requirements of the interband and inband intermodulation products of both the lower and upper sidebands. Theoretical verification of the algorithms are demonstrated with Matlab simulations using a Volterra/Wiener PA model with memory effects. The baseband linearization algorithm is next implemented in a field-programmable gate array and experimentally investigated for the linearization of the class-AB LDMOS PA for two carrier wideband code-division multiple-access signals. The ability of the algorithm to selectively linearize the two interband and four inband intermodulation products is demonstrated. Adjacent channel leakage ratio of up to 45 dBc for inband and interband are demonstrated experimentally at twice the typical fractional bandwidth.     

A New Wideband Adaptive Digital Predistortion Technique Employing Feedback Linearization

We develop a new wideband digital feedback predistortion (WDFBPD) technique for modulated signals with wide bandwidths by combining digital feedback predistortion (DFBPD) linearization and memory-effect compensation techniques. For the experiments, a class-AB amplifier using an LDMOSFET with 90-W peak envelope power is employed. The proposed technique is compared with existing DFBPD and memory polynomial (MP) techniques for a 2.14-GHz forward-link WCDMA 2FA signal with 10-MHz carrier spacing. The experimental results show that the new WDFBPD technique has better linearization performance than conventional DFBPD and lower computational complexity than the MP technique.     

Optimum design of a predistortion RF power amplifier for multicarrier WCDMA applications

This paper provides a design guide for optimum design of an RF power amplifier with a predistortion linearizer. For a two-tone signal, three performance degradation factors, higher order terms, amplitude, and phase mismatches are analyzed quantitatively. The results are implemented to the design of optimized predistortion power amplifier for a WCDMA signal application. For the experiments, a 2.4-GHz class-AB power amplifier is fabricated using an LDMOSFET with a 30-W peak envelope power. A simple third-order predistorter is used to measure the relative phases of the harmonics, as well as to linearize the amplifier. The performance of the optimized predistortion power amplifier is excellent for an IS-95 code-division-multiple-access signal. Finally, a method for reducing the memory effects of the amplifier is devised to get a good cancellation performance for a wide-band signal, and the performance degradation caused by the memory effects is analyzed. For a forward-link four-carrier WCDMA signal, the predistortion power amplifier delivers an adjacent channel leakage ratio of -46 dBc at a 4-W average output power with a cancellation of 13.4 dB.     

Adaptive Digital Feedback Predistortion Technique for Linearizing Power Amplifiers

We have developed a new adaptive digital predistortion (DPD) linearization technique based on analog feedback predistortion (FBPD). The lookup-table-based feedback input can remove the bandwidth limitation of the feedback circuit related to the loop delay, and suppress feedback oscillation by accurate digital control of the feedback signal. Moreover, the predistortion (PD) signal can be extracted very efficiently. By combining the feedback linearization and DPD linearization techniques, the performance of the predistorter is enhanced significantly compared to the conventional DPD. To clearly visualize the characteristics of digital FBPD (DFBPD), we have compared it to the conventional DPD based on the recursive least square algorithm using Matlab simulation. The results clearly show that the new method is a good linearization algorithm, better than a conventional DPD. For the demonstration, a Doherty power amplifier with 180-W peak envelope power is linearized using the proposed DFBPD. For a 2.14-GHz forward-link wideband code-division multiple-access signal, the adjacent channel leakage ratio at 2.5-MHz offset is -58 dBc, which is improved by 15 dB at an average output power of 43 dBm     

A translinear SiGe BiCMOS current-controlled oscillator with 80 Hz–800 MHz tuning range

A novel identification and digital predistortion scheme of weakly nonlinear passband systems such as RF power amplifiers (PA) is presented. It is well known that for the identification of weakly nonlinear systems, despite the spectral regrowth, it suffices to sample the input-output (I/O) data of the system at the Nyquist rate of the input signal. Many applications such as linearization (digital predistortion) and mixed signal simulations require system models at a higher sampling rate than Nyquist. Up to now the construction of such high-rate predistorters has been done by oversampling the corresponding I/O data. This leads to high computational complexity, ill-posedness of the estimation, and high demand on the analog-to-digital converter (ADC) sampling rate for the implementation. This paper discusses an efficient way to obtain high-rate predistorters from low-rate system models and shows the validity of the proposed scheme for a 5th-order complex baseband PA model, where adjacent channel power suppression of 20 dB is achieved.     

Amplifier linearization using simultaneous harmonic and basebandinjection

A novel linearization scheme utilizing injection of distortion signal at the input of amplifier is described. Harmonic and baseband signal generated by predistortion circuits is fed to the input of the main amplifier and by controlling the power level of the harmonic and baseband signal properly, mixing products can be made to cancel out with the FET inherent distortion signals. Unlike many other techniques, no precise phase adjustment is required for the RF signal path. For verification, the two-tone performance of a constructed linearized amplifier is measured and a reduction of the third-order IMD power level of about 27 dB is observed     

Thermal memory effects modeling and compensation in RF power amplifiers and predistortion linearizers

Memory effects, which influence the performance of RF power amplifiers (PAs) and predistortion-based linearizers, become more significant and critical in designing these circuits as the modulation signal bandwidth and operation power increase. This paper reports on an attempt to investigate, model, and quantify the contributions of the electrical nonlinearity effects and the thermal memory effects to a PA's distortion generation, as well as how to compensate for these effects in designing baseband predistortion schemes. The first part of this paper reports on the development of an accurate dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. This expression has been used in the construction of an electrothermal model for the PA. Parameters for the new proposed behavior model were determined from the PA measurements obtained under different excitation conditions (e.g., small-signal and pulsed RF tests). This study led us to conclude that the effects of the transistor self-heating phenomenon are more important under narrow-band signal (e.g., enhanced data for global evolution of global system for mobile communications) than for signals with wide modulation bandwidth (CDMA2000, Universal Mobile Telecommunications System). In the second part of this paper, the newly developed model has also been used to design a temperature-compensated predistortion function to compensate for these effects. The linearized PA output spectrum and error vector magnitude show a significant performance improvement in the temperature-compensated predistortion function over a memoryless predistortion. The results of these measurements that have been conducted on a 90-W peak lateral double-diffused metal-oxide-semiconductor PA are in agreement with those obtained from simulations using the developed PA and the predistorter models implemented in an ADS environment.     

Neural-network-based adaptive baseband predistortion method for RF power amplifiers

An adaptive baseband predistortion method for RF power amplifier (PA) linearization is proposed and experimentally demonstrated. The predistortion component is implemented by a single-input dual-output multilayer perceptron (MLP). Both amplitude-to-amplitude and amplitude-to-phase distortion products are compensated by backpropagation training of the neural network including the response of the PA. Effects of modulator and demodulator imperfections on system performance are examined. Measurements on a system prototype reveal a significant linearity improvement that reaches 25 dB.     

Weighted Polynomial Digital Predistortion for Low Memory Effect Doherty Power Amplifier

We have proposed a simple and effective weighted polynomial digital predistortion algorithm, which consists of weighting, least square polynomial fit, and de-weighting. The weighting factor is introduced to describe the signal distribution statistics and high harmonic generation at a high power region to improve accuracy of the error function. A low memory linear Doherty power amplifier (PA) has been realized with two 90-W peak envelope power LDMOSFETs using memory effect reduction techniques, and the proposed algorithm has been applied to the PA. For the forward-link wideband code division multiple access 3FA signal, the adjacent channel leakage ratio performance at 5-MHz offset is -56 dBc with power-added efficiency of 20.78% at an average power of 40 dBm. The proposed weighting polynomial algorithm provides a significantly reduced error power and superior convergence behavior with improved linearization capability than the conventional polynomial. Moreover, the low memory Doherty amplifier could be linearized for a wideband signal using the simple algorithm without any memory effect compensation     

基于数/模混合预失真技术的功放线性化北大核心CSCD

随着移动通信信号带宽的增加,传统功率放大器数字预失真线性化技术越来越受到采样率的限制。为了使线性化效果更好,文中提出了一种数字预失真和模拟预失真相结合的混合预失真器,利用模拟预失真宽带宽的特点和数字预失真线性化能力强的优势,把模拟预失真和数字预失真融合在一起,共同补偿功放的非线性。由于受实验设备采样率的限制,文中采用了带宽为60 MHz的5 G NR信号对一个中心频率为3.5 GHz的射频功放进行实验验证。实验结果表明:提出的混合预失真器不仅优于单独的数字预失真器和模拟预失真器的非线性矫正性能,而且还能改善数字预失真因采样率限制无法改善的带外互调失真。     

Third- and fifth-order baseband component injection for linearization of the power amplifier in a cellular phone

This paper proposes a new predistortion technique to improve the adjacent channel power ratio of the power amplifier (PA) in a cellular phone. This technique injects the third- and fifth-order distortion components in the baseband block, and eliminates the fundamental component from the injected signals in order to operate effectively up to near power saturation. We show this technique can raise the distortion-compensation limit, through mathematical analysis, and confirm it with simulation. We also examine the distortion compensation performance of the PA using a wide-band code-division multiple-access uplink signal and a high-speed downlink packet access signal, and the possibility of applying a new low-voltage high-capacity battery.     

Dual-band transmitters using digitally predistorted frequency multipliers for reconfigurable radios

Two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers are developed. One method utilizes a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier, and a push-push frequency doubler using input phasing. Investigation to maximize output harmonics out of regular power amplifiers (PAs) was performed, and the implementation of the device was successful for the amplifier- and doubler-mode operation. To satisfy optimal load-line conditions for the operation in both modes, a bi-tuned output-combining technique is introduced as well. Measurement results indicate that the circuit is able to transmit 28 dBm of output power at 900 MHz in the amplifier mode, and 22 dBm at 1800 MHz in the doubler mode. In combination with predistortion linearization, the reconfigurable transmitter was shown to be capable of amplifying IS-95B code-division multiple-access (CDMA) signals with an adjacent-channel power ratio (ACPR) up to -58dBc/30kHz. The second suggested method utilizes a fundamental-frequency PA followed by a varactor multiplier that can be bypassed with an RF switch. A varactor-diode doubler with a saturated conversion loss of 1.3 dB was built and tested. Using predistortion linearization techniques on both the PA and doubler, an ACPR of -53dBc/30kHz at 885-kHz offset was achieved for a CDMA signal transmitted at 1850 MHz.     

FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter

Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array （FPGA） platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region.     

Analysis of Adaptive Digital Feedback Linearization Techniques

A new lookup-table linearization technique is developed based on the digital feedback and digital feedback/predistortion (DFBPD) concepts. The linearization characteristics are investigated through system simulation of a real power-amplifier model with 90-W peak envelope power. The DFB suppresses forward-path nonlinear distortion as a gain reduction due to the FB effect, and this technique enhances the system tolerance without any bandwidth limitation. As the PD network is added to the FB loop, the linearization performance and system tolerance are further improved because of more accurate PD signal extraction. In addition, the gain is purely determined by the FB path, so the gain fluctuation in the forward path, including amplifier aging and temperature effects, is suppressed. The analysis and simulation allow experimental evaluation of the linearization mechanism and performance of the DFBPD technique for an 802.16e mobile Worldwide Interoperability for Microwave Access signal.      

Digital subband filtering predistorter architecture for wireless transmitters

In this paper, a new architecture for baseband digital predistortion dedicated to wide-band transmissions is presented. The proposed predistorter consists of a cascade of a static lookup-table-based predistorter and a subband filtering block. The subband filtering technique is used to improve the correction bandwidth limitation of conventional architectures. The cases of four- and eight-subband decomposition were considered and compared to the case where the full-band signal is processed. This revealed that the subband processing results in a better sensitivity and an independent tuning ability of the predistorter at each subband. In addition, it was shown that, in the proposed predistorter, the computational complexity and the required processing speed are reduced proportionally to the number of subbands. Moreover, in an adaptive digital predistortion context, a quicker convergence can be achieved. Experimental validation of the subband-based predistortion concept was successfully carried on a 100-W peak envelop power lateral double diffused metal-oxide semiconductor power amplifier.     

基带预失真线性化技术在DAB系统中的应用

通过典型的功放无记忆模型分析了功放的非线性对DAB信号所造成的失真及基带预失真技术的作用机理。介绍一种基于该机理的硬件实现，通过在数字基带对信号进行预失真处理，补偿后端的射频功放所产生的非线性幅度失真和相位失真，从而有效地改善了DAB射频功放的线性度。     

Combined Linear and $Delta$-Modulated Switch-Mode PA Supply Modulator for Polar Transmitters

A combined linear and delta-modulated (DeltaM) switch-mode PA supply modulator for polar transmitters in wireless handsets is designed in a 0.25 mum CMOS process. The modulator employs a DeltaM switch-mode DC-DC buck converter to enhance the efficiency of a linear regulator at backed-off supply voltages and powers. The delta-modulator's noise-shaping characteristic, linear regulator's power supply rejection, digital pre-emphasis of the input envelope, and a closed-loop amplitude path from the PA output are simultaneously used to achieve state-of-the-art modulator performance. The presented supply modulator follows the input signal's envelope with 20 dB output dynamic range, maximum efficiency of 75.5% at an output power of 30.8 dBm, and 75 dB SFDR for envelope signals up to 4 MHz occupied RF bandwidth. For a 1625 kb/s 8 PSK RF input signal at 900 MHz, polar modulation of a commercial low-power GSM-900 PA provides 10 dB ACPR improvement.     

射频功放记忆效应的准确辨识和定量计算

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