The frequency and voltage dependent electrical characteristics of Al-TiW-Pd2Si/n-Si structure using I-V, C-V and G/ω-V measurements

The forward and reverse bias capacitance-voltage (C-V) and conductance-voltage (G/w-V) characteristics of Al-TiW-Pd₂Si/n-Si structures have been investigated over a wide frequency range of 5 kHz-5 MHz. These measurements allow to us the determination of the interface states density (N_ss) and series resistance (R_s) distribution profile. The effect of R_s on C and G is found noticeable at high frequencies. The C-V-f and G/w-V-f characteristics of studied structures show fairly large frequency dispersion especially at low frequencies due to N_ss in equilibrium with the semiconductor. The N_ss profile was obtained both forward bias current-voltage (I-V) characteristics by using into account the bias dependent of the ideality factor and effective barrier height (Φ_e) and low frequency (C_LF)-high frequency (C_HF) method. The plot of series resistance vs. voltage for the low frequencies gives a peak, decreasing with increasing frequencies. The frequency dependent C-V and G/w-V characteristics confirm that the R_s and N_ss of the Al-TiW-Pd₂Si/n-Si structures are important parameters that strongly influence the electric parameters in device.     

The role of the interface insulator layer and interface states on the current-transport mechanism of Schottky diodes in wide temperature range

In order to interpret in detail the experimentally observed current-voltage-temperature (I-V-T) and capacitance-voltage-temperature (C-V-T) results of Al/p-Si metal-semiconductor Schottky barrier diodes (SBDs) we have been examined the samples in the temperature range of 150-375 K. In the calculation method, to confirm the relationship between the I-V-T and C-V-T results, we have reported a modification which includes the ideality factor, n, and tunnelling parameter δχ^1/2 in the forward bias current characteristics. In the intermediate bias voltage region (0.1 < V < 0.6 V), the semi-logarithmic plots of the forward I-V-T curves were found to be linear. From the reverse saturation currents I₀ obtained by extrapolating the linear region of curves to zero applied voltage, the values of zero bias barrier heights ?_B0 were calculated at each temperature. The values of ideality factor calculated from the slope of each curves were plotted as a function of temperature. The values of n are 3.41-1.40 indicating that the Al/p-Si diode does obey the thermionic field emission (TFE) mechanism rather than the other transport mechanism, particularly at low temperature. The high value of ideality factors is attributed to high density of interface states in the SBDs. The temperature dependence energy density distribution profile of interface state was obtained from the forward bias I-V-T measurements by taking into account the bias dependence of the effective barrier height and ideality factor. The interface states density N_ss decreasing with increasing temperature was interpreted by the result of atomic restructuring and reordering at the metal-semiconductor interface. After the modification was made to the forward current expression, we obtained a good agreement between the values of barrier height obtained from both methods over a wide temperature.     

Barrier characteristics of gold Schottky contacts on moderately doped n-InP based on temperature dependent I-V and C-V measurements

The temperature dependences of current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the gold Schottky contacts on moderately doped n-InP (Au/MD n-InP) Schottky barrier diodes (SBDs) have been systematically investigated in the temperature range of 60-300 K. The main diode parameters, ideality factor (n) and zero-bias barrier height (apparent barrier height) were found to be strongly temperature dependent and while the decreases, the n and the increase with decreasing temperature. According to Thermionic Emission (TE) theory, the slope of the conventional Richardson plot [In(J₀/T²) vs. 1000/T] should give the barrier height. However, the experimental data obtained do not correlate well with a straight line below 160 K. This behaviour has been interpreted on the basis of standard TE theory and the assumption of a Gaussian distribution of the barrier heights due to barrier inhomogeneities that persist at the metal-semiconductor interface. The linearity of the apparent barrier height vs. 1/(2kT) plot that yields a mean barrier height of 0.526 eV and a standard deviation (σ_s0) of 0.06 eV, was interpreted as an evidence to apply the Gaussian distribution of the barrier height. Furthermore, modified Richardson plot [ vs. 1/T] has a good linearity over the investigated temperature range and gives the and the Richardson constant (A^∗) values as 0.532 eV and 15.90 AK⁻²cm⁻², respectively. The mean barrier heights obtained from both plots are appropriate with each other and the value of A^∗ obtained from the modified Richardson plot is close to the theoretical value of 9.4 AK⁻²cm⁻² for n-InP. From the C-V characteristics, measured at 1 MHz, the capacitance was determined to increase with increasing temperature. C-V measurements have resulted in higher barrier heights than those obtained from I-V measurements. The discrepancy between Schottky barrier heights(SBHs) obtained from I-V and C-V measurements was also interpreted. As a result, it can be concluded that the temperature dependent characteristic parameters for Au/MD n-InP SBDs can be successfully explained on the basis of TE mechanism with Gaussian distribution of the barrier heights.     

Temperature-dependent current-voltage characteristics of Cr/n-GaAs Schottky diodes

The Cr/n-GaAs/In Schottky contacts have been formed using dc magnetron sputtering. The current-voltage (I-V) characteristics of the device have been measured by steps of 20 K in the temperature range of 60-320 K. The ideality factor n of the device has remained about unchanged between 1.04 and 1.10 and Schottky barrier height around 0.58-0.60 eV from 320 K down to 160 K. It can be said that the experimental I-V data are almost independent of temperature above 160 K. After 160 K, the n value increased with a decrease in temperature and become 1.99 at 60 K. The I-V characteristics at high temperatures have been exactly explained by the standard TE model. The nature and origin of abnormal behaviors at low temperatures have been successfully explained by the current flow through the low SBH circular patches suggested by Tung and used by some studies in literature. It has been seen that the straight line of the nT vs. T plot with a T₀ value of 14 K was parallel to that of the ideal Schottky contact. Again, a lateral homogeneous BH value of 0.62 eV was calculated from the linear relationship between the ideality factor and barrier height values. It has been seen that he ?(T = 0) and BH temperature coefficient α values obtained from the flat band BH and the Norde’s model plots are in close agreement with each other.     

The electrical characteristics of Sn/methyl-red/p-type Si/Al contacts

The junction characteristics of the organic compound methyl-red film (2-[4-(dimethylamino)phenylazo]benzoic acid) on a p-type Si substrate have been studied. The current-voltage characteristics of the device have rectifying behavior with a potential barrier formed at the interface. The barrier height and ideality factor values of 0.73 eV and 3.22 for the structure have been obtained from the forward bias current-voltage (I-V) characteristics. The interface state energy distribution and their relaxation time have ranged from 1.68 × 10¹² cm⁻² eV⁻¹ and 1.68 × 10⁻³ s in (0.73-E_v) eV to 1.80 × 10¹² cm⁻² eV⁻¹ and 5.29 × 10⁻⁵ s in (0.43-E_v) eV, respectively, from the forward bias capacitance-frequency and conductance-frequency characteristics. Furthermore, the relaxation time of the interface states shows an exponential rise with bias from (0.43-E_v) eV towards (0.73-E_v) eV.     

Characterization of Ni/Ho and Ni/Er fully silicided metal gates on SiO2 gate dielectric

This paper investigates the effects of Ho and Er on the sheet resistance and crystallinity of Ni(Ho) and Ni(Er) silicides, the work function (WF) modulation of Ni(Ho) and Ni(Er) fully silicided (FUSI) gate electrodes on SiO₂ dielectric, and the FUSI gated SiO₂/Si interface trap properties by using high-frequency capacitance-voltage (C-V) and photonic high-frequency C-V measurements. It was found that as the thickness percentage of rare earth (RE) metal in the Ni(Ho) or Ni(Er) increases, the sheet resistance of the silicide increases. The crystallinity decreases in the Ni(Ho) and Ni(Er) silicides, and the crystallinity decreases as the Ho thickness percentage increases. As the thickness percentage of Ho in the Ni(Ho) increases from 13% to 30%, the flatband voltage (V_FB) shift increases from −0.19 to −0.27 V. The V_FB shifts negatively 0.17 V due to 10% Er incorporation in the Ni(Er). The V_FB shift can be attributed to the effective WF decrease which may be due to the crystallinity decrease of Ni(Ho) and Ni(Er) FUSI. The interface trap density D_it calculated from the photonic high-frequency C-V curves is in good agreement with that calculated from the high-frequency and photonic high-frequency C-V curves. The Ho or Er addition does not increase the D_it.     

The frequency-dependent electrical characteristics of interfaces in the Sn/p-Si metal semiconductor structures

The purpose of this paper is to investigate frequency-dependent electrical characteristics of the interface states in Sn/p-Si metal semiconductor (MS) Schottky structures. To yield quantitative information about their frequency (f) and voltage (V) dependent characteristics, Sn/p-Si MS structures have been studied by using capacitance (C) and conductance (G/ω) measurements over a wide range of frequencies (50 kHz-1 MHz). The increase in capacitance at lower frequencies is seen as a signature of interface states, and the densities of which are evaluated to be of the order of ≅10¹⁰ cm⁻² eV⁻¹. The presence of the interfaces states (N_SS) is also evidenced as a peak in the capacitance-frequency characteristics that increases in magnitude with decreasing frequencies. Furthermore, the voltage and frequency dependence of series resistance (R_S) were calculated from the C-V and G/ω-V measurements and plotted as functions of voltage and frequency. The effect of R_S on C and G/ω is found noticeable at high frequencies. The C-V-f and G/ω-V-f characteristics of studied structures show fairly large frequency dispersion especially at low frequencies due to N_SS in equilibrium with the semiconductor. The experimental values of interface state densities and series resistance from C-V-f and G/ω-V-f measurements were obtained in the ranges of 3.46 × 10¹⁰−1.26 × 10⁹ cm⁻² eV⁻¹ and 71.1-57.3 Ω, respectively. Experimental results show that both the R_S and N_SS values should be taken into account in determining frequency-dependent electrical characteristics.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

On the profile of frequency dependent series resistance and surface states in Au/Bi4Ti3O12/SiO2/n-Si(MFIS) structures

The frequency dependent capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the metal-ferroelectric-insulator-semiconductor (Au/Bi₄Ti₃O₁₂/SiO₂/n-Si) structures (MFIS) were investigated by considering series resistance (R_s) and surface state effects in the frequency range of 1 kHz-5 MHz. The experimental C-V-f and G/ω-V-f characteristics of MFIS structures show fairly large frequency dispersion especially at low frequencies due to R_s and N_ss. In addition, the high frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real capacitance of MFIS structures. The R_s-V plots exhibit anomalous peaks between inversion and depletion regions at each frequency and peak positions shift towards positive bias with increasing frequency. The C⁻²-V plot gives a straight line in wide voltage region, indicating that interface states and inversion layer charge cannot follow the ac signal in the depletion region, but especially in the strong inversion and accumulation region. Also, it has been shown that the surface state density decreases exponentially with increasing frequency. The C-V-f and G/w-V-f characteristics confirm that the interface state density (N_ss) and series resistance (R_s) of the MFIS structures are important parameters that strongly influence the electrical properties of MFIS structures.     

Fabrication and characterization of in situ polymerized n-polyaniline films grown on p-Si heterojunctions

This work presents a study on the fabrication and the electrical transport mechanism of the in situ polymerized n-type polyaniline (PANI) grown on p-type Si to form n-polyaniline/p-Si heterojunction devices. The current-voltage-temperature (I-V-T) characteristics of n-PANI/p-Si devices were investigated in the temperature range of 298-373 K. These devices showed good rectifying behavior and the temperature dependence of the I-V characteristics were successfully explained by the thermionic mechanism in the narrow potential range, V ? 0.4 V. The barrier height, ideality factor and the series resistance values of this structure were obtained from the forward bias I-V characteristics. The capacitance-voltage-temperature (C-V-T) characteristics of n-PANI/p-Si devices were also investigated. The barrier height values obtained from the C-V measurements were found to be higher than that obtained from the I-V measurements at various temperatures. From the capacitance-voltage-frequency (C-V-f) characteristics, it was found that the capacitance remained almost constant up to a certain values of the frequency in the lower and higher sides of the frequency scale. The higher values of capacitance at low frequencies were attributed to the excess capacitance resulting from the interface states in equilibrium with the p-Si side that can follow the AC signal.     

Analysis of electrical characteristics of Au/SiO2/n-Si (MOS) capacitors using the high-low frequency capacitance and conductance methods

The purpose of this paper is to analyze electrical characteristics in Au/SiO₂/n-Si (MOS) capacitors by using the high-low frequency (C_HF-C_LF) capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements have been carried out in the frequency range of 1 kHz-10 MHz and bias voltage range of (−12 V) to (12 V) at room temperature. It was found that both C and G/ω of the MOS capacitor were quite sensitive to frequency at relatively low frequencies, and decrease with increasing frequency. The increase in capacitance especially at low frequencies is resulting from the presence of interface states at Si/SiO₂ interface. Therefore, the interfacial states can more easily follow an ac signal at low frequencies, consequently, which contributes to the improvement of electrical properties of MOS capacitor. The interface states density (N_ss) have been determined by taking into account the surface potential as a function of applied bias. The energy density distribution profile of N_ss was obtained from C_HF-C_LF capacitance method and gives a peak at about the mid-gap of Si. In addition, the high frequency (1 MHz) capacitance and conductance values measured under both reverse and forward bias have been corrected for the effect of series resistance (R_s) to obtain the real capacitance of MOS capacitors. The frequency dependent C-V and G/ω-V characteristics confirm that the N_ss and R_s of the MOS capacitors are important parameters that strongly influence the electrical properties of MOS capacitors.     

Some electrical properties of polyaniline/p-Si/Al structure at 300 K and 77 K temperatures

The electrical characterization of the PANI/p-Si/Al structure has been investigated by using current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics. Especially, some characteristics have been compared with the 300 K temperature characteristics at liquid nitrogen temperature. The characteristic parameters of the structure such as barrier height, ideality factor and series resistance have been determined from the current-voltage measurements. According to the C-V characteristics, the higher values of capacitance at low frequencies and high temperature have been attributed to the excess capacitance resulting from the interface states in equilibrium with the p-Si, which can follow the a.c. signal.     

On the profile of frequency and voltage dependent interface states and series resistance in (Ni/Au)/Al0.22Ga0.78N/AlN/GaN heterostructures by using current-voltage (I-V) and admittance spectroscopy methods

In order to explain the experimental effect of interface states (N_ss) and series resistance (R_s) of device on the non-ideal electrical characteristics, current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures were investigated at room temperature. Admittance measurements (C-V and G/ω-V) were carried out in frequency and bias voltage ranges of 2 kHz-2 MHz and (−5 V)-(+5 V), respectively. The voltage dependent R_s profile was determined from the I-V data. The increasing capacitance behavior with the decreasing frequency at low frequencies is a proof of the presence of interface states at metal/semiconductor (M/S) interface. At various bias voltages, the ac electrical conductivity (σ_ac) is independent from frequencies up to 100 kHz, and above this frequency value it increases with the increasing frequency for each bias voltage. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under forward and reverse bias were corrected to minimize the effects of series resistance. The results indicate that the interfacial polarization can more easily occur at low frequencies. The distribution of N_ss and R_s is confirmed to have significant effect on non-ideal I-V, C-V and G/ω-V characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures.     

On the energy distribution of interface states and their relaxation time and capture cross section profiles in Al/SiO2/p-Si (MIS) Schottky diodes

The energy distribution profile of the interface states (N_ss) and their relaxation time (τ) and capture cross section (σ_p) of metal-insulator-semiconductor (Al/SiO₂/p-Si) Schottky diodes have been investigated by using the high-low frequency capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of these devices were investigated by considering series resistance (R_s) effects in a wide frequency range (5 kHz-1 MHz.). It is shown that the capacitance of the Al/SiO₂/p-Si Schottky diode decreases with increasing frequency. The increase in capacitance especially at low frequencies results form the presence of interface states at Si/SiO₂ interface. The energy distributions of the interface states and their relaxation time have been determined in the energy range of (0.362-E_v)-(0.512-E_v) eV by taking into account the surface potential as a function of applied bias obtained from the measurable C-V curve (500 Hz) at the lowest frequency. The values of the interface state density (N_ss) ranges from 2.34 × 10¹² to 2.91 ×  10¹² eV⁻¹/cm², and the relaxation time (τ) ranges from 1.05 × 10⁻⁶ to 1.58 × 10⁻⁴ s, showing an exponential rise with bias from the top of the valance band towards the mid-gap.     

Extraction of electronic parameters of Schottky diode based on an organic Orcein

An Au/Orcein/p-Si/Al device was fabricated and the current-voltage measurements of the devices showed diode characteristics. Then the current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the device were investigated at room temperature. Some junction parameters of the device such as ideality factor, barrier height, and series resistance were determined from I-V and C-V characteristics. The ideality factor of 2.48 and barrier height of 0.70 eV were calculated using I-V characteristics. It has been seen that the Orcein layer increases the effective barrier height of the structure since this layer creates the physical barrier between the Au and the p-Si. The interface state density N_ss were determined from the I-V plots. The capacitance measurements were determined as a function of voltage and frequency. It was seen that the values of capacitance have modified with bias and frequency.     

Structural, electrical and magnetic characterizations of Ni/Cu/p-Si Schottky diodes prepared by liquid phase epitaxy

In this paper, we have investigated the structural, electrical and magnetic characterizations of Ni/Cu/p-Si Schottky diode prepared by liquid phase epitaxy (LPE). Current density-voltage (J-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) measurements were performed to determine the conduction mechanisms as well as extracting the important diode parameters. Rectifying properties were obtained, which definitely of the Schottky diode type. At low voltages, (0 < V ? 0.4 V), current density in the forward direction was found to obey the diode equation, while for higher voltages, (0.5 < V ? 1.5 V), conduction was dominated by a space-charge-limited conduction (SCLC) mechanism. Analysis of the experimental data under reverse bias suggests a transition from electrode-limited to a bulk-limited conduction process for lower and higher applied voltages, respectively. Diode parameters such as, the built-in potential, V_b, the carrier concentration, N, the width of the depletion layer, W, of the Ni/Cu/p-Si Schottky diode were obtained from the C-V measurements at high frequency (1 MHz). The capacitance-frequency measurements showed that the values of capacitance were highly frequency dependent at low frequency region but independent at high frequencies. The Ni/Cu/p-Si Schottky diode showed magnetic properties due to the effect of Ni in the heterostructure.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

The profile of temperature and voltage dependent series resistance and the interface states in (Ni/Au)/Al0.3Ga0.7N/AlN/GaN heterostructures

The temperature dependence of capacitance-voltage (C-V) and the conductance-voltage (G/w-V) characteristics of (Ni/Au)/Al_0.3Ga_0.7N/AlN/GaN heterostructures were investigated by considering the effect of series resistance (R_s) and interface states N_ss in a wide temperature range (79-395 K). Our experimental results show that both R_s and N_ss were found to be strongly functional with temperature and bias voltage. Therefore, they affect the (C-V) and (G/w-V) characteristics. The values of capacitance give two peaks at high temperatures, and a crossing at a certain bias voltage point (∼3.5 V). The first capacitance peaks are located in the forward bias region (∼0.1 V) at a low temperature. However, from 295 K the second capacitance peaks appear and then shift towards the reverse bias region that is located at ∼−4.5 V with increasing temperature. Such behavior, as demonstrated by these anomalous peaks, can be attributed to the thermal restructuring and reordering of the interface states. The capacitance (C_m) and conductance (G/w-V) values that were measured under both reverse and forward bias were corrected for the effect of series resistance in order to obtain the real diode capacitance and conductance. The density of N_ss, depending on the temperature, was determined from the (C-V) and (G/w-V) data using the Hill-Coleman Method.     

Millisecond flash-lamp annealing of LaLuO3

Metal-oxide-semiconductor capacitors containing the alternative high-k dielectric LaLuO₃ were treated by flash lamp annealing (FLA). Capacitance-voltage (C-V) and current-voltage (J-V) characteristics reveal an increase in the capacitance for the flashed samples while the very low leakage current of the LaLuO₃ is retained. Microstructural investigations confirm the thermal stability of the film even after FLA at 1200 °C, 20 ms.     

Temperature dependent electrical and dielectric properties of Au/polyvinyl alcohol (Ni, Zn-doped)/n-Si Schottky diodes

The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si Schottky diodes (SDs) were studied in the temperature range of 80-400 K. The investigation of various SDs fabricated with different types of interfacial layer is important for understanding the electrical and dielectric properties of SDs. Therefore, in this study polyvinyl alcohol (PVA) film was used as an interfacial layer between metal and semiconductor. The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si SDs were calculated from the capacitance-voltage (C-V) and conductance-voltage (G/w-V) measurements. The effects of interface state density (N_ss) and series resistance (R_s) on C-V characteristics were investigated in the wide temperature range. It was found that both of the C-V-T and G/w-V-T curves included two abnormal regions and one intersection point. The dielectric constant (ε″), dielectric loss (ε″), dielectric loss tangent (tan δ) and the ac electrical conductivity (σ_ac) obtained from the measured capacitance and conductance were studied for Au/PVA (Ni, Zn-doped)/n-Si SDs. Experimental results show that the values of ε′, ε″ and tan δ are a strong function of the temperature. Also, the results indicate the interfacial polarization can be more easily occurred at high temperatures.