Study of the performance impact of a cache buffer in solid-state disks

An SSD generally has a small memory, called cache buffer, to increase its performance and the frequently accessed data are maintained in this cache buffer. These cached data must periodically write back to the NAND Flash memory to prevent the data loss due to sudden power-off, and it should immediately flush all dirty data items into a non-volatile storage media (i.e., NAND Flash memory), when receiving a flush command, while the flush command is supported in Serial ATA (SATA) and Serial Attached SCSI (SAS). Thus, a flush command is an important factor to give significant impact on SSD performance.In this paper, we have investigated the impact of a flush command on SSD performance and have conducted in-depth experiments with versatile workloads, using the modified FlashSim simulator. Our performance measurements using PC and server workloads provide several interesting conclusions. First, a cache buffer without a flush command could improve SSD performance as a cache buffer size increases, since more requested data could be handled in the cache buffer. Second, our experiments have revealed that a flush command might give a negative impact on SSD performance. The average response time per request with a flush command is getting worse compared to not supporting the flush command, as cache buffer size increases. Finally, we have proposed the backend flushing scheme to nullify the negative performance impact of the flush command. The backend flushing scheme first writes the requested data into a cache buffer and sends the acknowledgment of the request completion to a host system. Then, it writes back the data in the cache buffer to NAND Flash memory. Thus, the proposed scheme could improve SSD performance since it might reduce the number of the dirty data items in a cache buffer to write back to NAND Flash memory.All these results suggest that a flush command could give a negative impact on SSD performance and our proposed backend flushing scheme could improve the SSD performance while supporting a flush command.     

嵌入式Linux中NAND Flash设备驱动研究

NAND Flash作为一种非易失性的存储介质,它具有速度快、体积小、存储密度高和容量大等优点,适用于大量数据的存储,因此在嵌入式领域中的应用也越来越广泛。分析了MTD(内存技术设备)与NAND Flash驱动的关系,总结了典型的NAND Flash驱动程序的总体架构。针对PXA270RP平台,设计和实现了嵌入式Linux下的NAND Flash驱动程序。为编写基于嵌入式Linux系统下的NAND Flash设备驱动程序提供了技术指导。     

NAND Flash文件系统的研究与改进

NAND Flash因非易失、抗震、低功耗等特点被广泛应用于嵌入式系统的大容量数据存储中。虽然随着JFFS3文件系统的提出,理论上解决了初始化文件系统时需扫描整个闪存分区、挂载时间过长、占用内存过多的缺陷,但并未解决NAND Flash本身随机读写严重不均衡的问题。在对JFFS3文件系统研究的基础上提出采用FDTree索引结构的SFFS文件系统,以解决在数据频繁更新的环境里NAND Flash数据管理问题,给出了考虑损耗均衡兼顾回收效率的垃圾回收机制。     

一种适用FADEC的NAND Flash文件存储系统

NAND Flash具有容量大、存取数据快的优点.但是,在使用过程中NAND Flash会产生坏块,且坏块是随机分布的.因此,操作NAND Flash需要相当的技巧,不能往坏块里写入数据.同时,NAND Flash更容易发生位翻转,需要使用ECC算法确保信息的正确性.在航空发动机上NAND Flash主要用来记录发动机控制(FADEC)的历史数据.FADEC的历史数据记录要求大容量、实时性和正确性.提出的适用FADEC的NAND Flash的文件存储系统(FFS_N)可以有效地解决NAND Flash使用上的问题,同时满足航空发动机控制历史数据记录要求.     

Next high performance and low power flash memory package structure

In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventionM NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.     

基于NAND Flash的CPU安全启动设计与实现

NAND Flash存储器以其容量大、成本低和速度快的优势,在嵌入式系统中得到广泛的应用。但是,由于NAND Flash固有的器件特性,必须要有驱动才能对其进行读写,存储于其上的代码不能直接执行,因此其并不适合作为系统启动代码的存储介质。一般采用NOR Flash存储启动代码并直接执行,然后再引导存储于NAND Flash中的操作系统镜像,这增大了系统成本和功耗。设计并实现了一种基于NAND Flash的CPU安全启动方法。该方法首先通过软硬件结合的方式,在片内NAND Flash控制器中增加块映射表结构,并由NAND Flash中第1块空间存储的代码进行好块寻找和块映射表填写,使NAND Flash的一部分存储空间可以直接映射为硬件可访问的内存空间,从而使得NAND Flash可以作为系统启动的存储介质,实现仅需NAND Flash存储的系统。还提出了一种扩展BootROM的方案,结合NAND Flash地址映射结构,将片内BootROM的一部分扩展到NAND Flash的第1块存储空间中,并通过Hash比对验证BootROM,从而有效降低了片内BootROM的设计复杂度,减少了代码量。通过提出的方法,可以有效地实现单NAND Flash系统的安全启动,降低了系统成本,提高了系统的安全特性。     

基于FPGA的水声信号高速采集存储系统设计

介绍了一种基于FPGA的水声信号数据采集与存储系统的设计与实现,给出了系统的总体方案,并对各部分硬件和软件的设计进行了详细描述。系统以FPGA作为数据的控制处理核心,以存储容量达2 GB的大容量NAND型Flash作为存储介质。该系统主要由数据采集模块、数据存储模块和RS-232串行通信模块组成,具有稳定可靠、体积小、功耗低、存储容量大等特点,实验证明该系统满足设计要求。     

A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash

Existing SSD technology exploits the properties of NAND flash and leverages NAND flash with a controller running FTL algorithms to improve system performance. On one hand, however, in this black-box-modeled structure, data semantic information is hard to be transferred and interpreted by conventional interfaces. Hence, SSD firmware fails to make full use of the performance potential of SSD by utilizing semantic information. Moreover, the host cannot obtain physical characteristics and statistical information about SSD, failing to be used by the file system or I/O scheduling algorithm designed for the disks. On the other hand, in SSD-based storage systems, persistent data are stored in the NAND flash and however manipulated in DRAM, causing the decoupled inefficiency. The data being closer to the processors are much easier to be lost due to the volatile property of DRAM, leading to serious data reliability problems. What’s more, restrictive read/program granularity and out-of-place updates limit the performance while flash suffers from small size operations.In order to address these problems, we propose a user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash. PCM is used for improving data reliability and reducing the write amplification of NAND flash as PCM shows some outstanding features, such as in-place updates, byte-addressable, non-volatile properties and better endurance. In this system, we manage the storage device as user-visible structure rather than black-box-modeled structure. In detail, we expose the number of channels, erase counts and data distribution of PCM/NAND flash to the host and design FTL algorithm closer to file system to obtain more semantic information of data accessing. PCM can be software-defined as the same level storage or buffer of NAND flash to reduce the WA (Write Amplification) of NAND flash and improve the data reliability. Moreover, some key software components (such as FTL, I/O scheduling and buffer management) are also reconfigurable and operated easily combined with physical characteristics. To achieve these design goals, we implement a Host Fusion Storage Layer (HFSL) and redesign the lengthy I/O path. Applications or filesystem can access PCM/flash directly via provided interfaces by HFSL without passing traditional I/O subsystem. Moreover, we provide the system management software to make the storage system can be easily software-defined by the upper-level system. We implement our software-defined fusion storage system in our actual hardware prototype and extensive experimental results demonstrate the efficiency of the proposed schemes.     

A high performance NAND array file system based on multiple NAND flash memories

The existing NAND flash memory file systems have not taken into account multiple NAND flash memories for large-capacity storage. In addition, since large-capacity NAND flash memory is much more expensive than the same capacity hard disk drive, it is cost wise infeasible to build large-capacity flash drives. To resolve these problems, this paper suggests a new file system called NAFS for large-capacity storage with multiple small-capacity and low-cost NAND flash memories. It adopts a new cache policy, mount scheme, and garbage collection scheme in order to improve read and write performance, to reduce the mount time, and to improve the wear-leveling effectiveness. Our performance results show that NAFS is more suitable for large-capacity storage than conventional NAND file systems such as YAFFS2 and JFFS2 and a disk-based file system for Linux such as HDD-RAID5-EXT3 in terms of the read and write transfer rate using a double cache policy and the mount time using metadata stored on a separate partition. We also demonstrate that the wear-leveling effectiveness of NAFS can be improved by our adaptive garbage collection scheme.     

嵌入式设备NAND Flash存储系统的设计与实现

为了实现一种嵌入式设备存储系统的解决方案,对嵌入式设备广泛采用的大容量存储设备NAND Flash进行了深入的研究.设计了一种嵌入式设备中NAND Flash存储系统的解决方案,介绍了其功能用途和系统结构,分层介绍了系统的具体设计,重点介绍了比较独特的块设备驱动层和FTL层的设计方法以及对驱动初始化的优化.通过实际设计NAND Flash存储系统Linux驱动,说明了该系统设计实际应用时的出色效果.     

支持Yaffs2文件系统的U-Boot的实现

为了在大容量NAND Flash存储器中运行Yaffs2(yet another flash file system)文件系统,分析了Yaffs2文件系统的结构、原理、性能和嵌入式系统中启动代码U-Boot的功能.在此基础上对U-Boot进行了改进.实现了在嵌入式系统的开发过程中用U-Boot向大容量NAND Flash中写入Yaffs2文件系统,并将其成功应用在正在开发的嵌入式手持设备中,从而可以方便地使用大容量的NAND Flash存储器.     

A multi-channel architecture for high-performance NAND flash-based storage system

Many mobile devices demand a large-capacity and high-performance storage system in order to store, retrieve, and process large multimedia data quickly. In this paper, we present a high-performance NAND flash-based storage system based on a multi-channel architecture. The proposed system consists of multiple independent channels, where each channel has multiple NAND flash memory chips. On this hardware, we investigate three optimization techniques to exploit I/O parallelism: striping, interleaving, and pipelining. By combining all the optimization techniques carefully, our system has shown 3.6 times higher overall performance compared to the conventional single-channel architecture.     

Real-time emulation and analysis of multiple NAND flash channels in solid-state storage device

NAND Flash is the most prevalent memory technology used today in data storage systems covering a wide range of applications, from consumer devices to high-end enterprise systems. In this work, we present a modular and versatile FPGA-based platform that achieves accurate emulation of multiple NAND Flash channels. The NAND Flash emulator is based on an expandable and reconfigurable architecture that can be used for developing and testing new NAND Flash controllers and for analysing the behaviour of existing NAND Flash controllers and/or host device drivers. The presented NAND Flash emulator is based on PCIe-based FPGA boards attached to a high-end server, supports standard memory interfaces, responds to all memory commands in proper time and has the capability to emulate memory space in the range of a few TBs. The NAND Flash emulator has been prototyped and tested, and experimental results demonstrate that all timing requirements are satisfied under maximum read/write workloads. The NAND Flash emulator also includes a hardware tracer unit that records information of all commands exchanged at the NAND Flash interfaces along with high resolution timestamps. The recorded information can be used to analyse higher level functions, like wear leveling and garbage collection, and combined with other software tools for analysing cognitive functions. Experimental results demonstrate the advantage of using this emulator for analysing how host device drivers implement wear leveling and garbage collection functions.     

一种多通道并行固态存储系统的设计与实现

鉴于高速数据采集系统对实时数据存储带宽和容量的要求,提出一种基于现场可编程门阵列（FPGA）的高速多通道并行固态存储系统。该系统以现场可编程门阵列器件XCV5LX110T为核心,选用大容量高速闪存芯片作为存储介质,通过采用并行总线拓宽技术和流水线缓冲技术,在FPGA片内搭建高速多通道并行存储硬件架构,从硬件角度提高系统的数据吞吐带宽。设计一种基于超级页的地址映射策略,并使用该策略对闪存转换层算法的请求处理机制进行并行加速优化,从软件角度提高系统的存储并行性。测试结果表明,该系统的最大存储速度达到73MB／s,其性能指标能满足高速实时数据存储的需求,证明多通道存储架构和FTL算法具有良好的并行性和可扩展性。     

Davinci平台下大页面NAND Flash上的系统构建问题

以TI公司新一代Davinci TMS320DM6446嵌入式处理器为例,详细描述了在NAND Flash上构建嵌入式Linux操作系统的一般方法.结合Sumsang公司的K9K8G08U0A大页面NAND Flash,给出了引导程序的移植、烧写的具体设计及实现过程,提供基于大页面NAND Flash作为唯一外部存储设备的稳定、可靠的解决方案.为新一代Davinci系列处理器的配置、使用提供了参考.     

分布式测试系统中数据存储管理系统研究

在一些大海域进行的分布式测试系统实验中,对大量、多种类测试数据的有效存储管理是必要的。NAND Flash存储器具有非易失、大容量、可擦除与重复性编程等优点,并可基于其构建文件系统实现文件的有效存储管理。无线实时回传处理大量数据是系统的瓶颈,因此存储数据时可提取数据特征并存储特征,为实现基于特征提取的高效数据传输提供可...     

PBFilter: A flash-based indexing scheme for embedded systems

NAND Flash has become the most widely used electronic stable storage technology for embedded systems. As on-board storage capacity increases, the need for efficient indexing techniques arises. Such techniques are very challenging to design due to a combination of NAND Flash constraints (e.g., block-erase-before-page-rewrite constraint and limited number of erase cycles) and embedded system constraints (e.g., tiny RAM and resource consumption predictability). Previous work adapted traditional indexing methods to cope with Flash constraints by deferring index updates using a log and batching them to decrease the number of rewrite operations in Flash memory. However, these methods were not designed with embedded system constraints in mind and do not address them properly. In this paper, we propose a different alternative for indexing Flash-resident data that specifically addresses the embedded context. This approach, called PBFilter, organizes the index structure in a purely sequential way. Key lookups are sped up thanks to two principles called Summarization and Partitioning. We instantiate these principles with data structures and algorithms based on Bloom Filters and show the effectiveness of this approach through a comprehensive analytical performance study. Extensions of PBFilter on range queries and multi-criteria queries are also discussed. The proposed technique is integrated into a full-fledged embedded DBMS engine. We describe the complete design of the DBMS engine to illustrate the feasibility of adopting PBFilter technique in a real system. Finally, we show some performance measurements of the prototype on top of a real hardware platform, in order to validate the new technique in a practical manner.     

支持多种NAND Flash的驱动程序研究与实现

NAND Flash具有存储密度高、成本低等优点,非常适合于手持设备的数据存储。该文介绍了在WINCE平台如何实现支持多种类型的NAND Flash的驱动程序,采取分层驱动的体系架构,提高代码复用的程度,便于维护和扩展。添加一种新的类型的NAND Flash,只需用加入很少的代码。     

支持多种NANDFlash的驱动程序研究与实现

NANDFlash具有存储密度高、成本低等优点。非常适合于手持设备的数据存储。该文介绍了在WINCE平台如何实现支持多种类型的NANDFlash的驱动程序,采取分层驱动的体系架构,提高代码复用的程度,便于维护和扩展。添加一种新的类型的NANDFlash．只需用加入很少的代码。     

The scaling challenges of CMOS and the impact on high-density non-volatile memories

Solid-state mass storage has experienced recently an explosive growth, mainly related to digital consumer application (digital cameras, MP3 players, USB keys). The demand is not expected to slow down in the near future. Present storage technology is based on NAND Flash, and it appears that there is still margin to scale it down at least to the 45 nm node. The likely appearance of physical limits to scalability is pushing for the investigation of alternative storage technologies, and several solutions have been proposed. However, any kind of memory needs a selection mechanism, and related parasitic effects can be a severe limitation to scaling. Scaling challenges of select devices (mostly CMOS), and their impact on memory scaling will be investigated, and alternatives proposed.