Surface morphology and I-V characteristics of single-crystal,polycrystalline, and amorphous silicon FEA's

This letter reports the surface morphology and current-voltage (I-V) characteristics of single-crystal silicon (c-Si), polycrystalline silicon (poly-Si), and amorphous silicon (a-Si) field emitter arrays (FEAs). As-deposited a-Si film has a smoother surface than poly-Si film. The surface morphology of the a-Si remains smooth even after phosphorus doping and oxidation at 950°C to be improved in emission characteristics, i.e., smaller anode current deviation among arrays smaller gate current, and higher failure voltage than those of poly-Si FEAs. Such improved characteristics can be explained by the smooth surface morphology which is kept during doping and oxidation. The surface roughness and emission characteristics of a-Si FEAs are comparable to those of c-Si FEAs     

Improvement of electron emission efficiency and stability bysurface application of molybdenum silicide onto gated poly-Si fieldemitters

As an approach to improve electron field emission and its stability, molybdenum (Mo) silicide formation on n⁺ polycrystalline silicon (poly-Si) emitters has been investigated. Mo silicide was produced by direct metallurgical reaction, namely, deposition of Mo and subsequent rapid thermal annealing. The surface morphologies and emission properties of Mo-silicided poly-Si (Mo-polycide) emitters have been examined and compared with those of poly-Si emitters. While anode current of 0.1 μA per tip could be obtained at the gate voltage of 82 V from poly-Si emitters, the same current level was measured at 72 V from Mo-polycide emitters. In addition, the application of Mo silicide onto poly-Si emitters reduced the emission current fluctuation considerably. These results show that the polycide emitters can have potential applications in vacuum microelectronics to obtain superior electron emission efficiency and stability     

Silicide application on gated single-crystal, polycrystalline andamorphous silicon FEAs. II. Co silicide

For pt. I see ibid., vol.48, no.1, p.149-54 (Jan. 2001). For enhancement and stabilization of electron emission, Co silicides were formed from Co, Co/Ti and Ti/Co layers on silicon FEAs. Since Ti prevents oxygen adsorption on the Co film during silicidation, uniform and smooth Co silicide layers can be obtained by depositing Co first and then Ti on silicon tips, followed by rapid annealing. Among Co silicide FEAs, Co silicide formed from Ti/Co bi-layers shows the lowest leakage current, the highest failure voltage over 152 V and the largest anode current over 1 mA at the gate voltage of 150 V. Compared with silicon field emitters, the silicide FEAs formed from Ti/Co layers exhibited a significant improvement in maximum emission current, emission current fluctuation and stability, and failure voltage     

A formation of cobalt silicide on silicon field emitter arrays byelectrical stress

A novel process utilizing electrical stress is proposed for the formation of Co silicide on single crystal silicon (c-Si) FEAs to improve the field emission characteristics. Co silicide FEAs formed by electrical stress (ES) exhibited a significant improvement in turn-on voltage and emission current compared with c-Si FEAs. The improvement mainly comes from the lower effective work function of Co silicide and less blunting of tips during silicidation by electrical stress in an ultra high vacuum (UHV) environment less than 10^-8 torr     

A novel self-aligned polycrystalline silicon thin-film transistorusing silicide layers

A novel self-aligned polycrystalline silicon (poly-Si) thin-film transistor (TFT) was fabricated using the three layers of poly-Si, silicon-nitride, and thin amorphous silicon. Gate and source/drain silicide formation was carried out simultaneously following silicon nitride and amorphous silicon patterning, enabling the use of only two mask steps for the TFT. The fabricated poly-Si TFT using laser annealed poly-Si exhibited a field-effect mobility of 30.6 cm²/Vs, threshold voltage of 0.5 V, subthreshold slope of 1.9 V/dec., on/off current ratio of ~10⁶, and off-state leakage current of 7.88×10^-12 A/μm at the drain voltage of 5 V and gate voltage of -10 V     

A novel fabrication process of a silicon field emitter array withthermal oxide as a gate insulator

We have successfully developed a fabrication process of a silicon field emitter array with a gate insulator formed by Si₃N₄ sidewall formation and subsequent thermal oxidation. This process overcomes some problems in the conventional fabrication, such as high etch rate, low breakdown field, and gate hole expansion arising from evaporation of gate oxide. Therefore, we could improve process stability and emission performance, and also reduce gate leakage current. The optimum process conditions were determined by process simulations using SUPREM-4. The turn-on voltage of the fabricated field emitters was approximately 38 V. An anode current of 0.1 μA (1 μA) per tip was measured for a 625-tip array at the gate bias of 80 V (100 V), and the gate current was less than 0.3% of the anode current at those emission levels     

A high-performance polycrystalline silicon thin film transistorwith a silicon nitride gate insulator

We have fabricated a high performance polycrystalline silicon (poly-Si) thin film transistor (TFT) with a silicon-nitride (SiN_x ) gate insulator using three stacked layers: very thin laser of hydrogenated amorphous silicon (a-Si:H), SiN_x and laser annealed poly-Si. After patterning thin a-Si:H/SiN_x layers, gate, and source/drain regions were ion-doped and then Ni layer was deposited. This structure was annealed at 250°C to form a NiSi silicide phase. The low resistive Ni silicides were introduced as gate/source/drain electrodes in order to reduce the process steps. The poly-Si with a grain size of 250 nm and low resistance n⁺ poly-Si for ohmic contact were introduced to achieve a high performance TFT. The fabricated poly-Si TFT exhibited a field effect mobility of 262 cm²/Vs and a threshold voltage of 1 V     

Low temperature polycrystalline silicon thin film transistor withsilicon nitride ion stopper

The authors have fabricated a new low temperature polycrystalline silicon (poly-Si) thin film transistor (TFT) with silicon nitride (SiN _x) ion-stopper and laser annealed poly-Si. The fabricated poly-Si TFT using SiN_x as the ion-stopper as well as the gate insulator exhibited a field effect mobility of 110 cm²/Vs, subthreshold voltage of 5.5 V, subthreshold slope of 0.48 V/dec., and on/off current ratio of ~10⁶. Low off-state leakage current of 2.4×10^-2 A/μm at the drain voltage of 5 V and the gate voltage of -5 V was achieved     

A polycrystalline silicon thin-film transistor with a thinamorphous buffer

We have developed a novel, low off-state leakage current polycrystalline silicon (poly-Si) thin-film transistor (TFT) by introducing a very thin hydrogenated amorphous silicon (a-Si:H) buffer on the poly-Si active layer. The a-Si:H buffer is formed on the whole poly-Si and thus no additional mask step is needed. With an a-Si:H buffer on poly-Si, the off-state leakage current of a coplanar TFT is remarkably reduced, while the reduction of the on-state current is relatively small. The poly-Si TFT with an a-Si:H buffer exhibited a field effect mobility of 12 cm²/Vs and an off-state leakage current of 3 fA/μm at the drain voltage of 1 V and the gate voltage of -5 V     

Integration and characterization of amorphous silicon thin-filmtransistor and Mo-tips for active-matrix cathodes

We have designed and monolithically integrated amorphous silicon thin-film transistor (a-Si TFT) with Mo-tip field emitter arrays (FEAs) on glass substrate for active-matrix cathodes (AMCs) in field-emission display (FED) application. In our AMCs, a light shield layer of metal was introduced to reduce the photo leakage and back channel currents of a-Si TFT. The light shield was designed to have the role of focusing grid to focus emitted electron beams from the AMC on the corresponding anode pixel by forming it around the Mo-tip FEAs as well as above the a-Si TFT. The thin film depositions in a-Si TFTs were performed at a high temperature of above 360°C to guarantee the postvacuum packaging process of cathode and anode plates in FED. Also, a novel wet etching process was developed for n⁺-doped-a-Si etching with high etch selectivity to intrinsic a-Si and good etch controllability and was used in the fabrication of inverted stagger TFT with a very thin active layer. The developed a-Si TFTs had good enough performance to be used as control devices for AMCs with Mo-tip emitters. The fabricated AMCs exhibited very effective aging process for field emitters     

Ultralow-voltage boron-doped diamond field emitter vacuum diode

A boron-doped diamond field emitter diode with ultralow turn-on voltage and high emission current is reported. The diamond field emitter diode structure with a built-in cap was fabricated using molds and electrostatic bonding techniques. The emission current versus anode voltage of the capped diamond emitter diode with boron doping, sp² content, and vacuum thermal electric (VTE) treatment shows a very low turn-on voltage of 2 V. A high emission current of 1 μA at an anode voltage of less than 10 V can be obtained from a single diamond tip. The turn-on voltage is significantly lower than comparable silicon field emitters     

High current density Si field emission devices with plasmapassivation and HfC coating

A novel self-aligned process was developed to fabricate gated Si field emission devices. At a gate voltage of 100 V, the emission current from an array of 100 tips increased from 283 to 460 μA and the turn-on voltage decreased from 31 to 21 V after H₂ plasma passivation using an inductively coupled plasma (ICP) source for 2 min. The improvements correspond to a 1.28-eV reduction in the effective work function of the emitters and the instability of the emission current decreased from ±1,25 to ±0.25% after H₂ plasma passivation. Emitter tips were also coated with Mo silicide and HfC. The emission current increased from 230 μA for uncoated emitters to 268 μA for emitters coated with Mo silicide and 389 μA for emitters coated with HfC. The turn-on voltage decreased from 50 to 41 and 25 V while the breakdown voltage increased from 126 to 129 and 143 V when Mo silicide and HfC were used for coating, respectively, which correspond to reductions of 0.95 and 2.23 eV, respectively, in the effective work function of the emitters. Single emitter tips have similar emission characteristics as high-density field emitter arrays, indicating excellent emission uniformity from the arrays     

Inverted Staggered Poly-Si Thin-Film Transistor With Planarized SOG Gate Insulator

In this letter, we have studied the inverted staggered thin-film transistor (TFT) using a spin-on-glass (SOG) gate insulator and a low-temperature polycrystalline silicon (poly-Si) by Ni-mediated crystallization of amorphous silicon. The p-channel poly-Si TFT exhibited a field-effect mobility of 48.2 cm²/V ldr s, a threshold voltage of -4.2 V, a gate-voltage swing of 1.2 V/dec, and a minimum off-current of < 4 times 10^-13A/ mum at V_ds = -0.1 V. Therefore, the gate planarization technology by SOG can be applicable to low-cost large-area poly-Si active-matrix displays.     

Lateral field emission diodes using SIMOX wafer

Lateral field emission diodes were fabricated by using separation by implantation of oxygen (SIMOX) wafer and their current-voltage characteristics (I-V) were analyzed. Applying conventional photolithography and local oxidation of silicon (LOGOS) process, we fabricated single-crystalline lateral silicon field emitters with very sharp cathode and anode tips and very short cathode to anode spacing ranging from 0.3 to 0.8 μm as well. Two different types of tips, tapered and wedge-shaped emitters, were typically formed according to oxidation time. The turn-on voltages for both types of diodes were as low as 22~25 V and the emission currents were as high as 6 μA/tip at voltages of 35~38 V. From the Fowler-Nordheim (FN) equation, field emitting area (A) and field enhancement factor (β) for both types of diodes were estimated to explain the low turn-on voltages and the high emission currents     

钼尖场致发射阵列阴极的性能研究

利用微细加工技术和双向薄膜沉积技术对钼尖场发射阵列阴极的工艺进行了较为细致的研究，并在专用的真空系统中对所得阵列阴极的发射性能进行了测试，得到了一定的场致发射电流密度值。测试中采用数据采集系统监测栅极电压、阳极电压、阳极电流和栅极电流，测量了阴极阵列的发射稳定性和发射噪声。对发射的失效机理进行了实验研究和分析，认为发射失效的主要原因在于栅极和基底之间的漏电，尖锥和棚极孔间的暗电流，电极间的放电和放气，以及环境真空度和尖锥的均匀性等。所得结果以进一步开展有射频器件和显示器件方面的应用研究打下了一定基础。     

Diamond grit-based field emission cathodes

This letter describes the fabrication and operation of diamond grit gated cathodes. The structure is similar to Spindt-type cathode, but the field emission cone is replaced with a more planar diamond grit layer 50 to 200 nm thick. Although the minimum lithographic dimension of these cathodes is from 1 to 5 μm, these devices have exceptionally low turn-on voltages, 5 to 7 V. Cathode current noise is less than 2.5% rms with a maximum absolute current variation of 6.7% over a 6 h period. These devices can operate in pressures of nitrogen above 133 Pa (1 Torr). Although operation in 6.6×10^-2 Pa (5×10 ^-4 Torr) with more reactive gasses, O₂ or H₂ S, degrades performance, the cathodes recover when the pressure is reduced to ⩽1.3×10^-4 Pa (1×10^-6 Torr). Gate current varies from 0.2 to 100 times the emitted current and depends on the technique used to deposit the diamond grit. High current densities (>10 A cm^-2), low gate voltages (<50 V), low emission noise, excellent longevity, temporal uniformity, and ease of fabrication make these devices potential cathodes for flat panel displays. However, excessive gate current and unsatisfactory processing reproducibility at present limit their general application     

A high performance thin-film transistor using a low temperaturepoly-Si by silicide mediated crystallization

Electric field enhanced silicide mediated crystallization (SMC) was introduced for low-temperature polycrystalline silicon thin-film transistors (TFTs) on glass substrates. The amorphous silicon (a-Si) film having an average Ni thickness of 0.15 Å, was completely crystallized at a temperature of 480°C within 30 min in the presence of an electric field of 40 V/cm. The poly-Si is composed of needlelike crystallites with a few μm length and about 50 nm width. The poly-Si TFT using the SMC exhibited a field effect mobility of 86 cm²/Vs, a threshold voltage of -0.6 V, and a subthreshold slope of 0.6 V/dec     

Energy pay-back time and life-cycle CO2 emission of residential PV power system with silicon PV module

The concerns about environmental impacts of photovoltaic (PV) power systems are growing with the increasing expectation of PV technologies. In this paper, three kinds of silicon-based PV modules, namely single-crystalline silicon (c-Si), polycrystalline silicon (poly-Si) and amorphous silicon (a-Si) PV modules, are evaluated from the viewpoint of their life-cycle. For the c-Si PV module it was assumed that off-grade silicon from semiconductor industries is used with existing production technologies. On the other hand, new technologies and the growth of production scale were presumed with respect to the poly-Si and a-Si PV modules. Our results show that c-Si PV modules have a shorter energy pay-back time than their expected lifetime and lower CO₂ emission than the average CO₂ emission calculated from the recent energy mix in Japan, even with present technologies. Furthermore the poly-Si and the a-Si PV modules with the near-future technologies give much reduction in energy pay-back times and CO₂ emissions compared with the present c-Si PV modules. The reduction of glass use and the frameless design of the PV module may be effective means to decrease them more, although the lifetime of the PV module must be taken into account. © 1998 John Wiley & Sons, Ltd.     

High performance poly-Si TFTs fabricated using pulsed laserannealing and remote plasma CVD with low temperature processing

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4×10¹⁶ cm^-3 by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO ₂/Si with the interface trap density of 2.0×10¹⁰ cm^-2 eV^-1 at 270°C. Poly-Si TFTs were fabricated at 270°C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm²/Vs for n-channel TFTs and 400 cm²/Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2×10^-10 A/μm to 3×10^-13 A/μm at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 μm     

Effect of diamond-like carbon coating on the emissioncharacteristics of molybdenum field emitter arrays

We have studied the electron emission characteristics of Mo field emitter arrays (FEAs) using a diamond-like carbon (DLC) film deposited by a layer-by-layer technique using plasma enhanced chemical vapor deposition. The turn-on voltage was lowered from 55 to 30 V by a 20 nm thick hydrogen-free DLC coating and maximum emission current was increased from 166 to 831 μA. Also the gate voltage required to get the anode current of 0.1 (μA/emitter) decreases from 77 to 48 V. Furthermore, the emission current from DLC coated Mo FEAs is more stable than that of noncoated Mo FEAs