Structural and interfacial properties of high-k HfOxNy gate dielectric films

The thermal stability and interfacial characteristics for hafnium oxynitride (HfO_xN_y) gate dielectrics formed on Si (1 0 0) by plasma oxidation of sputtered HfN films have been investigated. X-ray diffraction results show that the crystallization temperature of nitrogen-incorporated HfO₂ films increases compared to HfO₂ films. Analyses by X-ray photoelectron spectroscopy confirm the nitrogen incorporation in the as-deposited sample and nitrogen substitution by oxygen in the annealed species. Results of FTIR characterization indicate that the growth of the interfacial SiO₂ layer is suppressed in HfO_xN_y films compared to HfO₂ films annealed in N₂ ambient. The growth mechanism of the interfacial layer is discussed in detail.     

Preparation of device-quality SiO2 thin films by remote plasma-enhanced chemical vapour deposition (PECVD): Applications in metal-oxide-semiconductor (MOS) devices

This review focuses on the evolution of a low-temperature remote plasma-assisted deposition process that has yielded device-quality SiO₂ and SiO₂-Si₃N₄ alloy thin films as defined by their performance in metal-oxide-semiconductor (MOS) devices. The evaluation of the dielectric films with respect to both the plasma deposition process and the device performance cannot be separated from (i) the pre-deposition surface cleaning of the crystalline silicon (c-Si) substrates and (ii) the way in which the Si-SiO₂ interface is formed. As a consequence, we show that this approach for using plasma-deposited SiO₂ films as gate dielectrics must of necessity combine (i) the final cleaning of the Si surface, (ii) the formation of the Si-SO₂ interface and (iii) the deposition of the gate oxide or nitrided oxide film into an in-situ integrated processing sequence.     

The effect of oxygen in Ru gate electrode on effective work function of Ru/HfO2 stack structure

Effective work function (φ_m,eff) values of Ru gate electrode on SiO₂ and HfO₂ MOS capacitors were carefully examined and discussed from the viewpoint of an effect of oxygen incorporation in Ru gate electrode on φ_m,eff. Annealing at 400 °C in the reduction (3%H₂) and the oxidation (1%O₂) ambient resulted in similar changes in the φ_m,eff of Ru/HfO₂/SiO₂ and Ru/SiO₂ MOS capacitors. Furthermore, the Ru gate MOS capacitor after annealing in the oxidation condition have shown almost the same φ_m,eff value to that of RuO₂ gate MOS capacitors. The oxygen concentration in the Ru/HfO₂ interface after annealing in oxidizing atmosphere is approximately one order of magnitude higher than that after annealing in reducing atmosphere as confirmed by secondary ion mass spectroscopy analysis. Furthermore, the higher oxygen concentration at the Ru/dielectric interface leads to the higher φ_m,eff value, regardless of SiO₂ or HfO₂ dielectrics. This indicates that φ_m,eff of Ru gate MOS capacitor is dominantly determined by the oxygen concentration at the Ru/dielectric layer interface rather than the dipoles originated from the oxygen vacancy in HfO₂.     

High-quality oxide formed by evaporation of SiO nanopowder: Application to MOSFETs on plastic substrates and GaN epilayers

Although good gate oxide of SiO₂ is usually formed by high-temperature thermal oxidation, lowering the temperature for formation of SiO₂ is mandatory for future Si VLSIs, in particular, for flexible ICs, the demand for which has been increasing every year. Vacuum evaporation of SiO powder is an ideal technique not only to form oxide at low temperature but also to form an abrupt interface with the substrate. The latter feature of evaporation is suitable to form thin gate oxide for Si MOSFETs and gate oxide on compound semiconductors. High-quality SiO₂ on compound semiconductors helps development of MOSFETs made of compound semiconductors, which were longed for to be commercially available. The evaporation is not much used to form SiO₂ for MOSFETs in spite of its many advantages, because quality of SiO₂ formed by evaporation of SiO is too poor to be used as gate oxide. Unlike the commercial SiO powder, the newly developed SiO nanopowder, made by thermal CVD using SiH₄ and O₂, consists of spherical particles with sizes less than 50 nm. It does not contain any Si nanocrystals but small molecular Si networks. Such molecular Si networks are easily thermally or optically decomposed. This makes the deposited oxide more free from Si nanocrystals, which usually degrade the insulating property of the oxide. The SiO₂ thin films formed by evaporation of the SiO nanopowder have demonstrated great potential for application to MOSFETs on plastic substrates and GaN epilayers.     

Properties of thin oxide-nitride-oxide stacked films

Electronic conduction, charge trapping and dielectric breakdown were studied on thin stacked layers of SiO₂-Si₃N₄-SiO₂ with Al or poly-Si gate on Si. Conductivity and breakdown strength are roughly the same as observed on single SiO₂ films but the average dielectric constant is higher than that for SiO₂. Stacks with plasma CVD SiO₂ layers show somewhat poorer breakdown strengths than those with thermally grown SiO₂ films. The charging behavior of the stacks is more pronounced than that of single films. Moreover, they break down at a lower total injected charge.     

Fabrication of Ge-MOS capacitors with high quality interface by ultra-thin SiO2/GeO2 bi-layer passivation combined with the subsequent SiO2-depositions using magnetron sputtering

Ge-MOS capacitors were fabricated by a novel method of ultra-thin SiO₂/GeO₂ bi-layer passivation (BLP) for Ge surface combined with the subsequent SiO₂-depositions using magnetron sputtering. For the Ge-MOS capacitors fabricated by BLP with O₂, to decrease oxygen content in the subsequent SiO₂ deposition is helpful for improving interface quality. By optimizing process parameters of the Ge surface thermal cleaning, the BLP, and the subsequent SiO₂ deposition, interface states density of 4 × 10¹¹ cm⁻² eV⁻¹ at around mid-gap was achieved, which is approximately three times smaller than that of non-passavited Ge-MOS capacitors. On the contrary, for the Ge-MOS capacitors fabricated by BLP without O₂, interface quality could be improved by an increase in oxygen contents during the subsequent SiO₂ deposition, but the interface quality was worse compared with BLP with O₂.     

Highly concentrated ozone gas supplied at an atmospheric pressure condition as a new oxidizing reagent for the formation of SiO2 thin film on Si

We have investigated the characteristics of silicon oxidation by concentrated ozone gas through the comparison of the oxidation by oxygen molecules. A sophisticated high-concentration ozone generator, which exploits the ozone/oxygen gas separation technique with silica gel, has been developed for the study. The generator can continuously supply ozone-oxygen mixtures with ozone concentrations up to 30 at.% at one atmospheric pressure. Ozone gas with a concentration of 25 at.% from the generator formed SiO₂ films as thick as 2 nm and 6 nm on Si for a 30 min. exposure at 200°C and 600°C, respectively. On the other hand, oxygen gas by itself could form SiO₂ films with only 1 nm and 3 nm thickness, respectively, at the same conditions. Moreover, in the oxide film formation at 600°C, the oxide film growth by ozone was proceeded with an oxidation time in excess of 240 min., while it saturated within very short time in the oxidation by oxygen. These phenomena verify the strong oxidation power of ozone. In addition, we confirmed that the growth rate of the silicon oxide with ozone dramatically changed when the substrate temperature was over 500°C, and this suggested the change of oxidation mechanism at this point. However, such a characteristic was not found in oxidation with oxygen.     

Oxidation through the zirconia substrates of heteroepitaxial silicon films Grown on yttria-stabilized cubic zirconia

We demonstrate the thermal oxidation of the Si side of the interface in epitaxial Si films grown on yttria-stabilized cubic zirconia, 〈Si〉/〈YSZ〉, to form a dual-layer structure of 〈Si〉 /amorphous SiO₂/〈YSZ〉. The SiO₂ films are formed in either dry oxygen (at 1100‡C) or in pyrogenic steam (at 925‡C) by the rapid diffusion of oxidizing species through the 425 Μm thick cubic zirconia substrate. For instance, a 0.17 Μm thick SiO₂ layer is obtained after 100 min in pyrogenic steam at 925‡C. This relatively easy transport of oxidants is unique to YSZ and other insulators which are also superionic oxygen conductors, and cannot be achieved in other existing Si/insulator systems, such as Si-on-sapphire. The present process eliminates the most     

Electrical characterization of high-k gate dielectrics fabricated using plasma oxidation and post-deposition annealing of a Hf/SiO2/Si structure

High permittivity (high-k) gate dielectrics were fabricated using the plasma oxidation of Hf metal/SiO₂/Si followed by the post-deposition annealing (PDA), which induced a solid-phase reaction between HfO_x and SiO₂. The oxidation time and PDA temperature affected the equivalent oxide thickness (EOT) and the leakage current density of the high-k dielectric films. The interfacial structure of the high-k dielectric film/Si was transformed from HfO_x/SiO₂/Si to HfSi_xO_y/Si after the PDA, which led to a reduction in EOT to 1.15 nm due to a decrease in the thickness of SiO₂. These high-k dielectric film structures were investigated by X-ray photoelectron spectroscopy. The leakage current density of high-k dielectric film was approximately four orders of magnitude lower than that of SiO₂.     

Optimization of pretreatment for liquid-phase deposition of SiO<Subscript>2</Subscript> on ARTON plastic substrate

This study extends our previous work on liquid-phase deposition (LPD) of dense, high-quality, silicon-dioxide (SiO₂) films deposited on Si and GaAs substrates from supersaturated, hexafluorosilicic-acid aqueous at near room temperature. Pretreatment to coat the substrate surface with hydroxyl groups was found to be necessary for rapid and high-quality growth. More recent work has extended the range of LPD SiO₂ to plastic. The current paper studies optimal LPD pretreatment of a plastic (ARTON) substrate. It is shown that treating ARTON plastic, first, by exposure to oxygen plasma, second, by potassium manganese (KMnO₄) etching, and finally, by H₂O₂ etching, provides the plastic surface with rich OH-radical formation. The resulting SiO₂/ARTON film is of good quality and reliability. Deposition rate is up to 659 Å/h, and the refractive index is about 1.44 with growth at 40°C. A growth mechanism for LPD-SiO₂ deposition on plastic is proposed.     

1.2 nm capacitance equivalent thickness gate stacks on Si-passivated GaAs

Experiments to increase the specific capacitance of MOS capacitors consisting of HfO₂ on a passivating interfacial layer (IL) of amorphous Si (a-Si) on GaAs are described. XPS analysis of the layers and electrical measurements on the capacitors are combined to study the evolution of the gate stack during deposition and subsequent heat treatments. It is shown that oxidation of the a-Si IL is a major factor in preventing the attainment of a scaled capacitance equivalent thickness (CET). By controlling the deposition of the layers, the gate metal and the heat treatments, a highly scaled gate stack with a CET of 1.2 nm and a leakage reduction of more than 4 orders of magnitude with respect to SiO₂/Si was realized.     

Silicon nanowire NVM cell using high-k dielectric charge storage layer

Si nanowire (SiNW) channel non-volatile memory (NVM) cells were fabricated by a “self-alignment” process. First, a layer of thermal SiO₂ was grown on a silicon wafer by dry oxidation, and the SiNWs were then grown by chemical vapor deposition in pre-defined locations. This was followed by depositing the gate dielectric, which almost surrounds the nanowire and consists of three stacked layers: SiO₂ blocking layer, HfO₂ charge-storing layer and a thin tunneling oxide layer. Source/drain and gate electrodes were formed by photolithography and lift-off, and the devices were electrically tested. As expected from this fabrication process and the enhanced electrostatic control of the “surrounding” gate, excellent cell characteristics were obtained.     

MOS device fabrication using sputter-deposited gate oxide and polycrystalline silicon layers

For applications in the MOS device fabrication the interface properties of sputtered SiO₂ and SiO₂-polycrystalline silicon layers on silicon substrates were investigated and improved to a quality which is equivalent to those of thermally grown SiO₂ with pyrolytical polycrystalline silicon (polySi). For testing these layers as gate oxide and Si electrodes of MOS transistors the well known Si gate process was varied to include sputter deposition and the optimal deposition, annealing and diffusion parameters were integrated.MOS transistors with sputtered SiO₂ and Si gate material layers and for comparison Al gate devices with sputtered SiO₂ have been fabricated and their threshold voltage behavior was tested.     

直接光CVD SiO2膜的沉积动力学

讨论了     

Deposition and characterization of Pb TiO3 thin films on silicon wafers using metalorganic sources

Ferroelectric PbTiO₃ thin films were deposited on bare silicon and Pt/SiO₂/Si substrates by metalorganic chemical vapor deposition in a temperature range from 270 to 550°C. The deposition of a single phase PbTiO₃ thin film did not occur on bare silicon substrates. Instead a double layer of lead-silicate and PbTiO₃ was formed owing to a serious diffusion of lead and oxygen ions into silicon substrates. But on Pt/SiO₂/Si substrates, a single phase PbTiO₃ oriented parallel to a-and c-axis was grown at a substrate temperature as low as 350°C even without a high temperature post-annealing. To get an optimal film, a precise control of input gas composition and also a deposition in a low temperature range from 350 to 400°C are necessary.     

Optical absorption studies of Si implanted SiO2

Optical absorption of Si implanted SiO₂ is characterized as a function of implant dose and energy upon annealing in N₂, H₂ and O₂ ambients. Interpretation of optical data yields information regarding the structure of defects due to excess Si. These defects are responsible for the memory effect and enhanced conductivity previously reported for Si implanted SiO₂. A correlation between E-band absorption (Si-Si ‘wrong’ bond defect) intensity and the amount of excess Si was established. Annealing of this band in O₂ is diffusion-limited with a reaction cross-section of 5.10⁻¹⁵ cm². Compressive strain-induced, oxygen diffusivity-retardation was observed. The C-band absorption (relaxed oxygen vacancy defect) observed in this study is unique in its response to heat treatment in N₂ and H₂ since it does not anneal in these ambients. C-band annealing kinetics in O₂ closely parallel those of E-band. B₂-band absorption (unrelaxed oxygen vacancy defect) produced by Si implantation is very similar in its annealing properties to the published data.     

Investigation of strontium tantalate thin films for high-k gate dielectric applications

Strontium tantalate (STO) films were grown by liquid-delivery (LD) metalorganic chemical vapor deposition (MOCVD) using Sr[Ta(OEt)₅(OC₂H₄OMe)]₂ as precursor. The deposition of the films was investigated in dependence on process conditions, such as substrate temperature, pressure, and concentration of the precursor. The growth rate varied from 4 to 300 nm/h and the highest rates were observed at the higher process temperature, pressure, and concentration of the precursor. The films were annealed at temperatures ranging from 600 to 1000 °C. Transmission electron microscopy (TEM), X-ray diffraction (XRD), and ellipsometry indicated that the as-deposited and the annealed films were uniform and amorphous and a thin (>2 nm) SiO₂ interlayer was found. Crystallization took place at temperatures of about 1000 °C. Annealing at moderate temperatures was found to improve the electrical characteristics despite different film thickness (effective dielectric constant up to 40, the leakage current up to 6×10⁻⁸ A/cm², and lowest midgap density value of 8×10¹⁰ eV⁻¹ cm⁻²) and did not change the uniformity of the STO films, while annealing at higher temperatures (1000 °C) created voids in the film and enhanced the SiO₂ interlayer thickness, which made the electrical properties worse. Thus, annealing temperatures of about 800 °C resulted in an optimum of the electrical properties of the STO films for gate dielectric applications.     

Effects of oxygen doping on properties of microcrystalline silicon film grown using rapid thermal chemical vapor deposition

An oxygen doped microcrystalline silicon (μc-Si) deposition process is developed by mixing small amounts of nitrous oxide (N₂O) with silane (SiH₄) in a rapid thermal chemical vapor deposition (RTCVD) reactor. The effects of oxygen doping on the properties of RTCVD μc-Si films are studied. Experimental results show that the RTCVD process provides high deposition rates for μc-Si and polycrystalline silicon (polySi) films at elevated deposition temperatures and pressures. The surface roughness of the RTCVD μc-Si films can be significantly reduced compared to that of conventional LPCVD polySi films. Steep side walls can be realized due to the small grain size of the μc-Si films. The sheet resistance of BF₂ doped μc-Si films is slightly higher than that of BF₂ doped polySi films, whereas sheet resistances of P and As doped μc-Si films are much higher than those of the corresponding P and As doped polySi films. Measurements of the catastrophic breakdown strength of metal-oxide-semiconductor (MOS) capacitors indicate that the quality of gate electrodes fabricated using μc-Si is improved relative to that of MOS capacitors fabricated using polySi gate electrodes.     

Formation of aluminum oxide films from aluminum hexafluoroacetylacetonate at 350–450° c

A study of the thermally activated decomposition of Al(hfa)₃ (aluminum hexafluoroacetylacetonate) from the gas phase to form Al₂O₃ on silicon substrates is reported. The decomposition process was carried out in an open tube atmospheric pressure reactor in either argon or oxygen/argon mixtures in the temperature range, 350–450° C. The chemical vapor deposition process resulted in the formation of aluminum oxide films in all instances. The dielectric strength of Al/Al₂O₃/Si capacitors which received a post-metal anneal, but did not receive a high temperature annealing treatment, with aluminum oxide films prepared from Al(hfa)₃ in argon, was found to be in the range 2–6 MV/cm. The difference between the flatband voltage of the MOS structures and the metal-silicon work function difference was positive, indicative of a net negative oxide charge with a density of approximately 3 × 10¹¹ – 3 × 10¹² cm^-2, assuming the charge is located at the oxide-silicon interface. Decomposition of Al(hfa)₃ was also carried out in oxygen/argon mixtures with the oxygen concentration in the range 10–60 vol %. This process led to the deposition of aluminum oxide films with breakdown fields in the range 8–9 MV/cm. However, the flatband voltages of the Al/Al₂O₃/Si capacitors were even more positive than those obtained with Al₂O₃ formed in pure argon. High temperature (800–1000° C) oxygen or nitrogen annealing treatments of alumina films deposited in either argon or oxygen/argon mixtures were evaluated from the point of view of their influence on the oxide film properties. In particular, an annealing process in oxygen at 1000° C for 15 min was found to result in a reduction of the net negative oxide charge, and an improvement of the dielectric strength of films deposited in argon. Films formed in oxygen/argon mixtures did not change appreciably following oxygen annealing, as far as breakdown fields are concerned, but the oxide net negative charge was reduced. As in an earlier study by the authors, of copper film deposition from Cu(hfa)₂, it was found that essentially carbon free films could be obtained under appropriate conditions.     

Investigation of atomic vapour deposited TiN/HfO2/SiO2 gate stacks for MOSFET devices

HfO₂ films were grown by atomic vapour deposition (AVD) on SiO₂/Si (1 0 0) substrates. The positive shift of the flat band voltage of the HfO₂ based metal-oxide-silicon (MOS) devices indicates the presence of negative fixed charges with a density of 5 × 10¹² cm⁻². The interface trap charge density of HfO₂/SiO₂ stacks can be reduced to 3 × 10¹¹ eV⁻¹ cm⁻² near mid gap, by forming gas annealing. The extracted work function of 4.7 eV preferred the use of TiN as metal gate for PMOS transistors. TiN/HfO₂/SiO₂ gate stacks were integrated into gate-last-formed MOSFET structures. The extracted maximum effective mobility of HfO₂ based PMOS transistors is 56 cm²/Vs.