Comparison of electrical and reliability characteristics ofdifferent 14 Å oxynitride gate dielectrics

A comparison of RTNO, N₂O and N₂O-ISSG ultrathin oxynitride gate dielectrics fabricated by combining a remote plasma nitridation (RPN) treatment with equal physical oxide thickness of 14 Å is explored. The N₂O-ISSG oxynitride gate dielectric film demonstrates good interface properties, higher mobility and excellent reliability. This film by RPN treatment is thus attractive as the gate dielectric for future ultra-large scale integration (ULSI) devices     

Optimization of gate oxide N2O anneal for CMOSFET's atroom and cryogenic temperatures

This paper presents a study of the impact of gate-oxide N₂ O anneal on CMOSFET's characteristics, device reliability and inverter speed at 300 K and 85 K. Two oxide thicknesses (60 and 110 Å) and five N₂O anneal conditions (900~950°C, 5~40 min) plus nonnitrided process and channel lengths from 0.2 to 2 μm were studied to establish the correlation between the nitrogen concentration at Si/SiO₂ interface and the relative merits of the resultant devices. We concluded that one simple post-oxidation N₂O anneal step can increase CMOSFET's lifetime by 4~10 times, effectively suppress boron penetration from the P⁺ poly-Si gate of P-MOSFET's without sacrificing CMOS inverter speed. We also found that the benefits in terms of the improved interface hardness and charge trapping characteristic still exist at cryogenic temperature. All these improvements are found to be closely correlated to the nitrogen concentration incorporated at the Si/SiO₂ interface. The optimal N₂O anneal occurs somewhere at around 2% of nitrogen incorporation at Si/SiO₂ interface which can be realized by annealing 60~110 Å oxides at 950°C for 5 min or 900°C for 20 min     

Electrical properties of MOSFET's with N2O-nitridedLPCVD SiO2 gate dielectrics

Electrical properties of MOSFETs with gate dielectrics of low-pressure chemical-vapor-deposited (LPCVD) SiO₂ nitrided in N₂O ambient are compared to those with control thermal gate oxide. N₂O nitridation of CVD oxide, combines the advantages of interfacial oxynitride growth and the defectless nature of CVD oxide. As a result, devices with N₂O-nitrided CVD oxide show considerably enhanced performance (higher effective electron mobility), improved reliability (reduced charge trapping, interface state generation, and transconductance degradation), and better time-dependent dielectric breakdown (TDDB) properties (t_BD ) compared to devices with control thermal oxide     

Post-polysilicon gate-proces-induced degradation on thin gate oxide

The post-polysilicon gate-process-induced degradation on the underlying gate oxide is studied. The degradation includes an increase in the electron trapping rate and a decrease in the charge-to-breakdown, Q_bd, of the gate oxide. It is found that N₂O nitrided gate oxide is more robust than O₂ gate oxide in resisting the degradation. Also, to grow a thin polyoxide on the polysilicon-gate in N₂O rather than in O₂ lessens the degradation on the underlying gate oxide. It is nitrogen, which diffuses through the polysilicon gate and piles up at both polysilicon/oxide and oxide/silicon-substrate interfaces, that improves the oxide quality for the N₂O process     

High-field breakdown in thin oxides grown in N2O ambient

A detailed study of time-dependent dielectric breakdown (TDDB) in N₂O-grown thin (47-120 Å) silicon oxides is reported. A significant degradation in breakdown properties was observed with increasing oxide growth temperatures. A physical model based on undulations at the Si/SiO₂ interface is proposed to account for the degradation. Accelerated breakdown for higher operating temperatures and higher oxide fields as well as thickness dependence of TDDB are studied under both polarities of injection. Breakdown under unipolar and bipolar stress in N₂O oxides is compared with DC breakdown. An asymmetric improvement in time-to-breakdown under positive versus negative gate unipolar stress is observed and attributed to charge detrapping behavior in N₂O oxides. A large reduction in time-to-breakdown is observed under bipolar stress when the thickness is scaled below 60 Å. A physical model is suggested to explain this behavior. Overall, N₂O oxides show improved breakdown properties compared with pure SiO₂     

High-field-induced leakage in ultrathin N2O oxides

Stress-induced leakage current (SILC) is studied in ultrathin (~50 Å) gate oxides grown in N₂O or O₂ ambient, using rapid thermal processing (N₂O oxide or control oxide, respectively). MOS capacitors with N₂O oxides exhibit much suppressed SILC compared to the control oxide for successive ramp-up, constant voltage DC, and AC (bipolar and unipolar) stresses. The mechanism for SILC is discussed, and the suppressed SILC in N₂O oxide is attributed to suppressed interface state generation due to nitrogen incorporation at the Si/SUO₂ interface during N₂O oxidation     

Time-dependent dielectric breakdown characteristics ofN2O oxide under dynamic stressing

Time-dependent dielectric breakdown (TDDB) characteristics of MOS capacitors with thin (120-Å) N₂O gate oxide under dynamic unipolar and bipolar stress have been studied and compared to those with control thermal gate oxide of identical thickness. Results show that N₂O oxide has significant improvement in t _BD (2×under-V_g unipolar stress, 20×under+V_g unipolar stress, and 10×under bipolar stress). The improvement of t_BD in N₂O oxide is attributed to the suppressed electron trapping and enhanced hole detrapping due to the nitrogen incorporation at the SiO₂/Si interface     

Effects of growth temperature on TDDB characteristics of N2O-grown oxides

Effects of oxide growth temperature on time-dependent dielectric breakdown (TDDB) characteristics of thin (115 Å) N₂O-grown oxides are investigated and compared with those for conventional O₂-grown SiO₂ films with identical thickness. Results show that TDDB characteristics of N₂O oxides are strongly dependent on the growth temperature and, unlike conventional SiO₂, TDDB properties are much degraded for N ₂O oxides with an increase in growth temperature. Large undulations at the Si/SiO₂ interface, caused by locally retarded oxide growth due to interfacial nitrogen, are suggested as a likely cause of degradation of TDDB characteristics in N₂O oxides grown at higher temperatures     

Electrical properties of composite gate oxides formed by rapidthermal processing

In this study, oxide stacks formed by combinations of rapid thermal chemical vapor deposition and rapid thermal oxidation have been investigated as gate dielectrics. This was achieved by performing various types of in situ rapid thermal oxidations both prior to and after oxide deposition to form composite stacked structures. The oxidation ambient and temperature was varied to study the effect on electrical properties such as mobility, leakage current, charge trapping, breakdown and hot carrier degradation. It was found that pre-oxidation prior to depositing an oxide results in a composite structure that greatly reduces the defect density by mismatching pores and weak spots in each film. The mobility behavior of these films was also found to be improved over as-deposited oxides. Post-deposition oxidation in O₂ and N₂O was also found to improve the mobility characteristics. Additionally, post-annealing in N₂ O was effective in improving the reliability of deposited oxides. These N₂O annealed films had low interface trap densities, improved high field mobility, very low charge trapping characteristics and enhanced resistance to hot carrier induced interface state generation. These improvements are attributed to 1) the presence of nitrogen at the interface and 2) to the reduction of nitrogen and hydrogen concentrations in the bulk of the oxide. The role of atomic oxygen during the post-anneal in N₂O is discussed along with differences in annealing ambients     

Effects of wet N2O oxidation on interface properties of6H-SiC MOS capacitors

Oxynitrides were grown on n- and p-type 6H-SiC by wet N₂O oxidation (bubbling N₂O gas through deionized water at 95°C) or dry N₂O oxidation followed by wet N₂O oxidation. Their oxide/SiC interfaces were investigated for fresh and stressed devices. It was found that both processes improve p-SiC/oxide but deteriorate n-SiC/oxide interface properties when compared to dry N₂O oxidation alone. The involved mechanism could be enhanced removal of unwanted carbon compounds near the interface due to the wet ambient, and hence a reduction of donor-like interface states for the p-type devices. As for the n-type devices, incorporation of hydrogen-related species near the interface under the wet ambient increases acceptor-like interface states. In summary, wet N ₂O oxidation can be used for providing comparable reliability for nand p-SiC MOS devices, and especially for obtaining high-quality oxide-SiC interfaces in p-type MOS devices     

P-channel MOSFET's with ultrathin N2O gate oxides

The performance and reliability of p-channel MOSFETs utilizing ultrathin (~62 Å) gate dielectrics grown in pure N₂O ambient are reported. Unlike (reoxidized) NH₃-nitrided oxide devices, p-MOSFETs with N₂O-grown oxides show improved performance in both linear and saturation regions compared to control devices with gate oxides grown in O₂. Because both electron and hole trapping are suppressed in N₂O-grown oxides, the resulting p-MOSFETs show considerably enhanced immunity to channel hot-electron and -hole-induced degradation (e.g., hot-electron-induced punchthrough)     

Electrical properties of N2O/NH3 plasma grownoxynitride on strained-Si

Growth of ultrathin (<100 Å) oxynitride on strained-Si using microwave N₂O and NH₃ plasma is reported. X-ray photoelectron spectroscopy (XPS) results indicate a nitrogen-rich layer at the strained-Si/SiO₂ interface. The electrical properties of oxynitrides have been characterized using a metal-insulator-semiconductor (MIS) structure. A moderately low value of insulator charge density (6.1×10¹⁰ cm^-2) has been obtained for NH₃ plasma treated N₂O oxide sample. Nitrided oxide shows a larger breakdown voltage and an improved charge trapping properties under Fowler-Nordheim (F-N) constant current stress     

Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride andnitrided oxide dielectrics

Ultrathin oxynitride using plasma assisted deposition was evaluated against thermal oxide and nitrided thermal oxide as an alternative direct tunneling gate dielectric to thermal oxide in the 2.5-nm regime. The oxynitride showed an enhanced high field effective mobility relative to the thermal oxide although the low field mobility was slightly depressed. The N₂O nitrided oxide showed an enhanced high field effective mobility with no degradation in low field mobility. The interface state density of the oxynitride was equivalent to that of the thermal and nitrided thermal oxides; a very welcome observation for this deposition chemistry and anneal conditions     

A novel technique of N2O-treatment onNH3-nitrided oxide as gate dielectric for nMOS transistors

A novel technique of N₂O treatment on NH₃-nitrided oxide is used to prepare thin gate oxide. Experiments on MOS capacitors and nMOSFET's with this kind of gate dielectric show that N₂O treatment is superior to conventional reoxidation step in suppressing both electron and hole trappings and interface trap creation under high-field stress. Interface hardness against hot-carrier bombardment and neutral electron trap generation are also improved. Thus, N₂O treatment on NH₃ -nitrided oxide shows excellent electrical and reliability properties, while maintaining sufficiently high nitrogen concentration in gate oxide which offers good resistance to dopant penetration     

MOS characteristics of ultrathin SiO2 prepared byoxidizing Si in N2O

MOS characteristics of ultrathin gate oxides prepared by furnace oxidizing Si in N₂O have been studied. Compared to control oxides grown in O₂, N₂O oxides exhibit significantly improved resistance to charge trapping and interface state generation under hot-carrier stressing. In addition, both charge to breakdown and time to breakdown are improved considerably. MOSFETs with N₂O gate dielectrics exhibit enhanced current drivability and improved resistance to g_m degradation during channel hot-electron stressing     

Effects of N2O anneal and reoxidation on thermal oxidecharacteristics

The effects of post-oxidation N₂O anneal on conventional thermal oxide are studied. The oxide thickness increase resulting from N₂O anneal is found to be self-limiting and insensitive to initial oxide thickness, which makes the thickness of the resulting oxide easy to control. The N₂O anneal leads to increased resistance against injection-induced interface-state generation and to reduced hole trapping. No further quality improvement is found when the N₂O-annealed oxide is subject to an additional reoxidation. This finding confirms that nitrogen incorporation in the absence of hydrogen is responsible for improving the quality of the conventional oxides     

Investigation of hole-tunneling current through ultrathinoxynitride/oxide stack gate dielectrics in p-MOSFETs

The systematic investigation of hole tunneling current through ultrathin oxide, oxynitride, oxynitride/oxide (N/O) and oxide/oxynitride/oxide (ONO) gate dielectrics in p-MOSFETs using a physical model is reported for the first time. The validity of the model is corroborated by the good agreement between the simulated and experimental results. Under typical inversion biases (|VG|<2 V), hole tunneling current is lower through oxynitride and oxynitride/oxide with about 33 at.% N than through pure oxide and nitride gate dielectrics. This is attributed to the competitive effects of the increase in the dielectric constant, and hence dielectric thickness, and decrease in the hole barrier height at the dielectric/Si interface with increasing with N concentration for a given electrical oxide thickness (EOT). For a N/O stack film with the same N concentration in the oxynitride, the hole tunneling current decreases monotonically with oxynitride thickness under the typical inversion biases. For minimum gate leakage current and maintaining an acceptable dielectric/Si interfacial quality, an N/O stack structure consisting of an oxynitride layer with 33 at.% N and a 3 Å oxide layer is proposed. For a p-MOSFET at an operating voltage of -0.9 V, which is applicable to the 0.7 μm technology node, this structure could be scaled to EOT=12 Å if the maximum allowed gate leakage current is 1 A/cm² and EOT=9 Å if the maximum allowed gate leakage current is 100 A/cm²     

Reduction of RIE-damage by N2O-anneal of thermal gateoxide

We have investigated RIE-induced damage in MOS devices with thermal oxide as well as N₂O-annealed oxide as gate dielectrics. A systematic improvement in robustness against RIE-induced damage is seen when N₂O flow rate and/or N₂O anneal temperature are increased. We have demonstrated a N₂O anneal process at 900°C, which provides a robust SiO₂/Si interface against plasma damage and hot carrier stress     

Improvement of charge trapping characteristics ofN2O-annealed and reoxidized N2O-annealed thinoxides

It is found that increasing N₂O annealing temperature and time monotonically reduces electron trapping in the resulting oxides. The improvement increases with oxide thickness. Reoxidation does not enhance but reduces the improvement. The behavior is different from and simpler to understand than that after NH₃ annealing, apparently due to the absence of deleterious hydrogen. Hole trapping and interface trap generation are also suppressed by N₂O annealing, though an optimum anneal condition may exist. Charge to breakdown exhibits modest improvement consistent with reduced electron trapping     

Electrical characteristics of highly reliable ultrathin hafniumoxide gate dielectric

Electrical and reliability properties of ultrathin HfO₂ have been investigated. Pt electroded MOS capacitors with HfO₂ gate dielectric (physical thickness ~45-135 Å and equivalent oxide thickness ~13.5-25 Å) were fabricated. HfO₂ was deposited using reactive sputtering of a Hf target with O₂ modulation technique. The leakage current of the 45 Å HfO₂ sample was about 1×10^-4 A/cm ² at +1.0 V with a breakdown field ~8.5 MV/cm. Hysteresis was <100 mV after 500°C annealing in N₂ ambient and there was no significant frequency dispersion of capacitance (<1%/dec.). It was also found that HfO₂ exhibits negligible charge trapping and excellent TDDB characteristics with more than ten years lifetime even at V_DD=2.0 V