A dual rail circuits synthesis environment for the implementation of multiple output boolean functions

This paper presents an integrated CAD system for synthesizing high-performance dual rail circuits using DCVS logic. The proposed techniques exploit ROBDDs to provide efficient DCVS trees that fulfill the design rules and constraints. Sharing of common transistor structures is examined to decrease further the overall device count and chip area by improving the wirability of DCVS circuits. This is accomplished by generating a common variable ordering that permits identification of common subcircuits and simplification of routing procedures by enhancing straight-line wiring of input signals. The paper also presents the integration steps that are undertaken for importing the developed tools into Alliance CAD system, in order to provide a complete and consistent DCVS circuits synthesis environment and methodology. Moreover, experimental results showed that the proposed algorithms, which are time and memory efficient, produce near optimal device counts improving placement and routing procedures. The integrated design framework, which is available for academic and research purposes, has been employed to synthesize, simulate and layout a programmable 16-bit serial/parallel multiplier as a complete DCVS circuit synthesis example. © 1998 John Wiley & Sons, Ltd.     

A systematic class AB state space synthesis method based on MOSFET square law and translinear square‐root cells

A new state space Class AB synthesis method for the design of square‐root domain filter based on the MOSFET square law is proposed in this study. Those circuits designed by the proposed Class AB systematic synthesis method have the advantages of Class AB circuit structure and translinear circuits. Two alternative design procedures were suggested for designing new circuits. Proposed synthesis technique is applied for designing of a first order all‐pass filter and a third order low‐pass filter. Circuits are simulated in PSpice using 0.35 µm CMOS technology parameters. Time domain and frequency domain analysis of the proposed filters are performed, and simulation results of those are also presented. The simulation results show that the proposed synthesis technique is appropriate for the design of different types of filters and has the advantages of Class AB circuit structure. Copyright © 2015 John Wiley & Sons, Ltd.     

Optical modeling of waveguide photonic nanostructures using theradiation spectrum method (RSM) with evanescent modes

In this work, we study the effects of the evanescent modes in the simulation and modeling of optical integrated circuits based on photonic bandgap structures. We show that the contribution of these modes in the energy transfer in structures like the MOEM structures, can not be neglected. The radiation spectrum method, recently developed by the authors for the guided wave devices, is thus extended to account for the evanescent mode propagation. Applying this technique on an air-gap in a suspended waveguide a model of this gap is developed in terms of its parameters. This model is then integrated in an all optical simulator to predict the performance of photonic structures. Such technique enables to design and to optimize the photonic integrated circuits taking the evanescent modes effects into account     

Linear circuits: a measurement‐based approach

This paper proposes a new measurement‐based approach that can solve synthesis problems in unknown linear circuits. The method makes use of a small number of measurements to determine the functional dependency of any circuit signal or variable on any set of design variables. Once the functional dependency is obtained, the design requirements can be applied to find the design parameter values. The results are described for linear direct current and alternating current circuits. Copyright © 2013 John Wiley & Sons, Ltd.     

On the systematic synthesis of CCII‐based floating simulators

This paper is adopting a new approach in the systematic synthesis of CCII‐based floating simulators. The synthesis procedure is based on the generalized systematic synthesis framework for active circuits using admittance matrix expansion. The resulting derived floating simulators include circuits that have been reported earlier in the literature in addition to novel floating simulators using various types of CCII. The synthesized floating simulators can be used to realize floating coils, FDNRs, and resistance and capacitance multipliers; according to the types of passive elements employed in the design. The potentials and drawbacks of every one of the synthesized circuits vary according to the design tradeoffs including complexity, number of active devices, number and values of grounded and floating passive elements, matching requirements, and tunability. SPICE simulations are presented to verify the performance of the new circuits obtained by systematic synthesis and hence demonstrate the potentials of the generalized synthesis framework in producing novel circuits with high performance. Copyright © 2009 John Wiley & Sons, Ltd.     

Microwave filter design by synthesis and optimization

In this article, a process that might be described as "synthesis and approximation" was outlined. Starting from an exact prototype, the desired physical configuration using equivalent circuits and corrections to the resonators due to the influence of the coupling networks was approximated. A process that might be described as "approximation and optimization" was also outlined. Starting from an approximate filter network, optimization can be used to find an exact equal ripple solution. The starting point can be generated using synthesis or narrow-band approximations when appropriate. Applying optimization in an intelligent way allows the designer to circumvent some of the limitations of the classic ladder synthesis method. This article explores some ways to mix approximate filter dimensioning (based on network synthesis) and optimization (based on EM modeling), allowing a fast and accurate design of microwave filters     

Narrow-band stripline filters with transmission zeros at finite frequencies

A design method is described to realize narrow-band stripline or microstrip bandpass filters having one transmission zero near to the upper and lower bandedge. The filters utilize capacitively coupled open half-wave TEM-line resonators. Two nonadjacent resonators are also inductively coupled. No short circuits are needed. The design is based on the approximate or exact synthesis of the lowpass protoype presented by Levy. The transmission line parameters are obtained easily from the design formulae which have been derived using the susceptance (or reactance) slope parameter technique. The filter performance is good up to 12 per cent bandwidth. Measured results show good agreement with the theoretical ones.     

A design of MOSFET‐C impedance simulation circuits based on a GIC

This paper proposes a systematic design method of MOSFET‐C impedance simulation circuits based on a generalized immittance converter (GIC). The design method can realize inductance simulation circuits, capacitance multipliers and frequency‐dependent negative resistances (FDNRs) only by MOSFETs, capacitors and two operational amplifiers. Although MOSFETs are used instead of passive resistors, the realized impedance simulation circuits have good linearity since the nonlinearity caused by MOSFETs are cancelled out. The proposed design method derives three inductance simulation circuits, five capacitance multipliers and two FDNRs systematically from a GIC. All of them are summarized in this paper. As an example, inductance simulation circuits are designed by using the proposed design method. The inductance simulation circuits are applied to a filter realization and validity of the design method is confirmed by HSPICE simulations. Copyright © 2007 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Design of improved‐reliability nanocircuits with mixed NBTI‐ and HCI‐aware gate‐sizing formulation

Negative bias temperature instability (NBTI) and hot carrier injection (HCI) are two important processes of reliability concern in nano‐scale integrated circuits. A circuit‐level design technique to combat NBTI degradation is gate oversizing. This paper presents a new technique based on PMOS and NMOS resistance variation for the NBTI‐ and HCI‐aware gate‐sizing problem for the first time. In this technique, the area of the circuit is minimized with constraints on degraded delay due to NBTI and HCI and the transitor size. Expreimental results for several gates and ISCAS'85 benchmark circuits show that this technique imposes an area overhead of less than 1% with respect to baseline design in most cases. © 2013 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

The QP Triangle: A Graphical Method for Bias Design

A graphical design procedure is presented based upon a QP triangle for the design of bipolar transistor (BJT) bias circuits. The design technique stresses quiescent point (QP) location on the IC-VCE characteristics and considers the effects of simultaneous variations in the BJT parameters hFE, VBE, and ICO upon QP location. The QP triangle method is developed for the standard one-battery BJT CE stage discussed in many introductory electronic circuits textbooks. The QP triangle method is applied to a specific CE stage which has to meet certain design specifications. One important specification is that the circuit must operate over the temperature range 25-100°C with silicon N-P-N BJT's having values of h 40 and hFE 100°C) < 200. The available tradeoffs between the peak-to-peak voltage Vpp and the current gain AI are stressed and the best available design is selected. The performance of the selected design was simulated on a digital computer and measured in the laboratory. Both the computer simulation and the experiment are in good agreement with the design. The QP triangle method has been used in an introductory electronic circuits course with success for several years. Students understand this graphical design procedure and are able to apply it. It is recommended for beginning electronics students. An interactive computer program AMPDSN to aid students and instructors design the standard one-battery BJT CE stage is also described. An algorithm based upon the QP triangle is used. The program language is Basic.     

Advanced Electromagnetic Modelling of Multilayer Monolithic Microwave Integrated Circuit

Lately considerable research activity has been centered on the development of optical and solid state components and devices which use inhomogeneous materials with a continuous variation of the electromagnetic parameters. In this contribution we consider the analysis of monolithic microwave integrated circuits (MMICs) with substrates whose relative permittivity continuously varies along the stratification axis. We propose a new, very efficient combined spectral domain-moment method formulation based on the derivation in a closed analytical form of the spectral electric dyadic Green's function. We, finally, present an application of the new technique to the design of practical, high efficient MMIC components.     

Clock gating methodologies and tools: a survey

Clock gating (CG) is a widely used design method for reducing the dynamic power consumption in digital circuits. Although it is a mature technique, theoretical work and tools for its application are still evolving and considered a matter of ongoing research, due to its significant effect in the overall power of the designs under study. This paper introduces a detailed review of the spectrum of CG approaches, theoretical and practical, from an architectural and register transfer level to synthesis, place and route, and testing issues. Furthermore, tools availability, limitations, and requirements concerning CG are examined for each design flow step. Conclusively, an evaluation of the presented techniques and literature is provided, estimating their usefulness and identifying areas for future research, exploration, and automation. Copyright © 2015 John Wiley & Sons, Ltd.     

A Map Method for the Teaching of the Fundamental Concepts of Compound-Input Logic Circuits

One class of logic circuits has inputs that are functions of fundamental variables. Other inputs may include aspects of the fundamental variables themselves. A method for improving the understanding of these circuits, based on the Karnaugh map method, is presented here. In addition to providing a teaching tool, it has advantages when used as a design technique. It will show readily when there are no possible solutions, will test easily for constraints, and will present easily optimized solutions.     

Direct analysis and synthesis of multiphase switched-current networks using signal-flow graphs

A by-inspection analysis and synthesis method for multiphase switched-current (SI) circuits using signal-flow graph (SFG) techniques is presented. The SFG is derived on the transistor level and the method is primarily useful for the hand analysis and design of small and medium-size SI circuits (e.g. SI filters, decimators, interpolators). Tables of commonly used SI circuits, in which the corresponding SFGs and circuits are given, make the derivation easy and fast. From the SFGs, not only the overall discrete-time transfer function, but also those in-between individual switching phases, are obtainable. With the proposed method it is straightforward to include non-ideal effects, such as finite output resistance of MOS transistors, clock-feedthrough and settling error. The method is also a useful tool for the synthesis of new SI circuits. It is shown that every low-sensitivity switched-capacitor (SC) circuit can be mapped directly into a low-sensitivity SI circuit with a corresponding topology. Examples of transformed SC circuits are given and two new double sampling integrators are introduced. © 1998 John Wiley & Sons, Ltd.     

基于VisSim的快速蒙特卡罗分析方法的实现

由于制造工艺和实际工作环境的影响,实际电子线路中的元器件及输入参数与其标称值之间总是存在着随机误差。在设计高精度的电子线路时,其容差分析就显得非常必要。本介绍了电子线路容差分析的基本原理。VisSim作为一种功能强大的控制系统仿真软件,其自身并不支持蒙特卡罗仿真,本提出了基于VisSim利用动态链接库的技术实现电子线路的快速蒙特卡罗分析方法。通过具体电子线路的分析,结果证明了该方法的可行性。     

低压AB类电流模电路设计

描述实现低电源电压的电流模电路的设计方法.本方法是建立偏置电路的基础上,利用多晶硅电阻和附助差分放大器,将对电源电压需求降到VT 3VDS.sat.用电流镜和跨导器的设计举例说明这种设计方法的运用.采用0.5-um工艺,PSPICE仿真结果证实上述电路在低压能力和速度上能达到期望的性能.     

断流能力试验回路的时域综合

本文介绍按IEC标准所规定的TRV(瞬态恢复电压)要求,确定断流能力试验回路拓扑结构及元件参数的对域综合法,利用这一技术获得了大容量试验室中常用的一些开断试验回路。     

Sc filters based on scattering parameters

A systematic method for the simulation of LC ladders and unit-element filters by means of switched capacitor (SC) circuits is proposed. the method is based on the use of wave equivalents of various two-port subnetworks which are now realized by the same type of SC symmetric subcircuits. These subcircuits serve as the structural unit-blocks for realizing high-order circuits. Parasitic-free circuits of practical interest can be developed. Examples of high-order circuits are given. This wave method is simple in its concept and also in the circuit design. Through the alternative solutions which are described, the flexiblity of the method is demonstrated.     

Feedback Made Easy for the Undergraduate

The increased use of linear integrated circuit amplifiers, which require feedback stabilization, has resulted in increased emphasis on teaching feedback techniques to undergraduates. This paper describes the method used at the Polytechnic Institute of Brooklyn to teach juniors how to analyze and design feedback circuits. We have found that these students can, after taking the course, analyze and design complicated feedback circuits, and test feedback amplifiers to determine (and adjust) the feedback present in an amplifier. The procedure presented in this paper is different from that used by other instructors in that we teach by example. Therefore, we do not use a block diagram approach which students have difficulty in relating to real amplifiers, but instead analyze and design actual circuits. Generality is sacrificed for clarity.