管式PECVD射频功率对氮化硅薄膜性能的影响

氮化硅薄膜作为传统的晶体硅太阳电池钝化减反膜,其性能的变化直接影响电池的转化效率。通过改变管式PECVD的射频功率,制备了不同膜厚和折射率的氮化硅薄膜,并分别进行了薄膜致密性以及硅片镀膜后少子寿命的测试。实验及测试结果表明,改变PECVD的射频功率对氮化硅薄膜的沉积速率及其薄膜的性能有重要影响。     

PECVD制备氮化硅薄膜的研究

采用PECVD法制备了氮化硅薄膜,探讨了沉积参数对氮化硅薄膜折射率的影响和衬底温度对氮化硅薄膜形貌和成分的影响规律。结果表明,不同的NH3流量可改变反应腔体内的氮硅比,对氮化硅的折射率,即减反射性能影响较大;衬底温度是影响氮化硅薄膜形貌和成分的主要因素;在衬底温度达到400℃时,形成了白色团状或岛状的氮化硅膜。     

晶体硅太阳电池的双层结构钝化膜研究

针对目前基于p型硅片制备的单结太阳电池进一步提高表面钝化膜生产效率,利用氮化硅(SiNx)薄膜良好的钝化效果与价格低廉的二氧化钛(TiO2)膜,降低SiNx镀膜厚度减薄对少子寿命的影响。在单晶硅片表面先用PECVD法沉积SiNx薄膜,然后用热喷涂沉积TiO2薄膜。对比测试了热喷涂沉积TiO2薄膜前后电池的性能,结果表明在SiNx膜上增加TiO2膜层后少子寿命明显提高,这可能是TiO2膜结构内存在固定正电荷所致。这种双层结构封装后的太阳电池显示出了较好的光学与电学性能,对进一步改进太阳电池性能具有重要参考价值。     

流量及温度对低频PECVD氮化硅薄膜性能的影响

研究了低频等离子增强化学气相沉积(LF-PECVD)工艺中气体流量比和衬底温度对氮化硅薄膜折射率、密度及应力的影响规律,同时测试了薄膜的红外光谱以分析不同条件对薄膜成分的影响.结果表明,低频氮化硅薄膜折射率主要受薄膜内硅氮元素比的影响,其次是薄膜密度的影响.前者主要由硅烷/氨气反应气体流量比决定,而后者主要由衬底温度决定;低频氮化硅薄膜应力大致与密度成正比关系.此外,PECVD工艺所制备氮化硅薄膜都含有相当数量的氢元素,而衬底温度是薄膜内氢含量的决定因素.     

真空退火对低频PECVD氮化硅薄膜性能的影响

研究了真空退火温度对不同流量比工艺参数下PECVD氮化硅薄膜性能的影响,测试了退火后氮化硅薄膜厚度、折射率以及在氢氟酸中的腐蚀速率。结果表明,退火后氮化硅薄膜厚度及折射率变化与薄膜沉积工艺条件有关,而薄膜在氢氟酸中的腐蚀速率在退火后大大降低。结合退火前后氮化硅薄膜的红外透射谱对以上测试结果进行了讨论。     

应用高频激励源制备低应力氮化硅薄膜研究

研究了在等离子体增强化学气相沉积(PECVD)法制备氮化硅薄膜时,射频功率和腔室压力对氮化硅薄膜应力的影响以及应力与沉积速率的关系。通常认为高频下制备得到的氮化硅膜呈现张应力,但是通过实验,表明即使应用高频(13.56MH z)作为激励源同样可以沉积出呈现压应力的氮化硅薄膜。并使用角度可变光谱型椭偏仪观察了薄膜的厚度和低应力氮化硅膜的m app ing图,利用傅立叶变换红外光谱仪(FT IR)对不同应力状态下的氮化硅膜的化学键结构进行了分析。     

PECVD法氮化硅薄膜制备工艺的研究

采用等离子体增强化学气相沉积法（PECVD）在单晶硅衬底上制备了氮化硅薄膜,分别使用膜厚仪、椭圆偏振仪等手段对薄膜的厚度、折射率等参数进行了表征。研究了硅烷氨气流量比、极板间距等工艺参数对氮化硅薄膜性能的影响,发现当硅烷氨气流量比增加时,薄膜厚度和折射率均随之增加,并发现退火工艺可以有效降低氮化硅薄膜的氢氟酸腐蚀速率。     

磁控溅射法制备Ag/FePt/C/FePt薄膜的结构和磁性能

采用磁控溅射法,在自然氧化的Si(001)基片上沉积了Ag/FePt/C/FePt纳米薄膜,并分别在400,450,500,600℃下对薄膜样品进行了1h的退火热处理。利用X射线衍射仪和振动样品磁强计,对薄膜样品的结构和磁性进行了分析。结果表明,当热处理温度为450℃时,Ag/FePt/C/FePt薄膜中已形成了具有有序面心四方结构的L10-FePt。随着热处理温度的升高,薄膜样品的有序化程度提高,矫顽力Hc增强,晶粒尺寸变大。当热处理温度为600℃时,薄膜样品的平行膜面Hc为905.8kA·m-1,晶粒尺寸为23nm。     

快速热处理对磁控溅射VO2薄膜光电特性的影响

采用反应磁控溅射法制备二氧化钒(VO2)薄膜,并对其进行快速热处理(RTP)。主要研究500℃快速热处理10、15、20s工艺条件下VO2薄膜结晶状况和光电性能的变化。在20℃～80℃温区内,应用四探针薄膜电阻测试方法和太赫兹时域频谱技术(THz-TDS)测量了各样品的电学相变特性和光学相变特性。结果表明,经过快速热处理的样品电学相变幅度均达到了2个数量级以上;THz波的透射率在半导体-金属相变前后的最大变化达到了57.9%。同时发现,热处理500℃,10s时VO2的电学和光学相变幅度相对要大,当热处理时间达到15s左右时薄膜的相变幅度变化不再明显。快速热处理时间的长短对热致相变温度点的影响较小,但热致电学相变和光学相变的相变温度点不同:光学相变的温度为60℃左右,电学相变温度则在56℃附近。     

变温LPCVD沉积氮化硅薄膜的均匀性优化

以低压化学气相沉积(LPCVD)热壁立式炉为实验平台,由二氯硅烷和氨通过LPCVD工艺合成氮化硅薄膜,利用降温成膜提高氮化硅薄膜的膜厚均匀度。基于气体碰撞理论建立了氮化硅薄膜沉积速率与反应气体浓度的关系式。分析比较了LPCVD炉内不同升温速率沉积氮化硅薄膜的表面性能。发现在变温沉积阶段,选择合适的降温速率是实现薄膜沉积过程中预设温度变化的关键。在保证各温度区平均膜厚和晶圆片之间膜厚均匀度基本不变的前提下,通过实验找到沉积阶段的最佳变温速率,将晶圆片内(WIW)均匀度优化到1%以下,比恒温沉积薄膜的均匀度提高了约70%。这将有助于设备工艺能力的提升,更好地适应IC芯片工艺关键尺寸的缩小趋势。     

Manufacturability issues related to transient thermal annealing oftitanium silicide films in a rapid thermal processor

Transient thermal annealing of sputtered titanium films in a rapid thermal processor (RTP) is critically evaluated from the viewpoint of manufacturability-related considerations. In particular, the thin-film properties of the resulting titanium silicide on polysilicon and silicon, process uniformity, and unit step wafer yield of high-density scaled device structures are investigated. The experimental results suggest that RTP silicides show good thin-film properties for manufacturability on planar wafer surfaces. Transient thermal gradients in an RTP system are shown to cause substantial variations in the electrical and structural properties of TiSi_x films formed on silicon substrates with varying substrate thicknesses. Closed-loop temperature control in an RTP reactor provided stoichiometrically identical TiSi_x films with negligible substrate thickness dependence. The experimental results also suggest that careful wafer surface temperature control is needed when forming titanium silicide films on nonplanar silicon surfaces, silicon trenches, and process monitor wafers without predetermined wafer thicknesses     

Rapid thermal processing of silicon wafers with emissivity patterns

Fabrication of devices and circuits on silicon wafers creates patterns in optical properties, particularly the thermal emissivity and absorptivity, that lead to temperature nonuniformity during rapid thermal processing (RTP) by infrared heating methods. The work reported in this paper compares the effect of emissivity test patterns on wafers heated by two RTP methods: (1) a steadystate furnace or (2) arrays of incandescent lamps. Method I was found to yield reduced temperature variability, attributable to smaller temperature differences between the wafer and heat source. The temperature was determined by monitoring test processes involving either the device side or the reverse side of the wafer. These include electrical activiation of implanted dopants after rapid thermal annealing (RTA) or growth of oxide films by rapid thermal oxidation (RTO). Temperature variation data are compared with a model of radiant heating of patterned wafers in RTP systems.     

The effect of patterns on thermal stress during rapid thermalprocessing of silicon wafers

The presence of patterns can lead to temperature nonuniformity and undesirable levels of thermal stress in silicon wafers during rapid thermal processing (RTP). Plastic deformation of the wafer can lead to production problems such as photolithography overlay errors and degraded device performance. In this work, the transient temperature fields in patterned wafers are simulated using a detailed finite-element-based reactor transport model coupled with a thin film optics model for predicting the effect of patterns on the wafer radiative properties. The temperature distributions are then used to predict the stress fields in the wafer and the onset of plastic deformation. Results show that pattern-induced temperature nonuniformity can cause plastic deformation during RTP, and that the problem is exacerbated by single-side heating, increased processing temperature, and increased ramp rate. Pattern effects can be mitigated by stepping the die pattern out to the edge of the wafer or by altering the thin film stack on the wafer periphery to make the radiative properties across the wafer more uniform     

The effect of surface roughness on the radiative properties ofpatterned silicon wafers

The radiative properties of patterned silicon wafers have a major impact on the two critical issues in rapid thermal processing (RTP), namely wafer temperature uniformity and wafer temperature measurement. The surface topography variation of the die area caused by patterning and the roughness of the wafer backside can have a significant effect on the radiative properties, but these effects are not well characterized. We report measurements of room temperature reflectance of a memory die, logic die, and various multilayered wafer backsides. The surface roughness of the die areas and wafer backsides is characterized using atomic force microscopy (AFM). These data are subsequently used to assess the effectiveness of thin film optics in providing approximations for the radiative properties of patterned wafers for RTP applications     

大直径直拉硅片的快速热处理

主要研究了快速热处理( RTP)对大直径直拉( CZ)硅片的清洁区( DZ)和氧沉淀的影响.通过在Ar、N2 、O2 三种不同气氛中,在不同温度下RTP发现在大直径CZ硅片中氧沉淀的行为及DZ的宽度与RTP的温度、气氛有很大关系.在实验的基础上,讨论了在大直径CZ硅中RTP对氧沉淀和DZ的影响机理.     

A model for rapid thermal processing: achieving uniformity throughlamp control

A first-principles approach to the modeling of a rapid thermal processing (RTP) system to obtain temperature uniformity is described. RTP systems are single wafer and typically have a bank of heating lamps which can be individually controlled. Temperature uniformity across a wafer is difficult to obtain in RTP systems. A temperature gradient exists outward from the center of the wafer due to cooling for a uniform heat flux density on the surface of the wafer from the lamps. Experiments have shown that the nonuniform temperature of a wafer in an RTP system can be counteracted by adjusting the relative power of the individual lamps, which alters the heat flux density at the wafer. The model is composed of two components. The first predicts a wafer's temperature profile given the individual lamp powers. The second determines the relative lamp power necessary to achieve uniform temperature everywhere but at the outermost edge of the wafer (cooling at the edge is always present). The model has been verified experimentally by rapid thermal chemical vapor deposition of polycrystalline silicon with a prototype LEISK RTP system. The wafer temperature profile is inferred from the poly-Si thickness. Results showed a temperature uniformity of ±1%, an average absolute temperature variation of 5.5°C, and a worst-case absolute temperature variation of 6.5°C for several wafers processed at different temperatures     

快速热处理对重掺As硅单晶中氧沉淀的影响

对重掺As硅片进行快速热处理，发现重掺As硅片中氧沉淀行为与快速热处理温度、保温时间和降温速度有很大的关系. 随着快速热处理温度的升高、降温速度的增大和保温时间的延长，氧沉淀的密度增大. 最后对影响的机理进行了讨论.     

Using wavelength-dependent emissivity of semiconductor wafer tomodel heat transfer in rapid thermal processing station

This paper develops an approach for using a wavelength-dependent emissivity model of a semiconductor wafer in calculating heat transfer in a rapid thermal processing (RTP) station. The wafer emissivity is modeled by a generalized polynomial in wavelength where the coefficients may be functions of temperature. A comparison of experimental data with simulated results for a silicon wafer is provided     

Full Field Temperature Measurement of Specular Wafers During Rapid Thermal Processing

Many of the processes involved in the creation of semiconductor devices involve high-temperature processing of silicon wafers. The benefits of reduced thermal budget and faster cycle time make rapid thermal processing (RTP) a possible key technology for semiconductor manufacturing. However, the problem of nonuniform wafer temperature has prevented it from further spread among the industry. The first step in developing controls to maintain a uniform wafer temperature is accurate temperature measurement during processing. In this paper, a system was developed to exploit the specular reflectivity of silicon wafers and obtain a measurement of the wafer temperature profile. The spectral reflectivity is determined by measuring the intensity of an incident beam and the beam reflected from the wafer surface. With this measured reflectivity value the spectral-directional wafer emissivity was determined using Kirchhoff's law. The obtained emissivity then was used to calculate the wafer temperature profile from an image obtained with an infrared camera. An experimental study of the transmittance of an undoped silicon calibration wafer at an elevated temperature is also discussed     

Validation of a Rapid Thermal Processing model in steady-state

Rapid Thermal Processing (RTP) is widely used in advanced semiconductor manufacturing. The present work deals with the heat transfer from infrared lamps to the silicon wafer in a commercial RTP equipment. Both numerical and experimental approaches are considered. For numerical purposes, the RTP system is modelled in two (2D) and three dimensions (3D). Calculations are performed in steady-state. The computational fluid dynamics method (CFD) is used for solving the mass and heat conservation equations. The radiative heat transfer equation is solved with the Monte Carlo method. In order to validate these models, measurements of the wafer temperature are realized for five electric power values supplied to the infrared lamps. The experimental wafer temperature profiles are in good agreement with the numerically calculated ones. Moreover, a confrontation between the experimental temperature of the infrared lamp filaments evaluated from the Ohm law and the one used in the numerical calculations shows a good agreement with the 3D model. The slight difference observed with the 2D model is explained. So the numerical simulations are fully validated. Two relations are established in order to predict the power which has to be applied to infrared lamps to obtain the required wafer temperature.