Epitaxial praseodymium oxide: a new high-K dielectric

We show results for molecular beam epitaxial growth of praseodymium oxide on Si. On Si(1 0 0) oriented surfaces, crystalline Pr₂O₃ grows as (1 1 0)-domains, with two orthogonal in-plane orientations. Epitaxial overgrowth with Si could not been realized so far. We obtain perfect epitaxial growth of hexagonal Pr₂O₃ on Si(1 1 1). These layers can also be overgrown epitaxially with Si leading to novel tunnel structures. Crystalline Pr₂O₃ on Si(0 0 1) is a promising candidate for highly scaled gate insulators, displaying sufficiently high-K value of around 30, ultra-low leakage current density, good reliability, and high electrical breakdown voltage. The Pr₂O₃/Si(0 0 1) interface exhibits the symmetric band alignment, desired for applying such material in both n- and p-type devices. The valence band as well as the conduction band offset to Si is above 1 eV. The electron masses can be assumed to be very heavy in the oxide. This effect together with the suitable band offsets leads to the unusually low leakage currents found experimentally. Finally, the integration of crystalline Pr₂O₃ high-K gate dielectrics into a conventional CMOS process will be demonstrated.     

Silicon in functional epitaxial oxides: A new group of nanostructures

The ability to integrate low-dimensional crystalline silicon into crystalline insulators with high dielectric constant (high-k) can open the way for a variety of novel applications ranging from high-k replacement in future nonvolatile memory devices to insulator/Si/insulator structures for nanoelectronic applications. We will present an approach for nanostructure fabrication by incorporation of crystalline silicon into epitaxial oxide that is based on a solid-phase epitaxy of Si. In dependence on the preparation conditions we obtained nanostructures containing an either ultra-thin single-crystalline Si quantum-well buried in single-crystalline oxide matrix with sharp interfaces or Si-nanocrystals (ncs) embedded into single-crystalline oxide layer. As an example, we demonstrate the growth of Si buried in Gd₂O₃ and the incorporation of epitaxial Si clusters into single-crystalline Gd₂O₃ on silicon as well as silicon carbide substrates using molecular beam epitaxy. The leakage current of the obtained nanostructures exhibited negative differential resistance at lower temperatures. For structures containing Si-ncs a large hysteresis in capacitance–voltage measurements due to charging and discharging of the Si-ncs was obtained.     

Praseodymium oxide growth on Si(1 0 0) by pulsed-laser deposition

We report on the pulsed-laser deposition of high-K praseodymium oxide films onto Si(1 0 0) surfaces by laser-ablating a sintered Pr₆O₁₁ target. Optical microscope, SEM, and AFM investigations reveal two kinds of Pr_xO_y-surface structures, which are identified as: (a) large-scaled particles, and (b) ordered structures (rods) of different size with different orientations. The size of the particles increases with laser wavelength. The size of the ordered surface structures strongly depends on the substrate temperature. For the first time, we show characteristic Pr-Raman signals which confirm the crystalline quality of the grown layer. They also indicate that the silicon layer at the Si–Pr_xO_y interface is under compressive stress.     

Growth and structural properties of crystalline LaAlO3 on Si (0 0 1)

Crystalline LaAlO₃ was grown by oxide molecular beam epitaxy (MBE) on Si (0 0 1) surfaces utilizing a 2 ML SrTiO₃ buffer layer. This SrTiO₃ buffer layer, also grown by oxide MBE, formed an abrupt interface with the silicon. No SiO₂ layer was detectable at the oxide-silicon interface when studied by cross-sectional transmission electron microscopy. The crystalline quality of the LaAlO₃ was assessed during and after growth by reflection high energy electron diffraction, indicating epitaxial growth with the LaAlO₃ unit cell rotated 45° relative to the silicon unit cell. X-ray diffraction indicates a (0 0 1) oriented single-crystalline LaAlO₃ film with a rocking curve of 0.15° and no secondary phases. The use of SrTiO₃ buffer layers on silicon allows perovskite oxides which otherwise would be incompatible with silicon to be integrated onto a silicon platform.     

Preparation and characterization of oriented III–V nitride thin films by nebulized spray pyrolysis

Thin films of GaN, InGaN, AlGaN and AlN on Si(1 0 0) as well as on Al₂O₃(0 0 0 1) single crystalline substrates have been deposited at 1123, 1023, 1173 and 1173 K, respectively, by employing the simple inexpensive technique of nebulized spray pyrolysis. GaN films deposited on Si are polycrystalline where as the films deposited on Al₂O₃ are epitaxial. GaN epitaxial films show cathodoluminescence characteristics. Photoluminescence studies show that all the films are of high quality.     

Three dimensional devices fabricated by silicon epitaxial lateral overgrowth

Selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) of silicon over oxide are used for novel device technologies in CMOS and bipolar with a large potential for BICMOS. A stacked inverted P-MOS device in crystalline Si on top of an oxidized poly-gate was fabricated with the critical “as-grown” interface state densities, between the ELO silicon grown over the existing poly-oxide, measured to be less than 2 × 10¹¹/ (cm²-eV) near midgap. A SiH₂Cl₂-HCl-H₂ in a LPCVD epitaxial system was employed at 150 Torr and at 900° C to produce the ELO/SEG material. The initial stacked-inverted 3D P-MOS devices typically show hole mobilities of greater than 160 cm²/V-s with adequate subthreshold characteristics for 3-dimensional CMOS implementation. A new form of SEG was used to grow single crystal silicon horizontally between dielectric walls to form SOI material in thin slabs, called confined lateral selective epitaxial growth (CLSEG). BJT-SOI device structures with β_dc > 150 were fabricated in CLSEG silicon to demonstrate the device quality material and to show the 3D-SOI capability.     

Integration of functional epitaxial oxides into silicon: from high-k application to nanostructures

We will present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly. Experimental results for Gd₂O₃-based MOS capacitors grown under optimized conditions show that these layers are excellent candidates for application as very thin high-k materials replacing SiO₂ in future MOS devices. We also will present a new approach for nanostructure formation which is based on solid-phase epitaxy of the Si quantum-well combined with simultaneous vapor-phase epitaxy of the insulator on top of the quantum-well. Ultra-thin single-crystalline Si buried in a single-crystalline insulator matrix with sharp interfaces was obtained by this approach on Si(111). Finally, the incorporation of crystalline Si islands into single-crystalline oxide layers will be demonstrated.     

Selective silicon epitaxial growth on a submicrometer WSi2 grating: Application to the permeable base transistor

We report the silicon epitaxial growth on top of a tungsten disilicide grating using a rapid thermal processing, low pressure chemical vapor deposition reactor. The epitaxial growth of silicon is shown to proceed two dimensionally from the Si surface without reaction with the underlying WSi₂ grid. Both lateral diffusion over WSi₂ of Si adsorbed species and vertical diffusion of Si through the silicide film are shown to occur with respective weight depending on the width of the WSi₂ lines. This allows silicon selective growth on patterned Si/WSi₂ structure for grating periodicity below 1 μm. Preliminary electrical measurements of the Si/WSi₂/Si overgrown permeable base transistor (PBT) thus fabricated are presented, showing current densities J_max of up to 6000 A/cm² and transconductancesg _m of 5 mS/mm.     

Integration of low dimensional crystalline Si into functional epitaxial oxides

In this work we show that by efficiently exploiting the growth kinetics during molecular beam epitaxy (MBE) one could create Si nanostructures of different dimensions. Examples are Si quantum dots (QD) or quantum wells (QW), which are buried into an epitaxial rare-earth oxide, e.g. Gd₂O₃. Electrical measurements carried out on Pt/Gd₂O₃/Si MOS capacitors comprised with Si-QD demonstrate that such well embedded Si-QD with average size of 5 nm and density of 2×10¹² cm⁻² exhibit very good charge storage capacity with suitable retention (∼10⁵ s) and endurance (∼10⁵ write/erase cycles) characteristics. The Pt/Gd₂O₃/Si (metal-oxide-semiconductor (MOS)) basic memory cells with embedded Si-QD display large programming window (∼1.5-2 V) and fast writing speed and hence could be a potential candidate for future non-volatile memory application. The optical absorption of such Si-QD embedded into epitaxial Gd₂O₃ was found to exhibit a spectral threshold maximum up to 2.9±0.1 eV depending on their sizes, inferring a significant influence of quantum confinement on the QD/oxide interface band diagram.Ultra-thin single-crystalline Si-QW with epitaxial insulator (Gd₂O₃) as the barrier layers were grown by a novel approach based on cooperative vapor phase MBE on Si wafer with sharp interfaces between well and barriers. The current-voltage characteristics obtained for such structure exhibits negative differential resistance at lower temperature, making them a good candidate for resonant tunneling devices.     

Epitaxial growth of LaAlO3 on Si(0 0 1) using interface engineering

In this work, the potentiality of molecular beam epitaxy techniques to prepare epitaxial lanthanum aluminate (LaAlO₃) films on Si(0 0 1) is explored. We first demonstrate that the direct growth of LaAlO₃ on Si(0 0 1) is impossible : amorphous layers are obtained at temperatures below 600 °C whereas crystalline layers can be grown at higher temperatures but interfacial reactions leading to silicate formation occur. An interface engineering strategy is then developed to avoid these reactions. SrO and SrTiO₃ have been studied as buffer for the subsequent growth of LaAlO₃. Only partial LaAlO₃ epitaxy is obtained on SrO whereas high quality layers are achieved on SrTiO₃. However both SrO and SrTiO₃ appear to be unstable with respect of Si at the growth temperature of LaAlO₃ (700 °C). This leads to the formation of relatively thick amorphous interfacial layers. Despite their instability at high temperature, these processes could be used for the fabrication of twins-free LaAlO₃ templates on Si, and for the fabrication of complex oxide/Si heterostructures for various applications.     

Laser processing of Al2O3/a‐SiCx:H stacks: a feasible solution for the rear surface of high‐efficiency p‐type c‐Si solar cells

We explore the potential of laser processing aluminium oxide (Al₂O₃)/amorphous silicon carbide (a‐SiC_x:H) stacks to be used at the rear surface of p‐type crystalline silicon (c‐Si) solar cells. For this stack, excellent quality surface passivation is measured with effective surface recombination velocities as low as 2 cm/s. By means of an infrared laser, the dielectric film is locally opened. Simultaneously, part of the aluminium in the Al₂O₃ film is introduced into the c‐Si, creating p+ regions that allow ohmic contacts with low‐surface recombination velocities. At optimum pitch, high‐efficiency solar cells are achievable for substrates of 0.5–2.5 Ω cm. Copyright © 2012 John Wiley & Sons, Ltd.     

Ge integration on Si via rare earth oxide buffers: From MBE to CVD (Invited Paper)

Single crystalline rare earth oxide heterostructures are flexible buffer systems to achieve the monolithic integration of Ge thin film structures on Si. The development of engineered oxide systems suitable for mass-production compatible CVD processes is hereby of special importance. In this paper, the interaction of Ge with PrO₂(1 1 1)/Si(1 1 1) heterostructures is studied in detail to achieve this goal. MBE based in situ growth studies unveil the chemical reduction of the PrO₂ buffer during the initial Ge deposition, the occurrence of a Volmer Weber growth mode of Ge on the resulting Pr₂O₃ heterostructure and the final formation of single crystalline, atomically smooth and c(2 × 8) reconstructed Ge(1 1 1) film structures. Comparative CVD Ge heteroepitaxy studies on MBE grown PrO₂(1 1 1)/Si(1 1 1) and Pr₂O₃(1 1 1)/Si(1 1 1) buffer systems indicate that the highly reactive lattice oxygen of PrO₂ plays an active role to avoid during initial exposure to the reducing ambient of the GeH₄ precursor chemistry the decomposition of the oxide buffer system.     

Surface passivation of high‐efficiency silicon solar cells by atomic‐layer‐deposited Al2O3

Atomic‐layer‐deposited aluminium oxide (Al₂O₃) is applied as rear‐surface‐passivating dielectric layer to passivated emitter and rear cell (PERC)‐type crystalline silicon (c‐Si) solar cells. The excellent passivation of low‐resistivity p‐type silicon by the negative‐charge‐dielectric Al₂O₃ is confirmed on the device level by an independently confirmed energy conversion efficiency of 20·6%. The best results are obtained for a stack consisting of a 30 nm Al₂O₃ film covered by a 200 nm plasma‐enhanced‐chemical‐vapour‐deposited silicon oxide (SiO_x) layer, resulting in a rear surface recombination velocity (SRV) of 70 cm/s. Comparable results are obtained for a 130 nm single‐layer of Al₂O₃, resulting in a rear SRV of 90 cm/s. Copyright © 2008 John Wiley & Sons, Ltd.     

Crystalline oxide-based devices on silicon substrates

We have developed a process to grow epitaxial SrTiO₃ (STO) on Si. This STO/Si substrate can then be used as a pseudo substrate for the further deposition of many other oxides that are closely lattice matched to STO. The STO is grown by molecular-beam epitaxy (MBE) with a subsequent oxide layer deposited either by MBE or sol-gel deposition. The pseudo substrate has been used to demonstrate ferroelectric devices and piezoelectric devices. Ferroelectric capacitors using epitaxial BaTiO₃ (BTO) show a memory window of 0.5 V; however, the retention time for these devices is short because of the depolarization field caused by the silicon-oxide interface layer used to improve the band alignment of the BTO/Si interface. Surface acoustic wave (SAW) resonators using epitaxial Pb(Zr,Ti)O₃ show excellent response with a coupling coefficient of 4.6% and a velocity of 2,844 m/s.     

Structural characterization of thick, high-quality epitaxial Ge on Si substrates grown by low-energy plasma-enhanced chemical vapor deposition

In this paper, we report on the growth of epitaxial Ge on a Si substrate by means of low-energy plasma-enhanced chemical vapor deposition (LEPECVD). A Si_1?xGe_x graded buffer layer is used between the silicon substrate and the epitaxial Ge layer to reduce the threading dislocation density resulting from the lattice mismatch between Si and Ge. An advantage of the LEPECVD technique is the high growth rate achievable (on the order of 40 Å/sec), allowing thick SiGe graded buffer layers to be grown faster than by other epitaxial techniques and thereby increasing throughput in order to make such structures more manufacturable. We have achieved relaxed Ge on a silicon substrate with a threading dislocation density of 1 × 10⁵ cm^?2, which is 4?10x lower than previously reported results.     

Defect microstructure in low temperature epitaxial silicon grown by RPCVD

Defect characterization of epitaxial silicon films grown by low temperature remote plasmaenhanced chemical vapor deposition (RPCVD) under various conditions is discussed. The film morphology and crystallinity have been examined by defect etching/Nomarski optical microscopy and transmission electron microscopy. Prior to epitaxial growth, anex situ wet chemical clean and anin situ remote hydrogen plasma clean were performed to remove the native oxide as well as other surface contaminants such as carbon. A damage-free (100) Si surface with extremely low concentrations of carbon and oxygen as confirmed byin situ Auger electron spectroscopy can be achieved using this cleaning technique at temperatures as low as 250°. Low temperature Si homoepitaxy was achieved by RPCVD on lightly doped (100) Si substrates. Growth parameters such as silane flow rate (partial pressure), chamber pressure, and substrate temperature were varied during epitaxial growth to investigate the dependence of film quality on these parameters. For comparison,in situ remote hydrogen plasma and epitaxial growth were also performed on heavily dopedp-type (100) Si substrates. Finally, the results of epitaxial growth at temperatures as low as 150° are presented.     

Si-nanoclusters embedded into epitaxial rare earth oxides: Potential candidate for nonvolatile memory applications

Using an unconventional approach, single crystalline Si-nanoclusters (Si-NCs) with uniform size and higher density were embedded into epitaxial rare earth oxide with two-dimensional spatial arrangements at a defined distance from the substrate using solid source molecular beam epitaxy (MBE) technique.The incorporated Si-NCs with average size of 5 nm and density of 2 × 10¹² cm⁻² exhibit charge storage capacity with promising retention (∼10⁷ s) and endurance (10⁵ write/erase cycles) characteristics. The Pt/Gd₂O₃ (Si-NC)/Si (MOS) basic memory cells with embedded Si-nanoclusters display large programming window (∼1.5-2 V) and fast writing speed. With such properties demonstrated, we believe that the Si-NCs embedded in epitaxial Gd₂O₃ could be potential candidate for high density nonvolatile memory devices in the future.     

Roughness improvement of the CoSi2/Si-interface for an application as buried silicide

The material CoSi₂ is preferred for the fabrication of buried silicide films between silicon device layer and buried oxide of SOI substrates for BICMOS integrations. Such an application needs excellent quality of the interface between the silicide and the silicon device layer. Using the conventional cobalt salicide process the roughness and waviness of the interface is too large for a device application. In this presentation three technologies to improve the CoSi₂/Si-interface quality were characterized. Using the first technology a very thin single crystalline CoSi₂ film was fabricated on a silicon substrate. This film acts as initial layer to produce thicker single crystalline silicide films. By the second technology an interlayer between cobalt and the silicon substrate was used to mediate an epitaxial CoSi₂ growth. Different types and materials were tested. Using the third technique a sacrificial layer of polycrystalline silicon between cobalt and the silicon substrate was consumed during the silicidation reaction. This method gives the best results with interface roughness values of less than 1 nm. The interface roughness was measured after CoSi₂ removal using AFM. A possible epitaxial growth of the silicide films was investigated with XRD analysis. Cross sectional SEM images were prepared to analyze the interface waviness and the CoSi₂ structure.     

Praseodymium based high-k dielectrics grown on Si and SiC substrates

High-k polycrystalline Pr₂O₃ thin films have been deposited by metal organic chemical vapor deposition (MOCVD) technique on Si(0 0 1) and 4H–SiC(0 0 0 1) substrates. MOCVD processes have been carried out from the Pr(tmhd)₃ (H-tmhd= 2,2,6,6-tetramethyl-3,5-heptandione) precursor. Complete structural and morphological characterization of films has been carried out using several techniques (X-ray diffraction (XRD), scanning electron microscopy (SEM), transmission electron microscopy (TEM)). Polycrystalline Pr₂O₃ films have been obtained and at the interface a praseodymium silicate amorphous layer has been observed on both substrates. The electrical properties of the dielectric praseodymium films have been evaluated.     

Ultra-Thin Si<Subscript>1−<Emphasis Type="Italic">x</Emphasis></Subscript>Ge<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript> Dislocation Blocking Layers for Ge/Strained Si CMOS Devices

We demonstrate ultra-thin (<150 nm) Si_1−x Ge _x dislocation blocking layers on Si substrates used for the fabrication of tensile-strained Si N channel metal oxide semiconductor (NMOS) and Ge P channel metal oxide semiconductor (PMOS) devices. These layers were grown using ultra high vacuum chemical vapor deposition (UHVCVD). The Ge mole fraction was varied in rapid, but distinct steps during the epitaxial layer growth. This results in several Si_1−x Ge _x interfaces in the epitaxially grown material with significant strain fields at these interfaces. The strain fields enable a dislocation blocking mechanism at the Si_1−x Ge _x interfaces on which we were able to deposit very smooth, atomically flat, tensile-strained Si and relaxed Ge layers for the fabrication of high mobility N and P channel metal oxide semiconductor (MOS) devices, respectively. Both N and P channel metal oxide semiconductor field effect transister (MOSFETs) were successfully fabricated using high-k dielectric and metal gates on these layers, demonstrating that this technique of using ultra-thin dislocation blocking layers might be ideal for incorporating high mobility channel materials in a conventional CMOS process.