Eight-Way Substrate Integrated Waveguide Power Divider With Low Insertion Loss

We describe a compact radial cavity power divider based on the substrate integrated waveguide (SIW) technology in this paper. The equivalent-circuit model is used to analyze the multiport structure, and a design procedure is also established for the structure. An eight-way C-band SIW power divider with low insertion loss is designed, fabricated, and measured. Good agreement between simulated and measured results is found for the pro posed power divider. The measured minimum insertion loss of the eight-way power divider is approximately 0.2 dB and return loss is approximately 30 dB at 5.25 GHz. The measured 15-dB return-loss bandwidth is found to be approximately 500 MHz, and its 1-dB insertion-loss bandwidth is approximately 1.2 GHz. Furthermore, the isolations between the output ports of the eight-way power divider are also discussed.     

Design of Low-Profile Millimeter-Wave Substrate Integrated Waveguide Power Divider/Combiner

A low-profile millimeter-wave substrate integrated waveguide (SIW) power divider/combiner is presented in this paper. The simplified model of this compact SIW power dividing/combining structure has been developed. Analysis based on equivalent circuits gives the design formula for perfect power dividing/combining. In order to verify the validity of the design method, a four-way SIW power divider/combiner circuit operating at Ka band is designed, fabricated and measured. Good agreement between simulated and measured results is found for the proposed passive power divider/combiner. Experiments on the four-way passive divider/combiner back-to-back design demonstrate a minimum overall insertion loss of 1.5 dB at 31.1 GHz, corresponding to a power-combining efficiency of 84%. The measured 10-dB return loss bandwidth is demonstrated to be 2.2 GHz, and its 0.5-dB bandwidth was 2 GHz.     

Broadband Millimeter-Wave In-Phase and Out-of-Phase Waveguide Dividers with High Isolation

In this paper, two novel broadband in-phase and out-of-phase waveguide power dividers with high isolation are presented. Based on the substrate-integrated waveguide (SIW) divider and SIW-to-waveguide transition circuit, two kinds of E-plane waveguide dividers have been implemented. Due to the features of in-phase and out-of-phase performances, the proposed waveguide dividers can provide much more flexibilities than that of conventional E-plane waveguide T-junction. A broadband phase and amplitude performances are achieved across the whole Ka-band owing to the wideband characteristic of the SIW divider and transition circuits. To minimize the size and loss of the divider, a compact and low-loss SIW-to-waveguide transition circuit has been developed using the antisymmetric tapered probes. Two prototypes of the Ka-band waveguide dividers, including the in-phase and out-of-phase types, have been fabricated and measured. Measured results show that the isolation, input return loss, output return loss, amplitude imbalance, and phase imbalance of the in-phase divider are better than 15.5, 13.1, 10.8, 0.4 dB, and 3.5⁰, while those of the out-of-phase divider are better than 15.0, 13.4, 10.4, 0.5 dB, and 3.6⁰, respectively, over the frequency range from 26.5 to 40 GHz. The measured results agree well with the simulated ones. Considering their wide bandwidth, high isolation, good port matching performance, and compact configuration, the two types of waveguide dividers can be good candidates for broadband applications in millimeter-wave waveguide systems.     

一种宽带紧凑型基片集成径向波导功分器设计

分别设计了一分四和一分八的宽带紧凑型基片集成径向波导（SIRW ）功分器,通过馈电探针的阶梯化方式,使常规一分四和一分八SIRW功分器在回波损耗小于-15 dB条件下的相对工作带宽由原先的6％和15％分别提高至58％和61％,仿真得到的带内插耗分别在-6．25 dB和-9．25 dB以内。为了验证仿真数据的准确性,对一分四功分器进行了测试,测试结果性能良好,满足工程使用要求。     

Broadband Radial Waveguide Spatial Combiner

A broadband eight-way spatial combiner using coaxial probes and radial waveguides has been proposed and designed. The simple electromagnetic modeling for the radial waveguide power divider/combiner has been developed using equivalent-circuit method. The measured 10-dB return loss and 1-dB insertion loss bandwidth of this waveguide spatial combiner are all demonstrated to be about 8 GHz.     

A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \upmu \hbox {m} CMOS

Aiming for the simultaneous realization of constant gain, accurate input and output impedance matching and minimum noise figure (NF) over a wide frequency range, the circuit topology and detailed design of wide broadband low noise amplifier (LNA) are presented in this paper. A novel 2.5–3.1 GHz wide-band LNA with unique characteristics has been presented. Its design and layout are done by TSMC 0.18  \(\upmu \hbox {m}\) technology. Common gate stage has been used to improve input matching. In order to enhance output matching and reduce the noise as well, a buffer stage is utilized. Mid-stages which tend to improve the gain and reverse isolation are exploited. The proposed LNA achieves a power gain of 15.9 dB, a NF of 3.5 dB with an input return loss less than \(-\) 11.6, output return loss of \(-\) 19.2 to \(-\) 19 and reverse isolation of \(-\) 38 dB. The LNA consumes 54.6 mW under a supply voltage of 2 V while having some acceptable characteristics.     

基于慢波基片集成波导的X波段功分器设计

针对传统基片集成波导（substrate integrated waveguide,SIW）功分器设计中宽带化和小型化不易兼顾的问题,提出了一种基于慢波SIW（slow-wave SIW, SW-SIW）的功分器. 采用微带折线构成的慢波结构单元加载于SIW金属表面上,代替传统SIW连续的金属表面,与同尺寸的SIW相比,SW-SIW的截止频率下降了40%,能够实现横向尺寸的缩减,尤其当SW-SIW达到与SIW相同的相移量时,SW-SIW所需纵向尺寸更小. 所提出的基于SW-SIW的功分器在具有较宽带宽的同时实现了器件尺寸的减小. 通过测试结果可得,该功分器在8.25～12.8 GHz频带内的反射系数|S₁₁|相似文献   

A 3–10 GHz Ultra Wideband Receiver LNA in 0.13 \mu m CMOS

A fully integrated low-power, low-complexity ultra wideband (UWB) 3–10 GHz receiver front-end in standard 130 nm CMOS technology is proposed for UWB radar sensing applications. The receiver front-end consists of a full UWB band low-noise amplifier and an on-chip diplexer. The on-chip diplexer has a 1 dB insertion loss and provides a \(-\) 30 dB isolation. The diplexer switch was co-designed with the receiver input matching network to optimize the power matching while simultaneously achieving good noise matching performance. The receiver low-noise amplifier provides a 3–10 GHz bandwidth input matching and a power gain of 17 dB. The overall receiver front-end consumes an average power of 13 mW. The core area of the transceiver circuit is 500 \(\mu \) m by 700 \(\mu \) m.     

A 20 Gbps inductorless CMOS optical receiver for short-distance VCSEL-based 850 nm optical links

This paper presents a circuit design and experimental results for a 20 Gbps CMOS inductorless optical receiver, a transimpedance amplifier (TIA) and a limiting amplifier, for a vertical-cavity surface emitting laser based 850 nm optical link. The proposed optical receiver apply a power supply noise canceling technique, an additional path from the power supply to the TIA output to generate a reversed phase signal that reduces the power supply noise, and bandwidth enhancement circuit design that dose not require internal inductors. The simulation results shows a power supply rejection ratio of ?96.6 dB at 10 MHz, a total gain of $82.8\,\hbox{dB}\Upomega$ and a ?3 dB bandwidth of 15.5 GHz. A test chip fabricated in 90 nm CMOS technology and demonstrated with a PIN photo-diode, a bandwidth of 17 GHz and a responsibility of 0.53 A/W. The measurement results show a 25 % eye opening and an input sensitivity of ?7.1 dBm at a bit error rate of 10^?12 with a 2⁹ ? 1 pseudo-random test pattern at 20 Gbps. The core circuit of the optical receiver occupies only an area of 0.02 mm².     

A High Gain,Low-Power Low-Noise Amplifier for Ultra-Wideband Wireless Systems

This paper presents a high gain, low-power common-gate ultra-wideband low-noise amplifier employing a simple configuration for wideband input matching. In our design, a series resistance-inductance network at the source combines with the parasitic capacitance of a transistor to form a parallel RLC input matching configuration in the common-gate input stage. Because of the additional resistance, this matching configuration partially alleviates the restriction of transconductance of the input transistor and also provides wideband matching. The low-noise amplifier was fabricated using the TSMC 0.18  \(\mu \) m technology with an average noise figure of 3.75 dB, a power gain of 18.68 dB with a ripple of \(\pm \)  0.8 dB, an input return loss less than \(-10\)  dB from 3 to 7.6 GHz, and DC power consumption of 8.56 mW, including the output buffer with a 1.8 V supply voltage.     

50W Ka频段固态功率放大器设计

阐述了3 dB分支波导定向耦合器、波导—微带双探针过渡、改进型波导T型结的原理,介绍了一种4路功率分配/合成网络。提出了一种8路功率分配/合成器,其结构具有插入损耗低、输入驻波好、幅度相位一致性好等优点。研制了50 W Ka频段固态功率放大器,由驱动级放大器、8路功率分配/合成器和8个7 W功放模块组成,在29~31 GHz频率范围内实现了大于50 W的线性输出功率,合成效率高于80%。     

A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor

This paper presents the design of a high conversion gain and low flicker noise down conversion CMOS double balanced Gilbert cell mixer using \(0.18\,\upmu \hbox {m}\) CMOS technology. The high conversion gain and low flicker noise mixer is implemented by using a differential active inductor (DAI) circuit and cross-coupled current injection technique within the conventional double-balanced Gilbert cell mixer. A cross-coupled current bleeding circuit is used to inject the current to the switching stage to decrease the flicker noise. Instead of spiral inductor, a DAI with high tunability of the inductor and quality factor is used to tune out the parasitic capacitance effect and decrease the leakage current that has a harmonic component and produce the flicker noise. By tuning the DAI, the flicker noise corner frequency is reduced to 150 Hz. The proposed circuit is simulated with Cadence Spectra and the simulation results shows the NF of 11.2 dB, conversion gain of 23.7 dB and IIP3 of \(-6\)  dB for an RF frequency of 2.4 GHz. The excellent LO-RF, LO-IF, RF-LO and RF-IF isolations of \(-60, -110, -52\) and \(-64\)  dB are achieved respectively. The total power consumption is 10.5 mW from a 1.8 V DC power supply.     

A 11.2 mW 48–62 GHz Low Noise Amplifier in 65 nm CMOS Technology

In this paper, a wideband low noise amplifier (LNA) for 60 GHz wireless applications is presented. A single-ended two-stage cascade topology is utilized to realize an ultra-wideband and flat gain response. The first stage adopts a current-reused topology that performs the more than 10 GHz ultra-wideband input impedance matching. The second stage is a cascade common source amplifier that is used to enhance the overall gain and reverse isolation. By proper optimization of the current-reused topology and stagger turning technique, the two-stage cascade common source LNA provides low power consumption and gain flatness over an ultra-wide frequency band with relatively low noise. The LNA is fabricated in Global Foundries 65 nm RFCMOS technology. The measurement results show a maximum \(S_{21}\) gain of 11.4 dB gain with a \(-\)3 dB bandwidth from 48 to 62 GHz. Within this frequency range, the measured \(S_{11}\) and \(S_{12}\) are less than \(-\)10 dB and the measured DC power consumption is only 11.2 mW from a single 1.5 V supply.     

Sub-THz Four-Way Waveguide Power Combiner With Low Insertion Loss

A four-way waveguide power divider has been developed in sub-THz band. The waveguide power divider was achieved with the improved H-plane T-junction structure. By tuning the depth and width at the junction of the waveguide, the input impendence was matched and the two-way output power amplitude and phase were at the same level. The four-way power divider was realized by the concatenation of two same T-junction at the two output ports. A sub-THz four-way passive power combiner is designed, fabricated and measured. The measure results show that the measured insertion loss of the fabricated four-way passive power combiner is less than 1.2 dB whereas the input return loss is greater than 14.8 dB from 97.5 to 101.7 GHz. Experiments on the sub-THz four-way passive power combiner show that a minimum insertion loss of 1 dB has been achieved at about 99.5 GHz. The measured minimum insertion loss of the waveguide power divider is half of the insertion loss for the entire passive power combiner (0.5 dB), which corresponds to a power-combining efficiency of 89 %. The measured results agree with the simulated ones closely.     

基于QMSIW小型化带通滤波器设计

为有效减小X波段基片集成波导(SIW)滤波器的尺寸和插入损耗,提出了基于四分之一模基片集成波导(QMSIW)和共面波导(CPW)混合结构的小型化带通滤波器。为了提高滤波器的选择性和带外抑制,将两个CPW合并到两个级联的QMSIW谐振器中,由于两个CPW谐振器之间的耦合是电耦合,有助于产生两个传输零点,因而具有较高的选择性。该小型化滤波器尺寸仅为8.1 mm×15.4 mm,中心频率为8.7 GHz,相对带宽是16.1%,仿真测得插入损耗为0.83 dB,带外抑制大于40 dB。     

Demonstration of using multi-band 16-QAM OFDM modulation with direct-detection in 10 GHz bandwidth for 37.3-Gb/s PON

We propose and experimentally demonstrate a 37.3 Gb/s passive optical network using four-band orthogonal-frequency-division-multiplexing (OFDM) channels within 10 GHz bandwidth. Here, the required sampling rate and resolution of digital-to-analog/analog-to-digital (DA/AD) converter are only 5 GS/s and 8 bits to accomplish the 40 Gb/s OFDM downstream rate. Moreover, to reduce the power fading and fiber chromatic dispersion issues, a $-$ 0.7 chirp parameter Mach-Zehnder modulator is used for the four-band OFDM modulation scheme. Downstream negative power penalty of $-$ 0.37 dB can be obtained at the bit error rate of $3.8\times 10^{-3}$ after 20 km standard single mode fiber transmission without dispersion compensation.     

Ka Band Broadband Fourth Harmonic Image Rejection Mixer

This paper presents the design and implementation of Ka band broadband hybrid integrated image rejection mixer with a fourth harmonic mixer as unit mixer. Detailed design and analysis have been carried out. The mixer was fabricated by hybrid microwave integrated circuit (HMIC) process based on the thin film ceramic substrate which can reduce the cost compared to monolithic microwave integrated circuit (MMIC). The measured results showed conversion loss less than 11.2 dB and image rejection ratio (IRR) more than 20 dB in 4 GHz RF bandwidth. It can also play the role of up-converter from the test data.     

A Novel Design of Low Power Rectenna for Wireless Sensor and RFID Applications

In this paper, an efficient microstrip rectenna operating on ISM band with high harmonic rejection is presented. By using rotated E-shaped strip in the radiating patch, a new resonance at lower frequencies (2.4 GHz) can be achieved. Also by embedding cutting a rectangular slot with protruded interdigital strip inside the slot in the feed line a frequency band-stop performance can be achieved. The proposed structure has a major advantage in high harmonic rejection. The rectenna with integrated monopole antenna can eliminate the need for an low pass filter placed between the antenna and the diode as well as produce higher output power, with maximum conversion efficiency of 74 % using a 1 K \(\Omega \) load resistor at a power density of \(0.3\,\hbox {mW/cm}^{2}\) .     

Broadband transition between air-filled waveguide and substrate integrated waveguide

A Ka-band broadband transition between an air-filled waveguide and a substrate integrated waveguide (SIW) is proposed. The transition is realised by using a radial probe inserted into the height-tapered metal waveguide. Results show that an insertion loss less than 2.5 dB and a return loss better than 14 dB in the frequency band 28.3-39.5 GHz are obtained for a back-to-back structure     

Dual-Band Antenna Fed with CPW Technology Using Modified Mirrored L-Shaped Conductor-Back Plane

This paper describes a novel configuration of a CPW-fed printed monopole antenna that depicts dual-band operations of WLAN and X-bands. The proposed antenna consists of a simple rectangular-shaped patch as the main radiator, the modified mirrored L-shaped conductor back plane element, and the partial rectangular CPW-ground surface. Dual-band performances can be obtained by embedding and adjusting dimensions of strips on mirrored L-Shaped conductor back plane element. The impedance bandwidth with \(\hbox {s}_{11} < -10\)  dB is about 2.2 GHz (5.05–7.25 GHz) or 36 % for 5 GHz band and 5.2 GHz (7.6–12.8 GHz) or 51 % for X-band. The measured peak gains are about 1.8 dBi at WLAN-band and 4.3 dBi at X-band. The Experimental results indicate that the fabricated antenna with proper dimensions, good radiation characteristics, and reasonable measured gains can be a good candidate for various applications of the future multi-band wireless communication systems and mobile device.