Analyses of interface adhesion between porous SiO2 low-k film and SiC/SiN layers by nanoindentation and nanoscratch tests

In this study, the interface adhesion between porous SiO₂ low-dielectric-constant film and SiN capping layer as well as SiC etch stop layer has been investigated. The SiN capping layer was found mostly composed of Si to N bonds, and the porous SiO₂ film composed of Si to O bonds. Elements of Si, O, and N constructed an interlayer mixing region of about 20 nm at the interface between the porous SiO₂ film and SiN capping layer. Under nanoindentation and nanoscratch tests, interface delamination between the porous SiO₂ film and both SiN capping layer and SiC etch stop layer occurred around the indented regions, and the interface adhesion strengths were accordingly obtained. The interface adhesion energy between the porous SiO₂ film and SiN capping layer was measured as about 3.7 and 0.9 J/m² by nanoindentation and nanoscratch tests, respectively, and that between the porous SiO₂ film and SiC etch stop layer was about 8.3 and 1.2 J/m².     

Effect of plasma treatments on interface adhesion between SiOCH ultra-low-k film and SiCN etch stop layer

The effect of different plasma treatments on the interfacial bonding configurations and adhesion strengths between porous SiOCH ultra-low-dielectric-constant film and SiCN etch stop layer have been investigated in this study. From X-ray photoelectron spectroscopic analyses, interlayer regions of about 10 nm thick with complicated mixing bonds were found at SiOCH/SiCN interfaces. With plasma treatments, especially H₂/NH₃ two-step plasma, a carbon-depletion region of about 30 nm thick with more Si-O related bonds of high binding energy formed at the interface. Furthermore, the adhesion strengths of the SiOCH/SiCN interfaces were measured by nanoscratch and microscratch tests. For the untreated interface, the adhesion energy was obtained as about 0.22 and 0.44 J/m² by nanoscratch and microscratch tests, respectively. After plasma treatments, especially the H₂/NH₃ treatment, the interfacial adhesion energy was effectively improved to 0.41 and 0.89 J/m² because more Si-O bonds of high binding energy formed at the interfaces.     

Effect of capping layer and post-CMP surface treatments on adhesion between damascene Cu and capping layer for ULSI interconnects

The effect of the type of capping layer and post-CMP surface treatments on the adhesion between damascene Cu and the capping layer was investigated. The CMPed-surface was treated by six methods divided into four groups which consisted of no surface treatment, cleaning by plasma with vacuum break, cleaning by plasma without vacuum break and cleaning by the wet chemical method. SiN_x and SiC were used to cap the surface after the post-CMP cleaning. The adhesion strength between Cu and the capping material was measured using a sandwiched structure constructed for the four point bending test. The X-ray photoemission spectroscopy analysis showed that the adhesion strength is related to the interfacial chemical bonds. The adhesion is influenced by the presence of contaminants and residual oxygen which inhibit the bonding of Si and Cu.     

Optimised antireflection coatings for planar silicon solar cells using remote PECVD silicon nitride and porous silicon dioxide

Silicon nitride (SiN) films fabricated by remote plasma‐enhanced chemical vapour deposition (RPECVD) have recently been shown to provide an excellent electronic passivation of silicon surfaces. This property, in combination with its large refractive index, makes RPECVD SiN an ideal candidate for a surface‐passivating antireflection coating on silicon solar cells. A major problem of these films, however, is the fact that the extinction coefficient increases with increasing refractive index. Hence, a careful optimisation of RPECVD SiN based antireflection coatings on silicon solar cells must consider the light absorption within the films. Optimal optical performance of silicon solar cells in air is obtained if the RPECVD SiN films are combined with a medium with a refractive index below 1·46, such as porous SiO₂. In this study, the dispersion of the refractive indices and the extinction coefficients of RPECVD SiN, porous SiO₂, and several other relevant materials (MgF₂, TiO_x, ZnS, B270 crown glass, soda lime glass, ethylene vinyl acetate and resin as used in commercial photovoltaic modules) are experimentally determined. Based on these data, the short‐circuit currents of planar silicon solar cells covered by RPECVD SiN and/or porous SiO₂ single‐ and multi‐layer antireflection coatings are numerically maximised for glass‐encapsulated as well as non‐encapsulated operating conditions. The porous SiO₂/RPECVD SiN‐based antireflection coatings optimised for these applications are shown to be universally suited for silicon solar cells, regardless of the internal blue or red response of the cells. Copyright © 1999 John Wiley & Sons, Ltd.     

Textured silicon surface passivation by high‐rate expanding thermal plasma deposited SiN and thermal SiO2/SiN stacks for crystalline silicon solar cells

Expanding thermal plasma (ETP) deposited silicon nitride (SiN) with optical properties suited for the use as antireflection coating (ARC) on silicon solar cells has been used as passivation layer on textured monocrystalline silicon wafers. The surface passivation behavior of these high‐rate (>5 nm/s) deposited SiN films has been investigated for single layer passivation schemes and for thermal SiO₂/SiN stack systems before and after a thermal treatment that is normally used for contact‐firing. It is shown that as‐deposited ETP SiN used as a single passivation layer almost matches the performance of a thermal oxide. Furthermore, the SiN passivation behavior improves after a contact‐firing step, while the thermal oxide passivation degrades which makes ETP SiN a better alternative for single passivation layer schemes in combination with a contact‐firing step. Moreover, using the ETP SiN as a part of a thermal SiO₂/SiN stack proves to be the best alternative by realizing very low dark saturation current densities of <20 fA/cm² on textured solar‐grade FZ silicon wafers and this is further improved to <10 fA/cm² after the anneal step. Optical and electrical film characterizations have also been carried out on these SiN layers in order to study the behavior of the SiN before and after the thermal treatment. Copyright © 2008 John Wiley & Sons, Ltd.     

MOS capacitors obtained by wet oxidation of n-type 4H-SiC pre-implanted with nitrogen

The manufacture process and the electrical characterization of MOS devices fabricated by wet oxidation of N⁺ implanted n-type 4H-SiC are here presented. Different implantation fluence and energy values were used with the aims to study the effect of the N concentration both at the SiO₂/SiC interface and within the SiO₂ film. High doses, able to amorphise a surface SiC layer to take advantage of the faster oxidation rate of amorphous with respect to crystalline SiC, were also evaluated. The electrical quality of the SiO₂/SiC system was characterized by capacitance-voltage measurements of MOS capacitors. The analyses of the collected data show that only the implanted N which is located at the oxide-SiC interfaces is effective to reduce the interface states density. On the contrary, the interface states density remains high (the same of an un-implanted reference sample) when the implanted N is completely embedded in the region consumed by the oxidation. Furthermore, none generation of fixed positive charges in the oxide was found as a consequence of the different N concentrations enclosed in the oxide films. These results were independent of the amorphisation of the implanted layer by the N⁺ ions. Our results demonstrate that by using a suitable N ion implantation and an appropriate wet oxidation treatment, it is possible to obtain a reduced thermal budget process able to decrease the interface state density near the conduction band edge. The proposed approach should be interesting for the development of the MOSFET technology on SiC.     

Surface chemistry of porous silicon carbide

The anodization reaction of SiC using HF solution makes a porous silicon carbide (PSC) layer develop. The luminescence behavior of PSC, however, is somewhat different from that of porous Si in that the so-called blue shift is not observed. Though the quantum confinement effect is said to be responsible for light emission in porous SiC, the surface state of PSC plays an important role. The effects of thermal annealing under various atmospheres on the luminescence properties were studied. Some spectroscopic analyses were adopted to elucidate the surface chemistry of PSC. The surface of PSC, which seems to be an origin of the luminescence, had C-H termination but Si-H or Si-O bonds were not detected. X-ray photoelectron spectroscopy analysis also showed that the Si-O bond that usually exists on the surface of bulk SiC was depressed and a strong peak assigned to -CH- appeared. The oxidation treatment reconstructed the Si-O bonds on the PSC surface, and this surface depressed the luminescence. Two other thermal treatments also depressed the PL spectra from the higher energy region, which is due to alternation from C-H to C-C on the surface.     

Effect of processing conditions on inversion layer mobility and interface state density in 4H−SiC MOSFETs

N-channel, inversion mode MOSFETs have been fabricated on 4H−SiC using different oxidation procedures, source/drain implant species and implant activation temperature. The fixed oxide charge and the field-effect mobility in the inversion layer have been extracted, with best values of 1.8×10¹² cm⁻² and 14 cm²/V-s, respectively. The interface state density, D_it close to the conduction band of 4H−SiC has been extracted from the subthreshold drain characteristics of the MOSFETs. A comparison of interface state density, inversion layer mobility and fixed oxide charges between the different processes indicate that pull-out in wet ambient after reoxidation of gate oxide improves the 4H−SiC/SiO₂ interface quality.     

Silicon-on-insulator structures with a nitrogenated buried SiO<Subscript>2</Subscript> layer: Preparation and properties

Electrical properties of silicon-on-insulator (SOI) structures with buried SiO₂ layer implanted with nitrogen ions are studied in relation to the dose and energy of N⁺ ions. It is shown that implantation of nitrogen ions with doses >3 × 10¹⁵ cm⁻² and an energy of 40 keV brings about a decrease in the fixed positive charge in the oxide and a decrease in the density of surface stares by a factor of 2. An enhancement of the effect can be attained by lowering the energy of nitrogen ions. The obtained results are accounted for by interaction of nitrogen atoms with excess silicon atoms near the Si/SiO₂ interface; by removal of Si-Si bonds, which are traps of positive charges; and by saturation of dangling bonds at the bonding interface of the SOI structure.     

Improved performance by using TaON/SiO2 as dual tunnel layer in Charge-Trapping nonvolatile memory

Tunneling–barrier engineered stacks with different high-κ dielectrics are investigated by fabricating the stacked structures of Al/Al₂O₃/HfLaON/ (TaON/SiO₂)/Si and Al/Al₂O₃/HfLaON/ (HfON/SiO₂)/Si. As compared to the device with HfON/SiO₂ dual tunnel layer (DTL), the one with TaON/SiO₂ DTL shows larger memory window (3.85 V at ± 13 V/1 s), higher program/erase speeds (1.85 V/−2.00 V at ± 12 V/100 μs), better endurance (window narrowing rate of 5.7% after 10⁵ cycles). The main mechanisms involved lie in (1) the higher dielectric constant of TaON which induces high electric field in the SiO₂ layer, (2) the smaller conduction/valence-band offsets between TaON and the Si substrate, and (3) better interface quality with SiO₂. Furthermore, compared with SiO₂ single tunnel layer, better retention characteristics can be achieved for the TaON/SiO₂ DTL due to its larger thickness.     

Processing parameters for selective intermixing of GaAs/AIGaAs quantum wells

Some of the parameters which determine the amount of intermixing of GaAs/AIGaAs quantum wells (QWs) using SiO₂ capping and rapid thermal annealing (RTA) have been studied using photoluminescence (PL) techniques. The degree of intermixing of QWs was found to be larger for thicker SiO₂ capping layers and for shorter distances between the QWs and the oxide-wafer interface. A maximum PL energy difference of 90 meV was observed between the region covered by a 1.3 μm thick oxide layer and the non-oxide region in a wafer that was annealed at 1100° C for 15 s.     

Bio/chemical detection in liquid with self-sensing Pr-Oxi-Lever (piezo-resistive SiO2 cantilever) sensors

The paper presents a self-sensing microcantilever for bio/chemical detection in liquid. The developed silicon piezoresistance encapsulated SiO₂ cantilever (Pr-Oxi-Lever) is with the electric interconnection wires insulated by a SU-8 coating layer for specifically detecting bio/chemical molecules in liquid environment. Functionalized with specific sensing terminals, siloxane-based molecule layer is directly modified on the cantilever SiO₂ surface via reliable Si-O covalent bond. Instead of the previously used thiol self-assembly molecule layers that show long-term instability, the modified siloxane sensing layer secures long-term sensitivity stability and long working life. The sensors have been successfully used for detection of 2.5% aqueous tetramethylammonium hydroxide (TMAH) and avidin at 10⁻¹¹ mol/mL trace level. An interesting phenomenon of opposite surface-stress sensing signals for different-sized target-molecules is experimentally observed. A simple model is proposed for preliminary explanation of this phenomenon.     

Phosphorous passivation of the SiO2/4H–SiC interface

We describe experimental and theoretical studies to determine the effects of phosphorous as a passivating agent for the SiO₂/4H–SiC interface. Annealing in a P₂O₅ ambient converts the SiO₂ layer to PSG (phosphosilicate glass) which is known to be a polar material. Higher mobility (approximately twice the value of 30–40 cm²/V s obtained using nitrogen introduced with an anneal in nitric oxide) and lower threshold voltage are compatible with a lower interface defect density. Trap density, current–voltage and bias-temperature stress (BTS) measurements for MOS capacitors are also discussed. The BTS measurements point to the possibility of an unstable MOSFET threshold voltage caused by PSG polarization charge at the O–S interface. Theoretical considerations suggest that threefold carbon atoms at the interface can be passivated by phosphorous which leads to a lower interface trap density and a higher effective mobility for electrons in the channel. The roles of phosphorous in the passivation of correlated carbon dangling bonds, for SiC counter-doping, for interface band-tail state suppression, for Na-like impurity band formation and for substrate trap passivation are also discussed briefly.     

Intra-level voltage ramping-up to dielectric breakdown failure on Cu/porous low-k interconnections in 45 nm ULSI generation

The degradation of reliability for intra-level voltage-breakdown in the 45 nm generation node has become an increasingly important issue with the introduction of porous low-k dielectrics. The dominant failure mechanism for lower voltage ramping-up to dielectric breakdown and higher leakage current was that more electrons easily transported through the percolation path in intra-level porous low-k interconnections damaged from HF corrosion. An optimal ultraviolet curing process and a less NH₃ plasma pre-treatment on porous low-k dielectrics before the SiCN capping layer are developed to improve performance in both of these cases. The stiff configuration of the reconstruction of Si-O network structures and less HF corrosion is expected to have high tolerance to electrical failure. As a result, the proposed model of this failure facilitates the understanding of the reliability issue for Cu/porous low-k interconnections in back-end of line (BEOL) beyond 45 nm nodes.     

Traps with near-midgap energies at the bonded Si/SiO<Subscript>2</Subscript> interface in silicon-on-insulator structures

Capture centers (traps) are studied in silicon-on-insulator (SOI) structures obtained by bonding and hydrogen-induced stratification. These centers are located at the Si/SiO₂ interface and in the bulk of the split-off Si layer. The parameters of the centers were determined using charge deep-level transient spectroscopy (Q-DLTS) with scanning over the rate window at fixed temperatures. Such a method allows one to study the traps near the Si midgap at temperatures near 295 K. It is shown that the density of traps with a continuous energy spectrum, which are located at the bonded Si/SiO₂ interface, decreases by more than four orders of magnitude at the mid-gap compared with the peak density observed at the activation energy E _a ≈0.2–0.3 eV. The capture centers are also found in the split-off Si layer of the fabricated SOI structures. Their activation energy at room temperature is E _a =0.53 eV, the capture cross section is 10^?19 cm², and the concentration is (0.7–1.7)×10¹³ cm^?3. It is assumed that these capture centers are related to deep bulk levels induced by electrically active impurities (defects) in the split-off Si layer close to the Si/SiO₂ interface.     

Impact of LKD5109™ low-k to cap/liner interfaces in single damascene process and performance

The importance of interface quality in the single damascene integration process of LKD5109™ porous low-k films is investigated. A strong correlation is observed between chemical mechanical planarization (CMP) performance and LKD/cap layer interfacial fracture energies. The use of FF02™ as cap layer material (an on-purpose developed spin-on organic hard-mask) on LKD leads to superior interfacial adhesion and metal continuity yield as compared to the use of chemical vapour deposition SiC:H cap films. The adhesion quality of LKD/liner films appears less critical than LKD/cap layer adhesion as far as CMP performance is concerned. Electrical line-to-line performance is not always directly correlated with adhesion but rather, more generally speaking, with interface quality (i.e., presence of defects/dangling bonds or moisture). The introduction of surface pre-treatments to enhance interfacial adhesion leads to degradation in both leakage current and breakdown field behaviour because of damage induced at the interface.     

Nanomechanical analyses of porous SiO2 low-dielectric-constant films for evaluation of interconnect structure reliability

Porous SiO₂ low-dielectric-constant films containing different porosities and sizes of uniformly distributed pores were prepared in this study. Their nanomechanical properties including true flow stress and fracture toughness were analyzed by a nanoindentation test. The hardness and elastic modulus of the films prepared with an ethanol molar ratio of 3 and an aging time of 16 h reached maximum values of 2.4 and 40 GPa, respectively. With increasing ethanol molar ratio, the porosity increased, and the mechanical properties consequently decreased. With increasing aging time, the mechanical properties increased and then dropped due to enlarged pore sizes. From converted true flow stress, the porous SiO₂ films were found to yield at an ultimate stress of 3.1 GPa, and the maximum fracture energy release rate was calculated as 3.4 J/m². The plastic deformation and fracture behavior of the porous films was observed through crack initiation and propagation along the large amount of pores.     

Study of nitrogen impact on VFB-EOT roll-off by varying interfacial SiO2 thickness

Flat band voltage (V_FB) roll-off in long channel devices at thin equivalent oxide thickness (EOT) is studied on SiO₂/nitrided-HfSiO stacks. V_FB increases when SiO₂ interfacial layer thickness decreases, and charges pumping (CP) frequency sweep analysis shows higher trap density near Si/SiO₂ interface. Based on this observation, an atomic diffusion model is introduced. Higher concentration of nitrogen atom in the HfSiO(N) layer diffuses to the Si/SiO₂ interface through the SiO₂ layer in thinner SiO₂ device, and accumulates near Si/SiO₂ interface which can introduce higher density of interfacial traps. Lifetime extracted from negative bias temperature instability (NBTI), and mobility are also degraded in thinner SiO₂ devices due to the higher interfacial trap density.The V_FB roll-off can be improved by lowering nitrogen concentration in the HfSiO(N) layer from optimizing plasma nitridation pressure, decreasing post deposition anneal temperature, or using defect absorbing layer on the high-k oxide.     

Local structure around iron at the SiO2/Si interface

We have investigated the local structure around iron at the SiO₂/Si interface by the total-reflection fluorescence x-ray absorption fine structure technique, in conjunction with measurements of the angular dependence of x-ray fluorescence intensity. The Fe-O, Fe-Si and Fe-Fe bondings were observed around iron, in the layer formed at the SiO₂/Si interface. These results show the formation of iron silicate, consisting of iron, oxygen and silicon elements. The chemical state of iron was determined from the Fe-O bond-lengths. The Fe-valence is a mixture of Fe³⁺ and Fe²⁺, mostly Fe³⁺. These results indicate that the layer formed at the SiO₂/Si interface is iron silicate, in which a portion of Fe³⁺ ions were reduced.     

Optical and electrical characteristics of 17 keV X-rays exposed TiO2 films and Ag/TiO2/p-Si MOS device

This work presents the effect of varied doses of X-rays radiation on the Ag/TiO₂/p-Si MOS device. The device functionality was observed to depend strongly on the formation of an interfacial layer composed of SiO_x and TiO_y, which was confirmed by the spectroscopic ellipsometry. The XRD patterns showed that the as prepared TiO₂ films had an anatase phase and its exposure to varied doses of 17 keV X-rays resulted in the formation of minute rutile phase. In the X-rays exposed films, reduced Ti³⁺ state was not observed; however a fraction of Ti–O bonds disassociated and little oxygen vacancies were created. It was observed that the device performance was mainly influenced by the nature and composition of the interfacial layer formed at the TiO₂/Si interface. The spectroscopic ellipsometry was used to determine the refractive indices of the interfacial layer, which was 2.80 at λ=633 nm lying in between that of Si (3.87) and TiO₂ (2.11). The dc and frequency dependent electrical measurements showed that the interface defects (traps) were for both types of charge carriers. The presence of SiO_x was responsible for the creation of positive charge traps. The interface trap density and relaxation time (τ) were determined and analyzed by dc and frequency dependent (100 Hz–1 MHz) ac-electrical measurements. The appearance of peak in G/ω vs log (f) confirmed the presence of interface traps. The interface traps initially increased up to exposure of 10 kGy and then decreased at high dose due to compensation by the positive charge traps in SiO_x part of the interface layer. It was observed that large number of interface defects was active at low frequencies and reduced to a limiting value at high frequency. The values of relaxation time, τ ranged from 4.3±0.02×10⁻⁴ s at 0 V and 7.6±0.2×10⁻⁵ s at −1.0 V.