新型硅基GaN外延材料的热应力模拟

采用有限元方法，通过ANSYS软件模拟了体硅衬底上和SOI衬底上生长的GaN外延膜从1100℃的生长温度降到20℃的热应力变化情况。模拟结果表明SOI衬底作为一种柔性衬底，能有效减少异质外延的晶格失配，但是单从热失配的角度，由于引入了热膨胀系数（CET）更小的埋层SiO2，SOI衬底会使得外延层热应力略有增大。为了降低外延层中的热应力，我们结合微机电系统（MEMS）的制造工艺，用深反应离子刻蚀（DRIE）的方法，借助于SOI材料自停止刻蚀的优势，将衬底硅和埋氧去除，使得SOI的超薄顶层硅部分悬空，形成一种新型的SOI衬底。模拟结果表明，这种新型SOI衬底可以将GaN外延层中的热应力降低20％左右。     

GaN基底上集成介电薄膜材料的生长方法研究

将以极化为特征、具有丰富功能特性的介电氧化物材料通过外延薄膜的方式,在半导体GaN上制备介电氧化物/GaN集成薄膜,其多功能一体化与界面耦合效应可推动电子系统单片集成化的进一步发展。然而,由于2类材料物理、化学性质的巨大差异,在GaN上生长介电薄膜会出现严重的相容性生长问题。采用激光分子束外延技术(LMBE),通过弹性应变的TiO2的缓冲层来减小晶格失配度,降低介电薄膜生长温度,控制界面应变释放而产生的失配位错,提高了介电薄膜外延质量;通过低温外延生长MgO阻挡层,形成稳定的氧化物/GaN界面,阻挡后续高温生长产生的扩散反应;最终采用TiO2/MgO组合缓冲层控制介电/GaN集成薄膜生长取向、界面扩散,降低集成薄膜的界面态密度,保护GaN半导体材料的性能。所建立的界面可控的相容性生长方法,为相关集成器件的研发提供了一条可行的新途径。     

图形化SOI衬底上侧向外延生长GaN研究

采用MOCVD系统,在图形化的绝缘体上硅(SOI:silicon-on-insulator)衬底上侧向外延生长了GaN薄膜。利用SEM、TEM和Raman光谱对生长的GaN薄膜的质量进行了分析研究。研究发现,在GaN的侧向外延生长区域,侧向生长的GaN能够完全合并,GaN薄膜内的残余应力减小,穿透位错密度大幅度降低。     

金属缓冲层上生长GaN薄膜的结构、发光性能及其生长机理

为了解决硅衬底与GaN之间的晶格失配和热失配问题,实验尝试采用常压化学气相沉积法(APCVD),分别以金属镓(Ga)和氨气(NH3)为镓源和氮源,在加入A1、Au/Al两种金属缓冲层和不加缓冲层的硅衬底上生长氮化镓(GaN)薄膜.采用高分辨X射线衍射仪(HRXRD)、X-ray能谱仪(EDS)、场发射扫描电子显微镜(F...     

产业资讯

电子信息材料南昌大学研制成功硅衬底GaN蓝色发光二极管日前,南昌大学材料科学研究所在Si衬底上获得了高质量的GaN基多量子阱LED外延材料,并研制成功硅衬底GaN蓝色发光二极管。据专家评价,南昌大学的硅衬底蓝色发光二极管材料及器件工艺路线为我国发展自主知识产权的发光材料开辟了崭新的空间。蓝色发光二极管用途十分广泛,主要包括手机背光源、手机来电闪发光电池、仪器及汽车音响显示面板背光等。目前国外商品化GaN材料是在Si衬底或蓝宝石上生长的。由于GaN 与Si衬底间存在巨大的晶格失配和热失配的难题,在Si衬底上很难得到器件质量的GaN材     

SOI基GaN生长中热应力的模拟计算分析

通过分析SOI基GaN生长的机制,结合热膨胀系数不同而产生应力的原理,利用弹性力学原理,我们对已有的计算多层结构应力的模型进行了简化修改,得到了能够方便的计算SOI基GaN生长过程中的热应力分布的模型.对具体样品的模拟计算表明,GaN层中张应力的值约为0.5GPa,曲率半径为9.1m.SOI结构中SiO2埋层以及顶层硅厚度变化对GaN层的热应力影响很小,但是对SOI自身各层中应力影响较大.通过合理简化模型,我们分析了蓝宝石基以及SiC基GaN生长中的热应力的分布问题.     

HgCdTe/CdZnTe液相外延材料的倒易空间图研究

采用高分辨X射线衍射的例易空间图研究了HgCdTe／CdZnTe(-0．044％晶格失配)液相外延材料界面处品格结构，结果显示，通常使用的10μm厚的碲镉汞液相外延材料的晶格相对碲锌镉衬底已处于完全弛豫状态，并且外延层和衬底的品向发生了0．01。的偏离，但是，由于外延层中存在着组分梯度以及衬底和外延层热膨胀系数存在着差异，界面处外延层中仍存在着应力和应变。对称衍射和非对称衍射的实验结果均显示外延材料的例易空间图沿垂直于散射矢量方向有所扩展．这一结果表明晶格失配的弛豫使得界面处外延层的晶体结构呈镶嵌结构。实验也发现，外延层的非对称衍射倒易空间图的扩展偏离散射矢量方向，根据弛豫线模型，这也是由于界面处外延层存在组分梯度和应变梯度所造成的。     

不同厚度对分子束外延生长GaSb薄膜的影响

采用分子束外延(MBE)在GaAs衬底上生长GaSb薄膜,为了减小因晶格失配度较大所引起的位错密度,采用低温GaSb作为缓冲层.通过X射线双晶衍射仪和原子力显微镜分析得出,当低温GaSb缓冲层的厚度为20nm时,GaSb外延层中的位错密度最小,晶体质量最好.此外,缓冲层和外延层的厚度共同对GaSb薄膜晶体质量和表面形貌产生影响.     

缓冲层生长速率对GaSb薄膜二维生长的影响

用分子束外延(MBE)法在GaAs(100)衬底上生长GaSb薄膜,得到了GaSb薄膜的优化生长工艺条件.为了降低因晶格失配度较大所引起的位错密度,采用低温(LT)GaSb作为缓冲层,研究了缓冲层的生长速率对GaSb薄膜二维生长的影响,并以此说明缓冲层在GaSb薄膜生长中所起的作用.通过X射线双晶衍射仪和原子力显微镜测试分析,得到当低温GaSb缓冲层的生长速率为1.43μm/h时,GaSb外延层中的位错密度最小,晶体质量最好.     

Si(111)衬底上3C-SiC的固源MBE异质外延生长

国内首次利用固源分子束外延(MBE)技术,在衬底温度为1100℃时,以Si(111)为衬底成功地外延生长出了3C-SiC单晶薄膜。通过X射线衍射(XRD)、拉曼光谱(Raman)以及原位反射高能电子衍射(RHEED)等手段研究了外延薄膜的晶型、结晶质量、外延膜与衬底的外延取向关系,并考察了薄膜制备过程中衬底的碳化对薄膜质量的影响。结果表明,外延膜与衬底晶格取向完全一致;碳化可以减小SiC和衬底Si之间的晶格失配、释放应力、引入成核中心,有利于薄膜单晶质量的提高;碳化温度存在最佳值,这一现象与成核过程有关。     

Stress reduction in GaN films on (111) silicon-on-insulator substrate grown by metal-organic chemical vapor deposition

The GaN film was grown on the (111) silicon-on-insulator (SOI) substrate by metal-organic chemical vapor deposition and then annealed in the deposition chamber. A multiple beam optical stress sensor was used for the in-situ stress measurement, and X-ray diffraction (XRD) and Raman spectroscopy were used for the characterization of GaN film. Comparing the characterization results of the GaN films on the bulk silicon and SOI substrates, we can see that the Raman spectra show the 3.0 cm^− 1 frequency shift of E₂(TO), and the full width at half maximum of XRD rocking curves for GaN (0002) decrease from 954 arc sec to 472 arc sec. The results show that the SOI substrates can reduce the tensile stress in the GaN film and improve the crystalline quality. The annealing process is helpful for the stress reduction of the GaN film. The SOI substrate with the thin top silicon film is more effective than the thick top silicon film SOI substrate for the stress reduction.     

Enhanced performance of GaN-based LEDs via electroplating of a patterned copper layer on the backside

InGaN/GaN multi-quantum well light-emitting diodes (LEDs) are conventionally grown on a sapphire substrate due to a lack of compatible substrates with a high compressive strain. This is a result of the relatively large lattice, and thermal expansion coefficient mismatches between GaN and sapphire. The compressive strain is considered to be a major obstacle to further improve next-generation high-performance GaN-based LEDs. In this paper, we have designed, electroplated, and tested an efficient substrate using a patterned copper (Cu) layer on the backside of sapphire to relax the compressive strain in a GaN epilayer. The patterned Cu layer has a significant function in that it supports the GaN/sapphire LEDs with an external tensile stress. The external tensile stress is capable of compensating for the compressive strain in the GaN/sapphire LEDs by controlling the curvature of the wafer bowing. This patterned Cu layer, when applied to the GaN/sapphire LEDs, suppresses the compressive strain by up to 0.28 GPa. The GaN-based LEDs on this innovative and effective sapphire/Cu substrate offer improved optical and electrical performance.     

Nonuniformities in free-standing GaN substrates

In this study, we report that free-standing GaN substrates grown by the hydride vapor-phase epitaxy (HVPE) are found to contain nonuniform regions with low crystal and optical quality located close to the top (near as-grown surface) and bottom (near interface between GaN/sapphire) regions of substrate cross-section. We considered that the origins of these nonuniformities were surface reconstruction by undesired residual gas reaction after crystal growth on the top regions and the individual columns forming an irregular layer in the bottom regions by lattice mismatch and difference of thermal expansion coefficient between GaN films and sapphire substrate. We used cathodoluminescence imaging and spectroscopy for analyzing these nonuniform regions. The low quality regions with high electron concentration are easily visualized using cathodoluminescence (CL). The coexistence of regions with low- and high quality allows us to explain the concurrent evidence of high substrate quality in double crystal X-ray diffraction and photoluminescence (PL).     

Influence of double buffer layers on properties of Ga-polarity GaN films grown by rf-plasma assisted molecular-beam epitaxy

Ga-polarity GaN thin films were grown on sapphire (0001) substrates by rf-plasma assisted molecular beam epitaxy (MBE) using a double buffer layer, which consisted of an intermediate-temperature GaN buffer layer (ITBL) grown at 690 °C and a conventional AlN buffer layer deposited at 740 °C. Raman scattering spectra showed that the E₂ (high) mode of GaN film grown on conventional AlN buffer layer is at about 570 cm⁻¹, and shifts to 568 cm⁻¹ when an ITBL was used. This indicates that the ITBL leads to the relaxation of residual strain in GaN film caused by mismatches in the lattice constants and coefficients of thermal expansion between the GaN epilayer and the sapphire substrate. Compared to the GaN film grown on the conventional AlN buffer layer, the GaN film grown on an ITBL shows higher Hall mobility and substantial reduction in the flicker noise levels with a Hooge parameter of 3.87×10⁻⁴, which is believed to be, to date, the lowest reported for GaN material. These results imply that the quality of Ga-polarity GaN films grown by MBE can be significantly improved by using an ITBL in addition to the conventional low-temperature AlN buffer layer.     

InGaAs quantum dots grown by molecular beam epitaxy for light emission on Si substrates

The aim of this study is to achieve homogeneous, high density and dislocation free InGaAs quantum dots grown by molecular beam epitaxy for light emission on silicon substrates. This work is part of a project which aims at overcoming the severe limitation suffered by silicon regarding its optoelectronic applications, especially efficient light emission device. For this study, one of the key points is to overcome the expected type II InGaAs/Si interface by inserting the InGaAs quantum dots inside a thin silicon quantum well in SiO2 fabricated on a SOI substrate. Confinement effects of the Si/SiO2 quantum well are expected to heighten the indirect silicon bandgap and then give rise to a type I interface with the InGaAs quantum dots. Band structure and optical properties are modeled within the tight binding approximation: direct energy bandgap is demonstrated in SiO2/Si/InAs/Si/SiO2 heterostructures for very thin Si layers and absorption coefficient is calculated. Thinned SOI substrates are successfully prepared using successive etching process resulting in a 2 nm-thick Si layer on top of silica. Another key point to get light emission from InGaAs quantum dots is to avoid any dislocations or defects in the quantum dots. We investigate the quantum dot size distribution, density and structural quality at different V/III beam equivalent pressure ratios, different growth temperatures and as a function of the amount of deposited material. This study was performed for InGaAs quantum dots grown on Si(001) substrates. The capping of InGaAs quantum dots by a silicon epilayer is performed in order to get efficient photoluminescence emission from quantum dots. Scanning transmission electronic microscopy images are used to study the structural quality of the quantum dots. Dislocation free In50Ga50As QDs are successfully obtained on a (001) silicon substrate. The analysis of QDs capped with silicon by Rutherford Backscattering Spectrometry in a channeling geometry is also presented.     

Effect of high temperature AlGaN buffer thickness on GaN Epilayer grown on Si(111) substrates

Crack-free GaN epitaxial layer was obtained through inserting 80 nm graded AlGaN buffer layer between GaN epilayer and high temperature AlN buffer on 2-in Si(111) substrates by metal organic chemical vapor deposition. This paper investigated the influence of AlGaN buffer thickness on the structural properties of the GaN epilayer. It was confirmed from the optical microscopy and scanning electronic microscopy that the graded AlGaN buffer with optimized thickness had a remarkable effect on introducing relative compressive strain to the top GaN layer and preventing the formation of cracks. X-ray diffraction and atomic force microscopy analysis showed that AlGaN buffer with proper thickness could improve the crystal quality and surface morphology of the GaN film. Transmission electron microscopy analysis revealed that a significant reduction in threading dislocations was achieved in GaN epilayer by the insertion of graded AlGaN buffer.     

硅基沉积氮化镓,碳化硅,III –V 族及其合金材料研究进展

硅基沉积氮化镓, 碳化硅, III-V 族及其合金材料是近年来的研究热点. 氮化镓, 碳化硅及其III-V 材料在光电子和电子元件领域有着广泛的应用.例如大功率, 高速器件, 大型激光器, 紫外探测器等等. 尽管硅基片具有低成本, 大的尺寸,和极好的电热导性能等优点, 硅基片仍没有成为氮化镓, 碳化硅及III – V 的主要沉积基片, 其原因在于硅基片与氮化镓, 碳化硅及III-V 材料之间的热膨胀系数和晶格常数之间的失配. 自从1998年, IBM 的课题组用分子外延方法在硅基片上沉积氮化镓, 并且成功地制备了氮化镓激光器之后, 硅基氮化镓的研究开始备受关注. 近年来的研究发现, 使用氧化铝和氮化铝镓作为过渡层. 硅基氮化镓的热应力及与硅基片之间的晶格失配可以明显降低.在 6英寸的(111) 取向的硅基片上用化学气相方法可以成功地沉积超过一个微米厚的无裂纹的单晶氮化镓. 德国的AZZURRO 公司成功地制备硅基片氮化镓的大功率的蓝色激光器. 美国的NITRINEX公司也生产了硅基氮化镓大功率电子元件. 超大功率的硅基氮化镓电子元件仍在研究中. 在2007年, 英国政府设立了一个固体照明器件的研究项目. 主要着手研究6英寸的硅基氮化镓激光器. 另一方面, 在过去的40年, 超大规模硅基CMOS 技术已有了长足的发展, 下一代低功耗高速逻辑电路要求低的驱动电流, 小的活门尺寸低于 30 nm 和快速反应性能. 这就要求器件通道材料具有很高的电子(或空穴)迁移率. III-V 材料, 例如InSb, InAs, 和InGaAs 具有电子迁移率高达 80000 cm2/VS. 它们将是下一代低于 30 nm 硅基CMOS 器件最好的候选材料. 在 2007 年美国DARPA/MTO 设立了一个研究项目来发展硅基 III-V材料器件, 着重于发展高速硅基III-V材料CMOS 器件. 第一届”硅基氮化镓,碳化硅,III-V及其合金材料研究进展 ”国际会议也将于3月 24日-28日在旧金山MRS 2008年初春季会议上召开.     

The influence of reactor height adjustment on properties in GaN films grown on 6H-SiC by metal organic chemical vapor deposition

The influence of reactor height adjustment on properties in GaN films grown on 6H-SiC by metal organic chemical vapor deposition (MOCVD) was investigated. The property of GaN epilayer was investigated by atomic force microscopy, X-ray diffraction, low-temperature (10 K) photoluminescence and the Raman scattering. It is found that, as the spacing between showerhead and susceptor decreased, the growth rate increased and the tensile stress decreased. This result may be useful to control the stress in GaN thin films grown on silicon carbide substrate by MOCVD.     

Epitaxial growth of InP nanowires on germanium

The growth of III-V semiconductors on silicon would allow the integration of their superior (opto-)electronic properties with silicon technology. But fundamental issues such as lattice and thermal expansion mismatch and the formation of antiphase domains have prevented the epitaxial integration of III-V with group IV semiconductors. Here we demonstrate the principle of epitaxial growth of III-V nanowires on a group IV substrate. We have grown InP nanowires on germanium substrates by a vapour-liquid-solid method. Although the crystal lattice mismatch is large (3.7%), the as-grown wires are monocrystalline and virtually free of dislocations. X-ray diffraction unambiguously demonstrates the heteroepitaxial growth of the nanowires. In addition, we show that a low-resistance electrical contact can be obtained between the wires and the substrate.