Systematic Synthesis of Active-RC Circuit Building-Blocks

In this paper, we show how some basic building blocks for active-RC circuit design, such as amplifiers, impedance converters and simulated inductance circuits, may be synthesised in a systematic way by expansion of their port admittance matrices. The circuit topology emerges from the synthesis procedure, allowing all possible implementations to be identified and explored. Nullors representing ideal op-amps and transistors are represented within the nodal admittance matrix of a synthesised circuit by linked infinity parameters. In nodal admittance matrices describing ideal circuits synthesised, the replacement of linked infinity parameters by finite parameters provides a seamless transition to non-ideal analysis and practical circuit design.Now with the Singaporean Armed Services.David Haigh was born in Middlesex, England, in 1946. He obtained the B.Sc. degree in Electrical Engineering from Bristol University in 1968 and in 1976 he received the Ph.D. degree from the University of London. From 1968 until 1972 he worked under Dr. Wolja Saraga first at the GEC Hirst Research Centre and then, from 1972, at Imperial College London where he worked on microelectronic high precision filters. In 1987 he joined the staff of the Electronic and Electrical Engineering Department of University College London, where he studied analogue integrated circuit design with particularly interest in high frequency circuits. In 2003 he re-joined the Department of Electrical and Electronic Engineering at Imperial College London, where his interests broadened to include general approaches for analogue circuit synthesis. He is editor-in-chief (Europe) of the Analog Integrated Circuits and Signal Processing Journal.Fang Qun Tan graduated with a B.Eng. degree from Imperial College London in 2002. He then studied for the M.Sc. in Analogue and Digital integrated Circuit Design at Imperial College and graduated with distinction in 2003. His M.Sc. project was on the subject of systematic synthesis methods for analogue circuits. At present Fang Qun is with the Singapore Armed Services.Christos Papavassiliou was born in Athens, Greece, in 1960. He received the B.Sc. degree in physics from the Massachusetts Institute of Technology and the Ph.D. degree in Applied Physics from Yale University. He has worked on monolithic microwave integrated circuit (MMIC) design and measurements at FORTH in Crete, Greece, and has been involved in several European and regional projects on GaAs MMIC technology. In 1996 he joined Imperial College London, where he is currently a Senior Lecturer. He currently works on SiGe technology development as well as instrumentation and substrate noise coupling in mixed mode integrated circuit design. He has 30 publications.     

A Prototype Bandpass Sigma-Delta Modulator Employing Crystal Resonator

This paper describes an initial work on a second-order bandpass Sigma-delta modulator employing crystal resonator. The aim of this work is to explore the possibilities of realizing bandpass sigma-delta modulator using non-electronic resonators, such as micro-mechanical resonators. The initial study is based on crystal resonators as they have similar characteristics as the other types of resonator and are readily available. In order to obtain the desired loop transfer function, a compensation circuit is proposed to cancel the anti-resonance in the crystal resonator. The modulator chip is fabricated in a 0.6-μ m CMOS process. The bandpass noise shaping is demonstrated in the experiment with a 1- and 8-MHz crystal resonator, respectively. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R.China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. He is a Senior Member of IEEE. Xiaofeng Wang was born in Shangqiu, China, in 1980. He received B.Eng. degree from Northwestern Polytechnical University, Xi'an, China, in 2000 and M. Eng. degree from National University of Singapore, Singapore, in 2003, both in electrical engineering. He is currently working toward the Ph.D. degree at Tufts University, Medford, USA. His research is on high speed ADC design. Wai Hoong Sun was born in Taiping, Malaysia in 1976. He received the B. App. Sc. (Honours) degree in electrical engineering from the University of Toronto, Canada in 1999. After graduating, he joined Sharp Electronics Singapore as an R&D Engineer where he was involved in FPGA and digital IC design of display related circuits. In 2001 and 2002, he did full time research in the National University of Singapore on bandpass sigma-delta modulators. During that period, he was also a Graduate Tutor in electronics for second year electrical and computer engineering students. He then joined Philips Electronics Singapore in 2002 as a Lead Engineer. He did board-level designs for LCD and plasma televisions. He was also development project leader for a project that was successful in bringing to the market a range of LCD and plasma televisions. Currently, he is a Hardware Architect where he is responsible for the system-level electrical design of the television board.     

A new CMOS class AB serial link transmitter with a low supply voltage sensitivity

This paper presents a new class AB transmitter with a low supply voltage/ground bouncing sensitivity for 10 Gb/s serial links. The low sensitivity of the output current to supply voltage fluctuation and ground bouncing is achieved by operating the system in a rail-to-rail swing mode. High data rates are obtained by multiplexing at low-impedance nodes and inductive shunt peaking with active inductors. The fully differential configuration and bipolar signaling of the transmitter minimize the effect of both common-mode disturbances and electro-magnetic interferences exerted from channels to neighboring devices. The class AB operation of the transmitter minimizes its static power consumption. The proposed transmitter is implemented in a 1.2 V 0.13μm CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3v3 device models. Both pre and post-layout simulation results demonstrate that the transmitter conveys a sufficiently large differential output current that is insensitive to supply voltage fluctuation and ground bouncing at 10 Gb/s. Fei Yuan received the B.Eng. degree in electrical engineering from Shandong University, Jinan, China in 1985, the M.A.Sc. degree in chemical engineering, and Ph.D. degree in electrical engineering from University of Waterloo, Waterloo, Ontario, Canada in 1995 and 1999, respectively. During 1985–1989, he was a Lecturer in the Department of Electrical Engineering, Changzhou Institute of Technology, Jiangsu, China. In 1989 he was a Visiting Professor at Humber College of Applied Arts and Technology, Toronto, Ontario, Canada, and Lambton College of Applied Arts and Technology, Sarnia, Ontario, Canada. He was with Paton Controls Limited, Sarnia, Ontario, Canada as a Controls Engineer during 1989–1994. Since 1999 he has been with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada, where he is currently an Associate Professor and the Associate Chair for Undergraduate Studies and Faculty Affairs. He is the co-author of the book Computer Methods for Analysis of Mixed-Mode Switching Circuits (Springer-Verlag, 2004, with Ajoy Opal). Dr. Yuan received the Ryerson Research Chair award from Ryerson University in Jan. 2005, the Research Excellence Award from the Faculty of Engineering and Applied Science of Ryerson University in 2004, the post-graduate scholarship from Natural Science and Engineering Research Council of Canada during 1997–1998, and the Teaching Excellence Award from Changzhou Institute of Technology in 1988. Dr. Yuan is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada. Minghai Li received the B.Eng. (96) and M.A.Sc (06) degrees from North University of China and Ryerson University, Toronto, Ontario, Canada, respectively, both in Electrical and Computer Engineering. During 1996–2001, he was with Motorola Semiconductor (China) as a MCU product engineer. He was involved with MCU new product design, simulation, and test program development. He was a research assistant and a M.A.Sc student with the Microsystems Research Laboratory in the Department of Electrical and Computer Engineering at Ryerson University. He is now with Micron Technology Inc., Boise, Idaho, USA as a design engineer. His research interest is in the design of CMOS mixed-signal circuits for high-speed data transmission, including multiplexer, driver, pre-emphasis, and VCOs.     

A Reconfigurable Gaussian/Triangular Basis Functions Computation Circuit

A CMOS Gaussian/Triangular Basis functions computation circuit suitable for analog neural networks is proposed. The circuit can be configured to realize any of the two functions. The circuit can approximate these functions with relative root-mean-square error less than 1%. It is shown that the center, width, and peak amplitude of the dc transfer characteristic can be independently controlled. SPICE simulation results using 0.18 μ m CMOS process model parameters of TSMC18 technology are included. Muhammad Taher Abuelma'Atti was born in Cairo, Egypt, in 1942. He received the B.Sc. degree in Electrical Engineering in 1963 from the University of Cairo, Cairo, Egypt, the Ph.D. degree in 1979 and the Doctor of Science degree in 1999 both from the University of Bradford, Bradford, England. From 1963 to 1967, he worked at the Military Technical College in Cairo as a Teaching Assistant. He was with the Iron and Steel Company in Helwan, Cairo, from 1967 to 1973 as a Senior Electrical Engineer. From 1973 to 1976 he was with the College of Engineering, University of Riyadh, Saudi Arabia, as a Teaching Assistant. From 1980 to 1981, he worked with the Faculty of Engineering, University of Khartoum, Sudan, as an Assistant Professor, and from 1981 to 1982 he was with the College of Engineering, King Saud University, Riyadh, Saudi Arabia, as an Assistant Professor. In 1982 he joined the College of Engineering, University of Bahrain and in 1987 he became an Associate Professor. In 1991 he joined the College of Engineering Sciences, King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia, where he became a Full Professor in January 1995. Dr. Abuelma'Atti is the recipient of the 1994/1995 Excellence in Teaching Award and the 1995/1996 and 2000/2001 Excellence in Research Award. Both at King Fahd University of Petroleum and Minerals. Dr. Abuelma'Atti is a contributor to Encyclopedia of RF and Microwave Engineering, Kai Chang, Editor, (New York: John Wiley, 2005), Survey of Instrumentation and Measurement, S.A. Dyer, Editor, (New York: John Wiley, 2001), The Encyclopedia of Electrical and Electronic Engineering, J.G. Webster, Editor, (New York:John Wiley, 1999), and Selected Papers on Analog Fiber-Optic Links, E.I. Ackerman, C.H. Cox III and N.A. Riza, Editors, SPIE Milestone Series, (Washington: SPIE Optical Engineering Press, 1998). His research interests include problems related to analysis and design of nonlinear electronic circuits and systems, analog integrated circuits and active networks design. He is the author or co-author of over 500 journal articles and technical presentations. Abdullah Bakri Shwehneh was born in Aleppo Syria, in 1973. He received the B. Sc. degree in electrical engineering in 1998 from Sumy State University, Sumy, Ukraine. In 2001, he received the Postgraduate Diploma in Automatic Control from Aleppo State University, Aleppo, Syria. In 2001, he joined the “Electronic Brain Company for Computer and Electronics” as an Electronic & Computer Engineer and since 2002, he is with King Fahd University of Petroleum and Minerals (KFUPM), Dhahran, Saudi Arabia, as a Research Assistant. In June 2005 he obtained his Master of Science Degree in Analog Electronics from KFUPM. At present he is a Ph.D. student at KFUPM. His main interests are in Nonlinear circuits, VLSI Analog Design and Neural Networks hardware implementation.     

A New Static Differential CMOS Logic with Superior Low Power Performance

A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, making it simple to design. The circuit topology of the DSCL and its operation is explained. Delay optimization of the new circuits was performed. It showed the fully static behavior of these circuits. Their performance in terms of delay, power, and area is compared to that of conventional static differential logic and dynamic differential logic. Spice simulations using a 0.18 m technology with a power supply of 1.8 V was utilized to evaluate the performance of the three circuits. Two different sets of simulations were carried out; one with equal input capacitances of all circuits and another with equal circuit delays. For each design, all circuits were optimized for minimum delay. It is shown that at equal input capacitance, the DSCL achieved 40% less delay than the DCVSL at one third the power. Also, at equal delay, the DSCL achieved 20% of the power dissipation of the DCVSL and 78% of the DDCVSL making it the most energy-efficient among the three circuits.Muhammad E.S. Elrabaa received his B.Sc. degree in computer Engineering from Kuwait University, Kuwait in 1989, and his M.A.Sc. and PhD degrees in Electrical Engineering from the University of Waterloo, Waterloo, Canada, in 1991 and 1995, respectively. His graduate research dealt with Digital BiCMOS ICs and Low-Power circuit techniques. From 1995 till 1998, he worked as a senior circuit designer with Intel Corp., in Portland, Oregon, USA. He designed and developed low power digital circuits for Microprocessors. From 1998 till 2001 he was with the EE department, UAE University as an assistant professor. In 2001, he joined the computer Engineering department, KFUPM University. His current research interests include reconfigurable computing, low-power circuits, and communication circuits. He authored and co-authored several papers, a book and holds two US patents.     

A Low Voltage Wide-Input-Range Bulk-Input CMOS OTA

The G_m-C technique is extensively used for continuous-time filtering applications because it results in tunable, wideband and compact designs. In this paper, an OTA architecture using a novel bulk-input differential pair without the use of a tail current source is proposed. Good CMRR is still achieved by using the gate terminal to control the total current in the differential pair, via the use of a dummy pair. The OTA also exhibits a wide differential input range and good G_m-tunability. For this design, two standard double-poly double-metal CMOS processes were investigated: a 0.8 m process having a nominal threshold voltage of around 0.7 V and a 0.35 m process having a nominal threshold voltage of 0.5 V. Simulation results are presented for both designs while test results are presented, for the OTA, implemented using the 0.8 m process, used in a second order cochlea low-pass filter.Ivan Grech received his B.Eng.(Hons.) degree in 1993 and M.Sc. in 1996 from the University of Malta. In 1994 he joined the Department of Microelectronics at the University of Malta where he is employed as a lecturer. He received the Ph.D. degree from the University of Surrey, U.K. in 2002. His research interest is in CMOS analog integrated circuit design.Joseph Micallef received his B.Sc. Eng(Hons.) degree in electronics engineering from the University of Malta in 1972, and M.Sc. and Ph.D. degrees in electrical engineering from the University of Surrey, U.K., in 1989 and 1993, respectively. From 1973 to 1981, he was with General Instruments, engaged in work on high voltage components and circuits and on IFTs. He moved to SGS-THOMSON Microelectronics in 1981 where he was involved with packaging of MOS ICs. In 1989, he joined the Faculty of Engineering at the University of Malta and is now lecturer in the Department of Microelectronics. His current research activities include analog integrated circuit design, as well as optical properties of III-V quantum well structures.George Azzopardi photo/biography not available upon publication.Carl J. Debono photo/biography not available upon publication.     

Signal threshold adaptation for vertical handoff in heterogeneous wireless networks

The convergence of heterogeneous wireless access technologies has been envisioned to characterize the next generation wireless networks. In such converged systems, the seamless and efficient handoff between different access technologies (vertical handoff) is essential and remains a challenging problem. The heterogeneous co-existence of access technologies with largely different characteristics results in handoff asymmetry that differs from the traditional intra-network handoff (horizontal handoff) problem. In the case where one network is preferred, the vertical handoff decision should be carefully executed, based on the wireless channel state, network layer characteristics, as well as application requirements. In this paper, we study the performance of vertical handoff using the integration of 3G cellular and wireless local area networks as an example. In particular, we investigate the effect of an application-based signal strength threshold on an adaptive preferred-network lifetime-based handoff strategy, in terms of the signalling load, available bandwidth, and packet delay for an inter-network roaming mobile. We present an analytical framework to evaluate the converged system performance, which is validated by computer simulation. We show how the proposed analytical model can be used to provide design guidelines for the optimization of vertical handoff in the next generation integrated wireless networks. This article is the extended version of a paper presented in IFIP Networking 2005 Ahmed H. Zahran is a Ph.D. candidate at the Department of Electrical and Computer Engineering, University of Toronto. He received both his M.Sc. and B.Sc. in Electrical Engineering from Electronics and Electrical Communication Department in the Faculty of Engineering, Cairo University in 2002 and 2000 respectively, where he was holding teaching and research positions. Since September 2003, he has been working as a research assistant in the Department of Electrical and Computer Engineering, University of Toronto under the supervision of Professor Ben Liang. His research interest is wireless communication and networking with an emphasis on the design and analysis of networking protocols and algorithms. Ben Liang received honors simultaneous B.Sc. (valedictorian) and M.Sc. degrees in Electrical Engineering from Polytechnic University in Brooklyn, New York, in 1997 and the PhD degree in Electrical Engineering with Computer Science minor from Cornell University in Ithaca, New York, in 2001. In the 2001–2002 academic year, he was a visiting lecturer and post-doctoral research associate at Cornell University. He joined the Department of Electrical and Computer Engineering at the University of Toronto as an Assistant Professor in 2002. His current research interests are in the areas of mobile networking and wireless multimedia systems. He is a member of Tau Beta Pi, IEEE, and ACM and serves on the organization and technical program committees of a number of major conferences each year. Aladdin Saleh earned his Ph.D. degree in Electrical Engineering from London University, England. Since March 1998, Dr. Saleh has been working in the Wireless Technology Department of Bell Canada, the largest service provider of wireless, wire-line, and Internet in Canada. He worked as a senior application architect in the wireless data group working on several projects among them the wireless application protocol (WAP) and the location-based services. Later, he led the work on several key projects in the broadband wireless network access planning group including planning of the IEEE 802.16/ Wimax, the IEEE 802.11/ WiFi, and the integration of these technologies with the 3G cellular network including Mobile IP (MIP) deployment. Dr. Saleh also holds the position of Adjunct Full Professor at the Department of Electrical and Computer Engineering of Waterloo University, Canada since January 2004. He is currently conducting several joint research projects with the University of Waterloo and the University of Toronto on IEEE 802.16-Wimax, MIMO technology, interworking of IEEE 802.11 WLAN and 3G cellular networks, and next generation wireless networks. Prior to joining Bell Canada, Dr. Saleh worked as a faculty member at different universities and was Dean and Chairman of Department for several years. Dr. Saleh is a Fellow of IEE and a Senior Member of IEEE.     

Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic

A very low voltage transconductor for video frequency range applications and compatible with standard CMOS technology is described. In the proposed transconductor, except the DC level shifter circuit (DCLS), the whole transconductor uses the main supply voltage [which can be as low as 1.5 V in a standard 0.6 μm CMOS technology] while the DCLS uses a simple charge-pump circuit as its supply voltage and has a very low current consumption. In addition, proper common-mode sense and charge-pump circuits are developed for this low-voltage application. Meanwhile, some techniques to improve the frequency response, linearity, and noise performance of the proposed transconductor are described. In a standard 0.6 μm CMOS technology and single 1.5 V supply, simulations show that the proposed transconductor futures a THD of −50 dB for 1.4 V_pp and 10 MHz input signal and −60 dB for 1.4 V_pp and 1 MHz signal where the threshold voltage of MOS transistors could be as high as 1 V. Based on the proposed transconductor, a lowpass filter with 700 kHz to 8 MHz programmable cutoff frequency and a bandpass 10.7 MHz second order filter were implemented. Armin Tajalli received the B.Sc. from Sharif University of Technology (SUT), Tehran, Iran, in 1997, and M.Sc. from Tehran Polytechnic University, Tehran, Iran, in 1999. From 1998 he has joint Emad Co. as a senior design engineer were he has worked on several industrial and R&D projects on analog and mixed-mode ICs. He received the award of the Best Design Engineer from Emad Co., 2001, the Kharazmi Award of Industrial Research and Development, Iran, 2002, and Presidential Award of the Best Iranian Researchers, in 2003. He is now working toward his PhD degree at SUT. His current interests are design of high speed circuits for telecommunication systems. Mojtaba Atarodi received the B.S.E.E. from Amir Kabir University of Technology (Tehran Polytechnic) in 1985, and M.Sc. degree in electrical engineering from the University of California, Irvine, in 1987. He received the Ph.D. degree from the University of Southern California (USC) on the subject of analog IC design in 1993. From 1993 to 1996 he worked with Linear Technology Corporation as a senior analog design engineer. Since then, he has been consulting with different IC companies. He is currently a visiting professor at Sharif University of Technology. He has published more than 30 technical papers in the area of analog and mixed-signal integrated circuit design as well as analog CAD tools.     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

New CMOS Class AB Transmitter for 10 Gb/s Serial Links

This paper presents a new fully differential CMOS class AB transmitter for 10 Gb/s serial links. The transmitter consists of a fully differential multiplexer, a rail-to-rail configured pre-amplification stage, and a push-pull output stage. The multiplexer achieves a high multiplexing speed by using modified pseudo-NMOS logic where pull-up networks are replaced with self-biased active inductors. The rail-to-rail configured pre-amplification stage with active inductors amplifies the signals from the multiplexer. The fully differential output current is generated by a class AB output stage operated in a push-pull mode. High data rates of the transmitter are obtained by ensuring that the transistors in both the pre-amplification and output stages are always in saturation and the voltage swing of all critical nodes is small. The fully differential configuration of the transmitter effectively suppresses common-mode disturbances, particularly those coupled from the power and ground rails, the electro-magnetic interference exerted from channels to neighboring devices is also minimized. The transmitter minimizes switching noise by drawing a constant current from the supply voltage. The transmitter has been implemented in TSMC 0.18 μm 1.8 V 6-metal CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3.3 device models. Simulation results demonstrate that the transmitter provides a 5 mA peak-to-peak differential output current with 100 ps eye-width and >5 mA eye-height at 10 Gb/s. The transmitter consumes 18 mW with a total transistor area of 100 μm² approximately. Jean Jiang received the B.Eng. degree in Electrical Engineering from Wuhan University of Technology, Wuhan, China in 1995, and the M.A.Sc. degree in Electrical and Computer Engineering from Ryerson University, Toronto, Ontario, Canada in 2004. From 1999 to 2001, she worked for Ericsson Global IT Services where she was a technical staff to maintain computer networks. From 2002 to 2004, she was a research assistant and a M.A.Sc. student with the Microsystem Research Laboratory in the Department of Electrical and Computer Engineering at Ryerson University. She is now with Intel Corp., CA. as an IC design engineer. Her research interests are in analog CMOS circuit design for high-speed data communications. Jean Jiang was awarded the Ontario Graduate Scholarship in 2003–2005 for academic excellence. Fei Yuan received the B.Eng. degree in electrical engineering from Shandong University, Jinan, China in 1985, the M.A.Sc. degree in chemical engineering and Ph.D. degree in electrical engineering from University of Waterloo, Waterloo, Ontario, Canada in 1995 and 1999, respectively. During 1985–1989, he was a Lecturer in the Department of Electrical Engineering, Changzhou Institute of Technology, Jiangsu, China. In 1989 he was a Visiting Professor at Humber College of Applied Arts and Technology, Toronto, Ontario, Canada, and Lambton College of Applied Arts and Technology, Sarnia, Ontario, Canada. He was with Paton Controls Limited, Sarnia, Ontario, Canada as a Controls Engineer during 1989–1994. Since 1999 he has been with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada, where he is currently an Associate Professor and the Associate Chair for Undergraduate Studies and Faculty Affairs. He is the co-author of the book Computer Methods for Analysis of Mixed-Mode Switching Circuits (Springer-Verlag, 2004, with Ajoy Opal). Dr. Yuan received the Ryerson Research Chair award from Ryerson University in Jan. 2005, the Research Excellence Award from the Faculty of Engineering and Applied Science of Ryerson University in 2004, the post-graduate scholarship from Natural Science and Engineering Research Council of Canada during 1997–1998, and the Teaching Excellence Award from Changzhou Institute of Technology in 1988. Dr. Yuan is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada.     

A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices

This paper extends the timing test model in [5] to be more realistic by including the effects of the test fixtures between a device under test and a tester. The paper enables analyzing the trade-offs that arise between the predicted yield and the required overall test environment timing accuracy (OTETA) which involves the tester overall timing accuracy (OTA) and the test fixtures' impacts. We specifically focus on the application of the extended model to predict the test yield of standard high-speed interconnects, such as PCI Express, Parallel/Serial RapidIO, and HyperTransport. The extended model reveals that achieving an actual yield of 80% with a test escape of 300 DPM (Defects Per Million) requires an equivalent OTETA that is about half the acceptable absolute limit of the tested parameter. Baosheng Wang received his B.S. degree from Beijing University of Aeronautics and Astronautics (BUAA), Beijing, P.R. China, in 1997 and M.S. degree from Precision Instrument & Mechanical Engineering from the Tsinghua University, Beijing, P. R. China in 2000. In 2005, he received his Ph.D. degree in Electrical Engineering from the University of British Columbia (UBC), Vancouver, BC, Canada. During his Master study, he was doing MEMS, Micro Sensors and Digital Signal processing. From 2000 to 2001, he worked in Beijing Gaohong Telecommunications Company as a hardware engineer in ATM technology. Currently, he is a Design-for-Test (DFT) engineer at ATI Technologies Inc., Markham, Ontario, Canada. He publishes widely at international conferences and journals. His primary research interests are time-driven or timing-oriented testing methodologies for System on-a-Chip (SoC). These fields include test time reduction for SRAMs, accelerated reliability test for non-volatile memories, yield analysis for SoC timing tests, SoC path delay timing characterization and embedded timing measurements. Andy Kuo is currently a Ph.D student of System on a Chip (SoC) Research Lab at the Department of Electrical and Computer Engineering, University of British Columbia. He received his M.A.Sc. and B.A.Sc in electrical and computer engineering from University of British Columbia and University of Toronto in 2004 and 2002 respectively. His research interests include high-speed signal integrity issues, jitter measurement, serial communications. Touraj Farahmand received the B.Sc. degree in Electrical Engineering from Esfahan University of Technology, Esfahan, Iran in 1989 and the M.Sc. in Control Engineering from Sharif university of Technology, Tehran, Iran in 1992. After graduation, he joined the Electrical and Computer Research center of Esfahan University of Technology where he was involved in the DSP algorithm development and design and implementation of the control and automation systems. Since October 2001, he has been working in the area of high-speed signal timing measurement at SoC (System-on-a-Chip) lab of UBC (University of British Columbia) as a research engineer. His research interests are signal processing, jitter measurement, serial communication and control. André Ivanov is Professor in the Department of Electrical and Computer Engineering, at the University of British Columbia. Prior to joining UBC in 1989, he received his B.Eng. (Hon.), M. Eng., and Ph.D. degrees in Electrical Engineering from McGill University. In 1995–96, he spent a sabbatical leave at PMC-Sierra, Vancouver, BC. He has held invited Professor positions at the University of Montpellier II, the University of Bordeaux I, and Edith Cowan University, in Perth, Australia. His primary research interests lie in the area of integrated circuit testing, design for testability and built-in self-test, for digital, analog and mixed-signal circuits, and systems on a chip (SoCs). He has published widely in these areas and holds several patents in IC design and test. Besides testing, Ivanov has interests in the design and design methodologies of large and complex integrated circuits and SoCs. Dr. Ivanov has served and continues to serve on numerous national and international steering, program, and/or organization committees in various capacities. Recently, he was the Program Chair of the 2002 VLSI Test Symposium (VTS'02) and the General Chair for VTS'03 and VTS'04. In 2001, Ivanov co-founded Vector 12, a semiconductor IP company. He has published over 100 papers in conference and journals and holds 4 US patents. Ivanov serves on the Editorial Board of the IEEE Design and Test Magazine, and Kluwer's Journal of Electronic Testing: Theory and Applications. Ivanov is currently the Chair of the IEEE Computer Society's Test Technology Technical Council (TTTC). He is a Golden Core Member of the IEEE Computer Society, a Senior Member of the IEEE, a Fellow of the British Columbia Advanced Systems Institute and a Professional Engineer of British Columbia. Yong Cho received the B.S. degree from Kyung Pook National Unviersity, Korea, in 1981 and the M.S. degree from in electrical and computer engineering from the University of South Carolina, Columbia, S.C., in 1988 and the Ph.D. degree in electrical engineering and applied physics from Case Western Reserve University, Cleveland, OH, in 1992. He is currently a Professor with the Department of Electronics Engineering, Konkuk University, Seoul, Korea. His recent research interests include SoC Design and Verification, H/W and S/W co-design, and embedded programming on SoC. Sassan Tabatabaei received his PHD in Electrical Engineering from the University of British Columbia, Vancouver, Canada in 2000. Since then, he has held several senior technical positions at Vector12 Corp, Guide Technology, and Virage Logic. His professional and research interests include mixed-signal design and test, and signal integrity and jitter test methodologies for high-speed circuits and multi-Gbps serial interfaces. He has published several papers and holds a US patent in the area of timing and jitter measurement. Currently, he holds the position of the director for embedded test at Virage Logic Corporation.     

8 GHz 1V, CMOS quadrature downconverter for wireless applications

The design and implementation of an 8 GHz CMOS quadrature downconverter, achieving simultaneously low voltage supply operation and good linearity is presented in this paper. This is achieved by relaxing the inherent tradeoff between power conversion gain and linearity governing all active mixers and implementing a mixer using a new version of the bias-offset technique. The quadrature generator uses active inductors embodied in the LO buffer, and provides easy tuning by relaxing the coupling between amplitude and phase tuning of the outputs. It also provides reduced power consumption by eliminating the buffers located between the quadrature generator and the mixers. A prototype implemented in a 0.18 μm CMOS technology occupies an area of 0.44 × 0.3 mm², operates from a 1V power supply and features an IIP3 of +3.5 dBm, an IIP2 of better than +48 dBm, an input compression point of −5.5 dBm, a power conversion gain of +6.5 dB for the mixers and a quadrature phase and amplitude matching of better than 1.5° and 1 dB respectively over a bandwidth of 100 MHz after tuning. The overall power consumption of the quadrature downconverter is 25.8 mW. Farsheed Mahmoudi was born in Tehran, Iran. He received his B.Sc. and M.Sc. degrees in Electronics from the University of Tehran, Tehran, Iran in 1997 and 2000 respectively. He is currently working toward the Ph.D. degree at the University of Toronto, Toronto, Canada. His research interests include the design and analysis of RF circuits and systems for wireless applications. C. Andre T. Salama received the B.A.Sc. (Hons.) M.A.Sc. and Ph. D. degrees, all in Electrical Engineering, from the University of British Columbia in 1961, 1962 and 1966 respectively. From 1962 to 1963 he served as a Research Assistant at the University of California, Berkeley. From 1966 to 1967 he was employed at Bell Northern Research, Ottawa, as a Member of Scientific Staff working in the area of integrated circuit design. Since 1967 he has been on the staff of the Department of Electrical and Computer Engineering, University of Toronto where he held the J.M. Ham Chair in Microelectronics from 1987 to 1997. In 1992, he was appointed to his present position of University Professor for scholarly achievements and preeminence in the field of microelectronics. In 1989–90, he was awarded the ITAC/NSERC Research Fellowship in information technology. In 1994, he was awarded the Canada Council I.W. Killam Memorial Prize in Engineering for outstanding career contributions to the field of microelectronics. In 2000, he received the IEEE Millenium Medal. In 2003, he received the Outstanding Lifetime Achievement Award from the Canadian Semiconductor Technology Conference for seminal and outstanding contributions to semiconductor device research and promotion of Canadian University research in microelectronics. In 2004, he received the NSERC Lifetime Achievement Award of Research Excellence for outstanding and sustained contributions to the field of microelectronics and the Networks of Centres of Excellence (NCE) Recognition Award for research excellence and outstanding leadership. He was associate editor of the IEEE Transactions on Circuits and Systems in 1986–88 and a member of the International Electron Devices Meeting (IEDM) Technical Program Committee in 1980–82, 1987–89 and 1996–98. He was the chair of the Solid State Devices Subcommittee for IEDM in 1998 and was a member of the editorial board of Solid State Electronics from 1984 to 2002. He is presently a member of the editorial board of the Analog IC and Signal Processing Journal and the Technical Program Committee of the International Symposium on Power Semiconductor Devices and ICs (ISPSD) and the Technical Program Committee of the International Symposium on Low Power Electronics and Design (ISLPED). He chaired the technical program committee of ISPSD in 1996 and was the general chair for the conference in 1999. Dr. Salama is the Scientific Director of Micronet, a network of centres of excellence focussing on microelectronics research and funded by the Canadian Government and Industry. He has published extensively in technical journals, is the holder of eleven patents and has served as a consultant to the semiconductor industry in Canada and the U.S. His research interests include the design and fabrication of semiconductor devices and integrated circuits with emphasis on deep submicron devices as well as circuits and systems for high speed, low power signal processing applications. Dr. Salama is a Fellow of the Institute of Electrical and Electronics Engineers, a Fellow of the Royal Society of Canada, a Fellow of the Canadian Academy of Engineering, a member of the Association of Professional Engineers of Ontario, the Electrochemical Society and the Innovation Management Association of Canada.     

A New Differential CMOS Current-Mode Preamplifier for GBps Data Communications

This paper presents a new low-voltage fully differential CMOS current-mode preamplifier for GBps data communications. The number of transistors between the power and ground rails is only two so that the minimum supply voltage is one threshold voltage plus one pinch-off voltage. The preamplifier is a balanced two-stage configuration such that the effect of bias-dependent mismatches is minimized. A new inductive series-peaking technique is introduced to increase the bandwidth by utilizing the resonance characteristics of LC networks. In addition, a new negative differential current feedback technique is proposed to boost the bandwidth and to reduce the value of peaking inductors. The preamplifier has been implemented in TSMC 0.18 μm, 1.8 V, 6-metal mixed-mode CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3v3 device models. For an optical front-end with a 0.3 pF photodiode capacitance, simulation results demonstrate that the preamplifier has bandwidth of 3.5 GHz and provides a transimpedance gain of 66 dBΩ. The total chip area is approximately 1 mm² and the DC power consumption is about 85 mW. Bendong Sun received the B.Eng. degree in electrical engineering from Shanghai Jiaotong University, Shanghai, China, in1992, and the MASc degree in electrical and computer engineering from Ryerson University, Toronto, Ontario, Canada, in 2003. He is currently working towards the Ph.D. degree in electrical and computer engineering at University of Waterloo, Waterloo, Ontario, Canada. During 1992 through 1998 he was a Design Engineer at China Electronics Engineering Design Institute, Beijing, China. From 1998 to 2000 he worked for Bently Nevada Corporation, a GE Power Systems business, as a System Engineer. Since 2001, he has been a Research Assistant with the System-on-Chip Laboratory at Ryerson University. His research interests include design of analog and mixed-signal integrated circuits for high-speed data communications. Fei Yuan received the B.Eng. degree in electrical engineering from Shandong University, Jinan, China in 1985, the MASc degree in chemical engineering and PhD degree in electrical engineering from University of Waterloo, Waterloo, Ontario, Canada in 1995 and 1999, respectively. During 1985–1989, he was a Lecturer in the Department of Electrical Engineering, Changzhou Institute of Technology, Jiangsu, China. In 1989 he was a Visiting Professor at Humber College of Applied Arts and Technology, Toronto, Canada. During 1989–1994, he worked for Paton Controls Limited, Sarnia, Ontario, Canada as a Controls Engineer. Since July 1999 he has been with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada, where he is currently an Associate Professor and the Associate Chair for Undergraduate Studies and Faculty Affairs. He is the co-author of the book “Computer Methods for Analysis of Mixed-Mode Switching Circuits” (Kluwer Academic Publishers, 2004, with Ajoy Opal). Dr. Yuan received an “Excellence of Teaching" award from Changzhou Institute of Technology in 1988, a post-graduate scholarship from Natural Science and Engineering Research Council (NSERC) of Canada during 1997–1998. He is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada. Ajoy Opal (S'86-M'88) received the B. Tech degree from Indian Institute of Technology, New Delhi, India in 1981, and the MASc and PhD degrees from University of Waterloo, Waterloo, Ontario, Canada in 1984 and 1987, respectively. During 1989–92 he worked for Bell-Northern Research in the area of analog circuit simulation. He joined the Department of Electrical and Computer Engineering, University of Waterloo in 1992 and currently a Full Professor. Dr. Opal works in the area of simulation of analog and mixed digital-analog circuits, such as, switched capacitor, switched current, oversampled sigma-delta modulators. Other interests include circuit theory and filter design.     

Nonlinear analysis, design, and implementation of a VCO in S frequency band

A VCO in S frequency band is designed by using nonlinear technique based on large signal model of semiconductor devices. The nonlinear circuit of the VCO is analyzed by a novel analytical approach of harmonic balance method as an autonomous circuit, and with fulfilling the stability condition of the network, the output specifications are determined. This proposed nonlinear approach for determining of the frequency and amplitude stability is also based on harmonic balance method. The results of the analysis are compared with those of measurements. The comparison shows good agreement between results of this analytical approach and the measurements. Zahra Ghanian was born in Tehran, Iran, in 1975. She received the B.Sc. degree in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1998, and the M.Sc. degree from the Amirkabir University of Technology, Tehran, Iran, in 2001. Since 2000, she has been involved in several research and engineering projects at the Amirkabir University of Technology, Iran Telecommunications Research Center (ITRC) and Niroo Research Institute (NRI). Her main areas of interest are design, simulation and analysis of circuits for Microwave, Millimeter wave and Wireless applications. Abdolali Abdipour was born in Iran in 1966. He obtained his B.Sc. in Electrical Engineering from Tehran University, Tehran, Iran in 1989, and the M.Sc. in Electronics from Limoges University, Limoges, France in 1992. Then he achieved his PhD degree in Electronic Engineering from Paris XI University, Paris, France in March 1996. His research areas include wireless communication systems (RF Technology and Transceivers), RF/Microwave/mm-wave circuit and system design, E & M modeling of active devices and circuits, high frequency electronics (signal and noise), nonlinear modeling and analysis of microwave devices and circuits. He has published over 80 papers in the refereed journals and international conferences. He authored two books “Noise in Electronic Communication: Modeling, Analysis and measurement” and “Transmission Lines” (in Persian). He is currently an associate professor of Electrical Engineering Department at Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran. Ayaz Ghorbani received PG diploma, m. Phiel and PhD degrees from the university of Bradford U.K. in 1984, 1985 and 1987 respectively in the area of electrical and communication engineering. From 1987 up to now he has been teaching various courses in the department of electrical engineering at university of Amirkabir (Tehran poly technique) Tehran, Iran. In 1987 he was awarded John Robertshaw Travel Award to visit a number of research establishments in the United States of America from Bradford University, and in 1990 he was also awarded U.R.S.I. Young Scientists Award at general assembly of the URSI, Prague, Czech Republic. In 2004 he was in Bradford University for one year as a research visitor where he obtained post doctorate degree. Dr. Ghorbani is author and coauthor of more than seventy papers in conferences as well as scientific journals.     

A Novel Approach to Cell Coverage Area Determination for FDMA–CDMA Systems

There is no theoretical time or frequency restrictions on capacity in DS-CDMA systems. In these systems, the signal to interference ratio (SIR) has a major effect on capacity. Since an increase in the user SIR at the base station (BS) leads to higher capacity, transmission power control is employed. The nonuniform distribution of users in the network causes different quality of service (QOS) in distinct regions, therefore network resources may not be utilized properly. A dynamic distribution algorithm can be employed to balance the QOS delivered in different regions of the network. In this paper, a novel dynamic distribution algorithm is introduced. The proposed algorithm deactivates certain users when the network encounters an overload. By applying this policy, the required SIR can be maintained for the remaining users. F. Hendessi received a B.Sc. degree from Baluchestan University, Iran in 1986, and an M.Sc. degree from Isfahan University of Technology, Iran in 1988, both in Electrical Engineering. In 1993 he received a Ph.D. in Electrical Engineering from Carleton University, Ottawa, Ontario, Canada. He is currently an Assistant Professor in the Department of Electrical Engineering at Isfahan University of Technology. A. Ghayoori received B.Sc. and M.Sc. degrees in Electrical Engineering from Isfahan University of Technology, Isfahan, Iran, in 2001 and 2003, respectively. He is currently a Research Engineer with the ICT research center at IUT. T. A. Gulliver received a Ph.D. degree in Electrical and Computer Engineering from the University of Victoria, Victoria, BC, Canada in 1989. From 1989 to 1991 he was employed as a Defence Scientist at Defence Research Establishment Ottawa, Ottawa, ON, Canada. He has held academic positions at Carleton University, Ottawa, and the University of Canterbury, Christchurch, New Zealand. He joined the University of Victoria in 1999 and is a Professor in the Department of Electrical and Computer Engineering. He is a Senior Member of the IEEE and a member of the Association of Professional Engineers of Ontario, Canada. In 2002, he became a Fellow of the Engineering Institute of Canada. His research interests include information theory and communication theory, algebraic coding theory, cryptography, construction of optimal codes, turbo codes, spread spectrum communications, space-time coding and ultra wideband communications.     

Wide dynamic range parallel feedback transimpedance amplifier for 10 Gb/s optical links

This paper presents the design and implementation of a new wide dynamic range parallel feedback (PF) transimpedance amplifier (TIA) for 10 Gb/s optical links. The wide dynamic range is attributed to the novel TIA architecture employing both shunt-shunt and shunt-series feedback networks. The outstanding features of the TIA are wide dynamic range, high gain, low power consumption and design simplicity. A prototype implemented in a 0.5 μm SiGe BiCMOS technology and operating at −3.3 V power supply features an 18.4 dBm dynamic range with a BER less than 10⁻¹², an optical sensitivity of −16 dBm, optical overload of +2.4 dBm, a bandwidth of 8.27 GHz, a gain of 950 Ω and a power consumption of 189 mW. The new parallel feedback architecture offers improved overload and noise performance when compared to previously reported, state of the art, single feedback TIA designs and meets all the 10 Gigabit Ethernet and short-reach OC-192 SONET specifications. Ricardo Andres Aroca received the B.S. (Hons) degree in electrical engineering from the University of Windsor, Canada, and the M.S. degree from the University of Toronto, Canada, in 2001 and 2004, respectively. In 2000 he spent two 4 month internships with Nortel Networks in the Microelectronics Department. Mr. Aroca received the Natural Sciences and Engineering Research Counsel of Canada (NSERC) Postgraduate Scholarship award in 2002. He is currently working toward the Ph.D. degree at the University of Toronto where his research interests lie in the area of high-frequency integrated circuits for wireless and wireline communication systems. C. Andre T. Salama received the B.A.Sc. (Hons.) M.A.Sc. and Ph. D. degrees, all in Electrical Engineering, from the University of British Columbia in 1961, 1962 and 1966 respectively. From 1962 to 1963 he served as a Research Assistant at the University of California, Berkeley. From 1966 to 1967 he was employed at Bell Northern Research, Ottawa, as a Member of Scientific Staff working in the area of integrated circuit design. Since 1967 he has been on the staff of the Department of Electrical and Computer Engineering, University of Toronto where he held the J.M. Ham Chair in Microelectronics from 1987 to 1997. In 1992, he was appointed to his present position of University Professor for scholarly achievements and preeminence in the field of microelectronics. In 1989-90, he was awarded the ITAC/NSERC Research Fellowship in information technology. In 1994, he was awarded the Canada Council I.W. Killam Memorial Prize in Engineering for outstanding career contributions to the field of microelectronics. In 2000, he received the IEEE Millenium Medal. In 2003, he received the Outstanding Lifetime Achievement Award from the Canadian Semiconductor Technology Conference for seminal and outstanding contributions to semiconductor device research and promotion of Canadian University research in microelectronics. In 2004, he received the NSERC Lifetime Achievement Award of Research Excellence for outstanding and sustained contributions to the field of microelectronics and the Networks of Centres of Excellence (NCE) Recognition Award for research excellence and outstanding leadership.He was associate editor of the IEEE Transactions on Circuits and Systems in 1986–88 and a member of the International Electron Devices Meeting (IEDM) Technical Program Committeein 1980–82, 1987–89 and 1996–98. He was the chair of the Solid State Devices Subcommittee for IEDM in 1998 and was a member of the editorial board of Solid State Electronics from 1984 to 2002. He is presently a member of the editorial board of the Analog IC and Signal Processing Journal and the Technical Program Committee of the International Symposium on Power Semiconductor Devices and ICs (ISPSD) and the Technical ProgramCommittee of the International Symposium on Low Power Electronics and Design (ISLPED). He chaired the technical program committee of ISPSD in 1996 and was the general chair for the conference in 1999.Dr. Salama is the Scientific Director of Micronet, a network of centres of excellence focussing on microelectronics research and funded by the Canadian Government and Industry. He has published extensively in technical journals, is the holder of eleven patents and has served as a consultant to the semiconductor industry in Canada and the U.S. His research interests include the design and fabrication of semiconductor devices and integrated circuits with emphasis on deep submicron devices as well as circuits and systems for high speed, low power signal processing applications. Dr. Salama is a Fellow of the Institute of Electrical and Electronics Engineers, a Fellow of the Royal Society of Canada, a Fellow of the Canadian Academy of Engineering, a member of the Association of Professional Engineers of Ontario, the Electrochemical Society and the Innovation Management Association of Canada.     

A Broadband Quadrature-Modulator with Integrated Baluns

A broadband direct-conversion quadrature-modulator has been implemented in 0.8 m SiGe with integrated baluns in its RF-signal paths. Measured performance includes IRR-values at better than –40 dBc in 0.75–3.6 GHz with output power levels in excess of –20 dBm. For this performance circuit draws 46 mA from a single 2.5 V supply.Esa Tiiliharju was born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in Information Technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland.From 1996 to July 1997 he was employed as assistant at Helsinki University of Technology. He has been holding a position of a research assistant from 1997, and he is currently working towards the Ph.D. degree in the Electronic Circuit Design Laboratory at Helsinki University of Technology.His research interests include the design of integrated low-power circuits for portable telecommunication applications. He has designed and measured several integrated circuits for this application area. He is author or co-author for several international refereed conference and journal publications on analog integrated circuits.Kari A.I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT) in 1982 and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, Heverlee, Belgium, in 1987.From 1982 to 1984, he was with HUT as an Assistant and with the Technical Research Center of Finland as a Research Assistant. From 1984 to 1987, he was a Research Assistant with the E.S.A.T. Laboratory, Katholieke Universiteit Leuven, with a temporary grant from the Academy of Finland. Since 1988, he has been with the Electronic Circuit Design Laboratory, HUT, as a Senior Assistant from 1988 to 1990, and as the Director of the Integrated Circuit Design Unit of the Microelectronics Center from 1990 to 1993. He was on leave of absence during the academic year 1992–1993, acting as Research and Development Manager with Fincitec Inc., Finland. From 1993 to 1996, he was an Associate Professor, and since 1997, he has been a full Professor with the Faculty of Electrical Engineering and Telecommunications, HUT. He became the Head of Electronic Circuit Design Laboratory year 1998. He was the Technical Program Committee Chairman for the European Solid-State Circuits Conference in 2000. He is the author or coauthor of over 150 international and national conference and journal publications on analog integrated circuits, and holds several patents on analog integrated circuits. His research interests are in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications.Dr. Halonen was an Associate Editor of the IEEE Transactions on Circuits and Systems–Part I: Fundamental Theory and Applications from 1997 to 1999. He has been a Guest Editor for the IEEE Journal of Solid-State Circuits. He received the BeatriceWinner Award from the IEEE International Solid-State Circuits Conference in 2002.     

A Low Voltage 14-Bit Self-Calibrated CMOS DAC with Enhanced Dynamic Linearity

A 1-V CMOS current steering digital to analog converter with enhanced static and dynamic linearity is presented. The 14-bit static linearity is achieved by a background analog self calibration technique which is suitable for low voltage applications and does not require error measurement and correction circuits. To improve dynamic linearity at high frequencies, a track/attenuate output stage is used at the DAC output. Integral and differential nonlinearities of the proposed DAC corresponding to 14-bit specification are less than 0.35 and 0.25 LSB, respectively. The DAC is functional up to 400MS/s with SFDR better than 71 dB in the Nyquist band. The circuit has been designed and simulated in a standard 0.18 u CMOS technology. Saeed Saeedi was born in Tehran, Iran, in 1979. He received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran in 2001 and 2003, respectively. Since 2002, he has been working with Iran Microelectronics Research Center, IMRC. He is currently working toward the Ph.D. degree. His research interests include analog and digital integrated circuits for communication systems and high performance data converters. Saeid Mehrmanesh was born in Arak, Iran in 1976. He received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1999 and 2002. From 2000, he has been working with Iran Microelectronics Research Center as an analog and mixed-mode and RF-IC design engineer. Since 2004, he has been a Ph.D. student at the University of Tehran. His research interests include analog to digital and digital to analog data converters, low voltage and low power CMOS circuits, telecommunication circuits, high speed serial links and RF circuits. Mojtaba Atarodi received the B.S.E.E. from Amir Kabir University of Technology (Tehran Polytechnic) in 1985, and M.Sc. degree in electrical engineering from the University of California, Irvine, in 1987. He received the Ph.D. degree from the University of Southern California (USC) on the subject of analog IC design in 1993.From 1993 to 1996 he worked with Linear Technology Corporation as a senior analog design engineer. Since then, he has been consulting with different IC companies. He is currently a visiting professor at Sharif University of Technology. He has published more than 30 technical papers in the area of analog and mixed-signal integrated circuit design as well as analog CAD tools.This revised version was published online in May 2005 with corrections to the authors affiliations.     

Statistical multiplexing, admission region, and contention window optimization in multiclass wireless LANs

This paper presents an analytical model for evaluating the statistical multiplexing effect, admission region, and contention window design in multiclass wireless local area networks (WLANs). We consider distributed medium access control (MAC) which provisions service differentiation by assigning different contention windows to different classes. Mobile nodes belonging to different classes may have heterogeneous traffic arrival processes with different quality of service (QoS) requirements. With bursty input traffic, e.g. on/off sources, our analysis shows that the WLAN admission region under the QoS constraint can be significantly improved, when the statistical multiplexing effect is taken into account. We also analyze the MAC resource sharing between the short-range dependent (SRD) on/off sources and the long-range dependent (LRD) fractional Brownian motion (FBM) traffic, where the impact of the Hurst parameter on the admission region is investigated. Moveover, we demonstrate that the proper selection of contention windows plays an important role in improving the WLAN’s QoS capability, while the optimal contention window for each class and the maximum admission region can be jointly solved in our analytical model. The analysis accuracy and the resource utilization improvement from statistical multiplexing gain and contention window optimization are demonstrated by extensive numerical results. Yu Cheng received the B.E. and M.E. degrees in Electrical Engineering from Tsinghua University, Beijing, China, in 1995 and 1998, respectively, and the Ph.D. degree in Electrical and Computer Engineering from the University of Waterloo, Waterloo, Ontario, Canada, in 2003. From September 2004 to July 2006, he was a postdoctoral research fellow in the Department of Electrical and Computer Engineering, University of Toronto, Ontario, Canada. Since August 2006, he has been with the Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, Illinois, USA, as an Assistant Professor. His research interests include service and application oriented networking, autonomic network management, Internet performance analysis, resource allocation, wireless networks, and wireless/wireline interworking. He received a Postdoctoral Fellowship Award from the Natural Sciences and Engineering Research Council of Canada (NSERC) in 2004. Xinhua Ling received the B. Eng. degree in Radio Engineering from Southeast University, Nanjing, China in 1993 and the M. Eng. degree in Electrical Engineering from the National University of Singapore, Singapore in 2001. He is currently pursuing the Ph.D. degree in the Department of Electrical and Computer Engineering at the University of Waterloo, Ontario, Canada. From 1993 to 1998, he was an R&D Engineer in Beijing Institute of Radio Measurement, China. From February 2001 to September 2002, he was with the Centre for Wireless Communications (currently Institute for Infocom Research), Singapore, as a Senior R&D Engineer, developing the protocol stack for UE in the UMTS system. His general research interests are in the areas of cellular, WLAN, WPAN, mesh and ad hoc networks and their internetworking, focusing on protocol design and performance analysis. Lin X. Cai received the B.Sc. degree in computer science from Nanjing University of Science and Technology, Nanjing, China, in 1996 and the MASc. degree in electrical and computer engineering from the University of Waterloo, Waterloo, Canada, in 2005. She is currently working toward the Ph.D. degree in the same field at the University of Waterloo. Her current research interests include network performance analysis and protocol design for multimedia applications over wireless networks. Wei Song received the B.S. degree in electrical engineering from Hebei University, China, in 1998 and the M.S. degree in computer science from Beijing University of Posts and Telecommunications, China, in 2001. She is currently working toward the Ph.D. degree at the Department of Electrical and Computer Engineering, University of Waterloo, Canada. Her current research interests include resource allocation and quality-of-service (QoS) provisioning for the integrated cellular networks and wireless local area networks (WLANs). Weihua Zhuang received the Ph.D. degree in electrical engineering from the University of New Brunswick, Canada. Since October 1993, she has been with the Department of Electrical and Computer Engineering, University of Waterloo, Canada, where she is a Professor. Dr. Zhuang is a co-author of the textbook Wireless Communications and Networking (Prentice Hall, 2003). Her current research interests include multimedia wireless communications, wireless networks, and radio positioning. She received the Outstanding Performance Award in 2005 and 2006 from the University of Waterloo and the Premier’s Research Excellence Award in 2001 from the Ontario Government for demonstrated excellence of scientific and academic contributions. She is the Editor-in-Chief of IEEE Transactions on Vehicular Technology and an Editor of IEEE Transactions on Wireless Communications. Xuemin (Sherman) Shen received the B.Sc.(1982) degree from Dalian Maritime University (China) and the M.Sc. (1987) and Ph.D. degrees (1990) from Rutgers University, New Jersey (USA), all in electrical engineering. He is a Professor and the Associate Chair for Graduate Studies, Department of Electrical and Computer Engineering, University of Waterloo, Canada. His research focuses on mobility and resource management in interconnected wireless/wired networks, UWB wireless communications systems, wireless security, and ad hoc and sensor networks. He is a co-author of three books, and has published more than 300 papers and book chapters in wireless communications and networks, control and filtering. Dr. Shen serves as the Technical Program Committee Chair for IEEE Globecom’07, General Co-Chair for Chinacom’07 and QShine’06, the Founding Chair for IEEE Communications Society Technical Committee on P2P Communications and Networking. He also serves as a Founding Area Editor for IEEE Transactions on Wireless Communications; Associate Editor for IEEE Transactions on Vehicular Technology; KICS/IEEE Journal of Communications and Networks; Computer Networks (Elsevier); ACM/Wireless Networks; and Wireless Communications and Mobile Computing (John Wiley), etc. He has also served as Guest Editor for IEEE JSAC, IEEE Wireless Communications, and IEEE Communications Magazine. Dr. Shen received the Excellent Graduate Supervision Award in 2006, and the Outstanding Performance Award in 2004 from the University of Waterloo, the Premier’s Research Excellence Award in 2003 from the Province of Ontario, Canada, and the Distinguished Performance Award in 2002 from the Faculty of Engineering, University of Waterloo. Dr. Shen is a registered Professional Engineer of Ontario, Canada. Alberto Leon-Garcia received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Southern California, in 1973, 1974, and 1976 respectively. He is a Full Professor in the Department of Electrical and Computer Engineering, University of Toronto, ON, Canada, and he currently holds the Nortel Institute Chair in Network Architecture and Services. In 1999 he became an IEEE fellow for “For contributions to multiplexing and switching of integrated services traffic”. Dr. Leon-Garcia was Editor for Voice/Data Networks for the IEEE Transactions on Communications from 1983 to 1988 and Editor for the IEEE Information Theory Newsletter from 1982 to 1984. He was Guest Editor of the September 1986 Special Issue on Performance Evaluation of Communications Networks of the IEEE Selected Areas on Communications. He is also author of the textbooks Probability and Random Processes for Electrical Engineering (Reading, MA: Addison-Wesley), and Communication Networks: Fundamental Concepts and Key Architectures (McGraw-Hill), co-authored with Dr. Indra Widjaja.     

Single DDCC Biquads with High Input Impedance and Minimum Number of Passive Elements

Two new configurations for the design of biquad filters with high input impedance are presented. The first configuration can synthesize low-pass and high-pass filter functions according to the passive components used. The second one can synthesize a band-pass filter function. The proposed configurations employ only one differential difference current conveyor (DDCC) as active elements and minimum number of passive elements, namely two resistors and two capacitors. Another filter topology based on DDCC is presented that allows modifying the quality factor without changing its natural frequency. All the filters enjoy low sensitivities. SPICE simulation results are given to confirm the validity of the analysis and to point out the high performance of the filters.Muhammed A. Ibrahim was born in Erbil, Iraq in 1969. He obtained his B.Sc. and M.Sc. degrees from Salahaddin University, Erbil, Iraq and Istanbul Technical University, Istanbul, Turkey in 1990 and 1999, respectively, all in electronics and communication engineering. Between 1992 and 1996 he worked as Research Assistant at Salahaddin University where he was later appointed as Assistant Lecturer in 1999. Since 2000 he has been studying for his Ph.D. degree in Electronics and Communication Engineering Program at Istanbul Technical University. His main research interests are CMOS circuit design, current-mode circuits and analog signal processing applications. He has more than 20 international journal and conference papers in scientific review.H. Hakan Kuntman received his B.Sc., M.Sc. and Ph.D. degrees from Istanbul Technical University in 1974, 1977 and 1982, respectively. In 1974 he joined the Electronics and Communication Engineering Department of Istanbul Technical University. Since 1993 he is a professor of electronics in the same department. His research interest include design of electronic circuits, modeling of electron devices and electronic systems, active filters, design of analog IC topologies. Dr. Kuntman has authored many publications on modelling and simulation of electron devices and electronic circuits for computer-aided design, analog VLSI design and active circuit design. He is the author or the coauthor of 76 journal papers published or accepted for publishing in international journals, 91 conference papers presented or accepted for presentation in international conferences, 99 turkish conference papers presented in national conferences and 10 books related to the above mentioned areas. Furthermore he advised and completed the work of 7 Ph.D. students and 31 M.Sc. students. Currently, he acts as the head of the Electronics and Communication Engineering Department in Istanbul Technical University. Dr. Kuntman is a member of the Chamber of Turkish Electrical Engineers (EMO).Oguzhan Cicekoglu received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999. He served also as part time lecturer at various institutions. He was with the Biomedical Engineering Institute of the Bogazici University between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of the same University.His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. Oguzhan Cicekoglu is the author or co-author of 62 journal papers and about 90 international or local conference papers published or accepted for publishing in journals or conference proceedings.He served as the committee member in various scientific conferences and as reviewer in numerous journals including Analog Integrated Circuits and Signal Processing, IEEE CAS-I, IEEE CAS-II, International Journal of Electronics, Microelectronics Journal, Solid State Electronics and IEE Proceedings Pt.G.Oguzhan Cicekoglu is a member of the IEEE.