共查询到20条相似文献,搜索用时 17 毫秒
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Krishna N. Vinod Christian A. Zorman Azzam A. Yasseen Mehran Mehregany 《Journal of Electronic Materials》1998,27(3):L17-L20
This paper reports on a process to fabricate single-crystal 3C-SiC on SiO2 structures using a wafer bonding technique. The process uses the bonding of two polished polysilicon surfaces as a means
to transfer a heteroepitaxial 3C-SiC film grown on a Si wafer to a thermally oxidized Si wafer. Transfer yields of up to 80%
for 4 inch diameter 3C-SiC films have been achieved. Homoepitaxial 3C-SiC films grown on the 3C-SiC on SiO2 structures have a much lower defect density than conventional 3C-SiC on Si films. 相似文献
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通过实验和理论计算,分析了InP/Si键合过程中,界面热应力的分布情况、影响键合结果的关键应力因素及退火温度的允许范围。分析结果表明,由剪切应力和晶片弯矩决定的界面正应力是晶片中心区域大面积键合失败的主要原因,为保证良好的键合质量,InP/Si键合退火温度应该在300~350℃范围内选取。具体实验验证表明,该理论计算值与实验结果相一致。最后,在300℃退火条件下,很好地实现了2inInP/Si晶片键合,红外图像显示,界面几乎没有空洞和裂隙存在,有效键合面积超过90%。 相似文献
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Two experiments were performed that demonstrate an extension of the ion-cut layer transfer technique where a polymer is used
for planarization and bonding. In the first experiment hydrogen-implanted silicon wafers were deposited with two to four microns
low-temperature plasma-enhanced tetraethoxysilane (TEOS). The wafers were then bonded to a second wafer, which had been coated
with a spin-on polymer. The bonded pairs were heated to the ion-cut temperature resulting in the transfer of a 400 nm layer
silicon. The polymer enabled the bonding of an unprocessed silicon wafer to the as-deposited TEOS with a microsurface roughness
larger than 10 nm, while the TEOS provided sufficient stiffness for ion cut. In the second experiment, an intermediate transfer
wafer was patterned and vias were etched through the wafer using a 25% tetramethylammonium hydroxide (TMAH) solution and nitride
as masking material. The nitride was then stripped using dilute hydrofluoric acid (HF). The transfer wafer was then bonded
to an oxidized (100 nm) hydrogen-implanted silicon wafer. After ion-cut annealing a silicon-on-insulator (SOI) wafer was produced
on the transfer wafer. The thin silicon layer of the SOI structure was then bonded to a third wafer using a spin-on polymer
as the bonding material. The sacrificial oxide layer was then etched away in HF, freeing the thin silicon from the transfer
wafer. The result produced a thin silicon-on-polymer structure bonded to the third wafer. These results demonstrate the feasibility
of transferring a silicon layer from a wafer to a second intermediate “transfer” or “universal” reusable substrate. The second
transfer step allows the thin silicon layer to be subsequently bonded to a potential third device wafer followed by debonding
of the transfer wafer creating stacked three-dimensional structures. 相似文献
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提出了一种基于硼酸溶液的GaAs/InP低温晶片键合技术,实现了GaAs/InP基材料间简单、无毒性的高质量、低温(290℃)晶片键合。GaAs/InP键合晶片解理截面的扫描电子显微镜(SEM)图显示,键合界面整齐,没有裂缝和气泡。通过键合过程,InP上的In0.53Ga0.47As/InP多量子阱结构转移到了GaAs基底上。X射线衍射及荧光谱显示,键合后的多量子阱晶体质量未变。二次离子质谱(SIMS)和Raman光谱图显示,GaAs/InP键合晶片的中间层厚度约为17 nm,界面处B元素有较高的浓度,键合晶片的中间层很薄,因此可以得到较好的电学、光学特性。 相似文献
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采用金属键合技术结合激光剥离技术将GaN基LED从蓝宝石衬底成功转移到Si衬底上。利用X射线光电子谱(XPS)研究不同阻挡层对Au向GaN扩散所起的阻挡作用,确定键合所需的金属过渡层。利用多层金属过渡层,在真空、温度400℃和加压300 N下实现GaN基LED和Si的键合,通过激光剥离技术将蓝宝石衬底从键合结构上剥离下来,形成GaN基LED/金属层/Si结构。用金相显微镜及原子力显微镜(AFM)观察结构的表面形貌,测得表面粗糙度(RMS)为12.1 nm。X射线衍射(XRD)和Raman测试结果表明,衬底转移后,GaN基LED的结构及其晶体质量没有发生明显变化,而且GaN与蓝宝石衬底间的压应力得到了释放,使得Si衬底上GaN基LED的电致发光(EL)波长发生红移现象。 相似文献
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D. V. Singh L. Shi K. W. Guarini P. M. Mooney S. J. Koester A. Grill 《Journal of Electronic Materials》2003,32(11):1339-1343
We demonstrate layer transfer of 150 nm of Si from a 200-mm, silicon-on-insulator (SOI) substrate onto a sapphire substrate
using low-temperature wafer bonding (T=150°C). The crystalline quality and the thermal stability of the transferred Si layer
were characterized by x-ray diffraction (XRD). A broadening of the (004) Si peak is observed only for anneal temperatures
TA≥800°C, indicating some degradation of the crystalline quality of the transferred Si film above these temperatures. The measured
electron Hall mobility in the bonded Si layer is comparable to bulk silicon for TA≤800°C, indicating excellent material quality. 相似文献
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Temperature and duration effects on microstructure evolution during copper wafer bonding 总被引:1,自引:0,他引:1
Interfacial morphologies during Cu wafer bonding at bonding temperatures of 300–400°C for 30 min followed by an optional 30-min
or 60-min nitrogen anneal were investigated by means of transmission electron microscopy (TEM). Results showed that increased
bonding temperature or increased annealing duration improved the bonding quality. Wafers bonded at 400°C for 30 min followed
by nitrogen annealing at 400°C for 30 min, and wafers bonded at 350°C for 30 min followed by nitrogen annealing at 350°C for
60 min achieve the same excellent bonding quality. 相似文献
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铌酸锂晶片的键合减薄及热释电性能研究 总被引:2,自引:0,他引:2
铌酸锂(LN)作为一种热释电材料,可以被用于制作光电探测器敏感单元的敏感层,但通常LN晶片厚度为0.5 mm,远大于光电敏感单元厚度的要求,所以需要用键合减薄及抛光技术对LN晶片进行加工处理。本研究所用键合减薄技术主要包含:RZJ-304光刻胶键合、铣磨、抛光、剥离液剥离和丙酮清洗RZJ-304胶。利用该技术加工得到了面积为10 mm×10 mm,厚度为50μm,表面比较光滑,表面粗糙度为1.63 nm的LN晶片。LN晶片的热释电信号峰峰值在减薄抛光后为176 mV,是未经处理时的4倍,满足了热释电探测器敏感层的要求。 相似文献
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Ki Yeol Byun Isabelle FerainJohn Hayes Ran Yu Farzan Gity Cindy Colinge 《Microelectronic Engineering》2011,88(4):522-525
In this work, an alternative method for producing the single crystalline Ge-Si Avalanche photodiodes (APD) with low thermal budget was investigated. Structural and electrical investigations show that low temperature Ge to Si wafer bonding can be used to achieve successful APD integration. Based on the surface chemistry of the Ge layer, the buried interfaces were investigated using high resolution transmission electron microscopy as a function of surface activation after low temperature annealing at 200 and 300 °C. The hetero-interface was characterized by measuring forward and reverse currents. 相似文献
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Material integration by wafer bonding and layer transfer is one of the main approaches to increase functionality of semiconductor
devices and to enhance integrated circuits (IC) performance. Even though most mismatches such as different lattice constants
betweeen bonding materials present no obstacle for wafer direct bonding, thermal stresses caused by thermal mismatches must
be minimized by low temperature bonding to avoid debonding, sliding or cracking. In order to achieve a strong bond at low
temperatures, two approaches may be adopted: 1) Bonding at room temperature by hydrogen bonding of OH, NH, or FH terminated
surfaces followed by polymerization to form covalent bonds. Within this approach the key is to remove the by-products of the
reaction at the bonding interface. 2) Direct formation of a covalent bond between clean surfaces without adsorbents in ultra
high vacuum conditions. Low temperature bonding allows bonding processed wafers for technology integration. Layer transfer
requires uniform thinning of one wafer of a bonded pair. The most promising technology involves a buried embrittled region
by hydrogen implantation. A layer with a thickness corresponding to the hydrogen implantation depth is then transferred onto
a bonded desired substrate by either splitting due to internal gas pressure or by forced peeling as long as the bonding energy
is higher than the fracture energy in the embrittled region at the layer transfer temperature. This approach is quite generic
in nature and may be applied to almost all materials. We have found that B+H co-implantation and/or H implantation at high
temperatures can significantly lower the splitting temperature. However, the wafer temperature during H implantation has to
be within a temperature window that is specific for each material. The experimentally determined temperature windows for some
semiconductors and single crystalline oxides will be given. 相似文献
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针对化合物半导体与Si基晶圆异质集成中的热失配问题,利用有限元分析方法开展GaAs半导体与Si晶片键合匹配偏差及影响因素研究,建立了101.6 mm(4英寸)GaAs/Si晶圆片键合匹配偏差评估的三维仿真模型,研究了不同键合结构和工艺对GaAs/Si晶圆级键合匹配的影响,系统分析了键合温度、键合压力、键合介质厚度及摩擦... 相似文献
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HgCdTe on Si: Present status and novel buffer layer concepts 总被引:2,自引:0,他引:2
T. D. Golding O. W. Holland M. J. Kim J. H. Dinan L. A. Almeida J. M. Arias J. Bajaj H. D. Shih W. P. Kirk 《Journal of Electronic Materials》2003,32(8):882-889
We discuss buffer-layer concepts for the synthesis of low defect-density HgCdTe epilayers on Si for both hybrid and monolithically
integrated, infrared focal-plane arrays (IRFPAa). The primary technical problems to overcome include the 19% lattice-parameter
mismatch between HgCdTe and Si, and the (211)B surface orientation required for molecular-beam epitaxy (MBE), the growth technique
of choice for HgCdTe. We provide a general overview of IRFPAs, motivations for realizing HgCdTe on Si, the current state-of-the-art
parameters as a baseline, and three novel buffer-layer concepts and technologies based on (1) obedient GeSi films on SiO2, (2) wafer bonding, and (3) chalcogenides. 相似文献
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A. Krost F. Heinrichsdorff F. Schnabel K. Schatke D. Bimberg H. Cerva 《Journal of Electronic Materials》1994,23(2):135-139
The growth of InP by low-pressure metalorganic chemical vapor deposition on vicinal Si(111), misoriented 3° toward [1-10],
is reported. Antiphase domain-free InP is obtained without any preannealing of the Si substrate. Crystallographic, optical,
and electrical properties of the layers are significantly improved as compared to the best reported InP grown on Si(001).
The high structural perfection is demonstrated by a full width at half maximum (FWHM) of 121 arcs for the (111) Bragg reflex
of InP (thickness = 3.4 μm) as obtained by double crystal x-ray diffraction. The low-temperature photoluminescence (PL) efficiency
is 70% of that of homoepitaxially grown InP layers. The FWHM of the near-gap PL peak is only 2.7 meV as compared to 4.5 meV
of the best material grown on Si(001). For the first time, InP:Fe layers with semi-insulating characteristics (ρ > 3 × 107 Ω-cm) have been grown by compensating the low residual background doping using ferrocene. Semi-insulating layers are prerequisite
for any device application at ultrahigh frequencies. 相似文献
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The use of plasma immersion as preparation for room temperature wafer bonding has been investigated. Silicon wafers have been
successfully bonded at room temperature after exposure to oxygen or argon plasma. Oxidized silicon wafers and crystalline
quartz have been bonded after exposure to oxygen plasma. The bonded interfaces exhibit very high surface energies, comparable
to what can be achieved with annealing steps in the range of 600–800°C using normal wet chemical activation before bonding.
The high mechanical stability obtained after bonding at room temperature is explained by an increased dynamic in water removal
from the bonded interface allowing covalent bonds to be formed. Electrical measurements were used to investigate the usefulness
of plasma bonded interfaces for electronic devices. 相似文献