超低功耗硅双模预置ECL高速分频器的研究

本文介绍了超低功耗硅双模预置ECL高速分频器的设计和工艺技术。采用0.6μm设计规则和多晶硅发射极-基极自对准双极技术,设计制作的双模(÷64/65,÷128/129)预置分频器,在3mW(电源电压为3V)的极低功耗下,工作频率在1000MHz以上。     

超高速低功耗ECL予置分频器研究

本文介绍一个÷5/6低功耗ECL予置分频器的设计,从降低电源电压,减小内部逻辑摆幅和寄生电容等几方面讨论了提高电路高速低功耗特性的途径。该电路采用串联电源电压结构,内部电路在-2.5V～-2.7V电源电压下工作。电路功耗仅为具有相同功能的普通ECL电路的1/6。采用3μm设计规则的氧化物隔离等平面S型双极工艺。发射极条实际尺寸2μm×9μm,晶体管f_i为3.2GHz。室温下典型功耗75mW,最高M作频率大于900MHz。     

一种ECL高速可编程分频器

本文介绍了一种ＥＣＬ高速可编程分频器的逻辑设计、电路设计、温度补偿设计、版图设计及研制结果。采用４μｍｐｎ结双埋层对通隔离ＥＣＬ工艺技术制作的可编程分频器，其最高工作频率达１００ＭＨｚ以上，工作温度范围为－５５～＋１２５℃，分频模数在１～６４之间任意自然数连续可变。     

一种500MHz高速程序分频器

文章介绍的高速程序分频器,电路方案独特,设计简洁新颖。在充分发挥各单元电路逻辑功能的基础上,通过巧妙地连接和组合,使其具有工作频率高(可高达500MHz)、功耗低、分频比预置直观、工作稳定可靠的显著特点,是一种性能优越,颇具特色的高速程序分频器。     

应用于26 GHz-41 GHz频率综合器的高速可编程分频器的设计

毫米波频率综合器中的重要模块之一高速可编程多模分频器,它主要用于对VCO的输出信号进行分频从而获得稳定的本振信号,它的性能影响整个毫米波频率综合器性能。本文设计的一种高速、低功耗、分频比可变的分频器具有非常重要的意义[1]。根据26 GHz-41 GHz硅基锁相环频率综合器的系统指标,本文基于TSMC 45nm CMOS工艺,设计实现了一种高速可编程分频器。本文采用注入锁定结构分频结构实现高速预分频,该结构可以实现在0 d Bm的输入功率下实现25 GHz-48 GHz的分频范围、最低功耗为:2.6 m W。基于脉冲吞咽计数器的可编程分频器由8/9双模分频器和可编程脉冲吞咽计数器组成。其中8/9双模分频器由同步4/5分频器和异步二分频构成,工作频率范围10 GHz-27 GHz,最低输入幅度为:300 m V,最低功耗为:1.6 m V。可编程吞咽计数器采用改进型带置数功能的TSPC D触发器,该可编程分频器的最大工作范围:25 GHz;最小功耗为:363μW。本文设计的高速可编程多模分频器,可以实现32-2 062的分频比;当工作于28 GHz时,相位噪声小于-159 dBc/Hz。动态功耗为5.2 m W。     

低成本数字分频器设计

本文介绍了利用硬件语言VeriolgHDL实现任意分频,特别是小数分频的设计方法,并在QuartusII编程环境下,进行了仿真和调试。     

400MHz吞脉冲程序分频器的研制

本文介绍了程序分频器的组成、逻辑设计。及提高速度的措施,该分频器配合双模前置分频器,可使吞脉冲程序分频器频率达420MHz。     

超高速分频器设计

介绍了超高速分频器的设计过程，提出了逻辑最简化设计方法以及ECL逻辑器件的应用和PCB设计中所应注意的问题及相应的技术措施。     

音乐计时芯片乐音组合用分频器的设计

介绍铝栅CMOS高频音乐计时芯片中乐音组合用分频器的设计,电路具有频率高和负载能力强的特点,各级门延迟时间的分配和设计是关键。同时介绍了该分频器各级门的动态特性以及内部用三态门控制结构的优点,给出了平均延迟时间的设计结果,该设计已应用于高频时钟芯片的大批量生产中。     

基于FPGA的全数字FSK调制解调器设计

根据数字信号FSK调制和解调的工作原理,采用层次化、模块化方法设计了一种基于FPGA芯片的FSK调制解调器;用数字键控法实现了调制,用过零检测法实现了全数字解调。同时结合系统功能实现的需要,设计了伪随机序列(m序列)模块。整个设计基于ALTERA公司的QuartusⅡ开发平台,并用Cyclone系列FPGA实现。所设计的调制解调器具有体积小、功耗低、集成度高、软件可移植性强、扰干扰能力强的特点,符合未来通信技术设计的方向。     

液相外延生长GaAs微探尖刻蚀剥离技术研究

介绍一种用于扫描近场光学显微术(NSOM)传感头的GaAs微探尖的生长剥离技术.通过SiO2掩膜窗口,利用一次选择液相外延制备周期性阵列的GaA微探尖.在GaAs衬底与GaAs微探尖之间引入AlGaAs层,并对窗口大小的AlGaAs层进行选择腐蚀,将单个GaAs微探尖从GaAs衬底上剥离下来.扫描电子显微镜显示的结果表明,此微探尖具有金字塔结构、表面光滑凡转移过程无损伤.这种技术制备的GaAs微探尖的形貌与质量主要由晶体的结构决定,具有可重复,表面光滑、适合批量生产的优点.     

Influence of the cap layer thickness on photoluminescence properties in strained InGaAs/GaAs single quantum wells

The influence of the GaAs cap layer thickness on the luminescence properties in strained In_0.20Ga_0.80As/GaAs single quantum well (SQW) structures has been investigated using temperature-dependent photoluminescence (PL) spectroscopy. The luminescence peak is shifted to lower energy as the GaAs cap layer thickness decreases, which demonstrates the effect of the GaAs cap layer thickness on the strain of InGaAs/GaAs single quantum wells (SQW). We find the PL quenching mechanism is the thermal activation of electron hole pairs from the wells into the GaAs cap layer for the samples with thicker GaAs cap layer, while in sample with thinner GaAs cap layer exciton trapping on misfit dislocations is dominated.     

Terahertz Emission from GaAs Films on Si(100) and Si(111) Substrates Grown by Molecular Beam Epitaxy

We report on the terahertz emission from femtosecond-laser-irradiated GaAs layers grown on Si(100) and Si(111) substrates. The results show that the terahertz emission from GaAs on Si is stronger than that of a semi-insulating bulk GaAs crystal. This increase is attributed to the strain field at the GaAs/Si interface. In the GaAs of the Si(100) sample, the stronger terahertz emission is observed compared with GaAs on Si(111). Moreover, the effect of changing the doping type of the Si substrate from n-type to semi-insulating was also studied and it was found that the terahertz emission intensity of GaAs on semi-insulating Si(100) is stronger than that of GaAs on n-type Si(100). Finally, strong terahertz emission from GaAs on semi-insulating Si(100) was observed not only in the reflection geometry but also in the transmission geometry. These results hold promise for new applications of terahertz optoelectronics.     

Effects of low temperatures and intensities on GaAs and GaAs/Gesolar cells

GaAs and GaAs/Ge solar cells grown by metalorganic chemical vapor deposition (MOCVD) were characterized at very low temperature (-185°C) and solar intensity (0.25 suns) to simulate the cell behavior in a severe interplanetary environment. A comparison is also made with GaAs cells grown with the liquid-phase-epitaxy (LPE) technique. The analysis carried out from -185 to +50°C shows, in particular, different behaviors for GaAs/Ge cells with active and passive Ge substrates; the GaAs/Ge passive cell behaves as a GaAs on GaAs cell, indicating that from the thermal and optical point of view, Ge acts only as a mechanical support. The GaAs cell with an active Ga substrate is affected by a notch in the I-V curves, which is more evident at low temperatures but reduces at low intensities. The GaAs/GaAs MOCVD cell shows the best performance at low temperature and intensity with a conversion efficiency of 27.2%     

Diffusion of zinc into gaas layers grown by molecular beam epitaxy at low substrate temperatures

We report the diffusion of zinc into low temperature (LT) GaAs grown by MBE at 200° C, the problems associated with using a silicon nitride film directly deposited on the LT GaAs as a Zn diffusion mask, and several schemes to avoid the problems. The Zn diffusion coefficient is measured (sealed-ampoule technique) to be about one order of magnitude higher in the LT GaAs than in normal GaAs, attributed to a large quantity of defects including arsenic antisites (As_Ga) in the LT GaAs. The effectiveness of silicon nitride as a Zn diffusion mask depends if the mask is deposited directly on the LT GaAs. The failure of the nitride directly deposited on the LT GaAs to stop the Zn is attributed to arsenic atoms outdiffusing from the As-rich LT GaAs (about 1 at. % excess As) into the nitride. Several structures are introduced including a 100-Å thick GaAs layer on the LT GaAs that are effective in preserving the diffusion mask properties of the silicon nitride.     

用于高功率密度功率因素校正的新一代600V砷化镓肖特基二极管

在200W连续导通模式功率因数校正（PFC）系统中，新一代600V砷化镓（GaAs）肖特基二极管与硅和碳化硅（SiC）二级管比较，砷化镓、碳化硅在PFC系统中的损耗减少高达25％。由于砷化镓有较低的结电容，砷化镓相对碳化硅高的通态损耗被较低的MOSFET损耗弥补了。和碳化硅技术相比，砷化镓有成本和可靠性优势。对于高频和高密度应用来说，新一代的砷化镓二级管是很有前景的。     

GaAs/Si异质外延的新进展

本工作从原理和实验技术上证实了氯化物VPE技术可用于CaAs/Si异质外延.CaAs/Si外延层表面平整光亮.对外延层进行了组分测量、高分辨率电镜和X-射线衍射分析.结果表明,外延层是符合化学计量比的CaAs单晶,外延层浓度可控范围为10~(14)～10~(17)cm~(-3),纵向掺杂分布平坦.用这种材料制成MESFET样管,跨导为40mS/mm.     

Lateral and vertical isolation by arsenic implantation into MOCVD-grown GaAs layers

We have demonstrated the formation of arsenic precipitates in GaAs using arsenic implantation and annealing. Electrical measurements show that very high resistivity (surface or buried) GaAs layers can be produced by this method. The arsenic-implanted materials are similar to GaAs:As buffer layers grown by low-temperature molecular beam epitaxy, which are used for eliminating backgating problems in GaAs circuits. Arsenic implantation is a nonepitaxial process which is compatible with current GaAs technology. Formation of insulating GaAs layers by this technique may improve the performance and packing density of GaAs integrated circuits, leading to advanced novel III–V compound-based technologies for high-speed and radiation-hard circuits.     

三组三元合金异质结的价带带阶

采用基于LMTO－ASA的平均键能计算方法和原子集团展开方法，研究了三组典型的晶格匹配三元合金异质结（GaAs）x（Ge2）1-x／GaAs，（AlAs）x（Ge2）1-x／GaAs和AlxGa1-xAs／GaAs的价带带阶△Ev（x）值。研究表明：AlxGa1-xAs／GaAs异质结的Mv（x）值随合金组分x的变化接近于线性；（GaAs）x（Ge2）1-x／GaAs和（AlAs）x（Ge2）1-x／GaAs的△Ev（x）值随合金组分x的变化是非线性的。△Ev（x）的理论计算值与实验结果相当符合。     

Etching behavior of GaAs/AlGaAs multilayer structure during laser beam scanning

The thermochemical etching behavior of GaAs/AlGaAs multilayer structure during laser beam scanning has been studied. The etch rate changes between GaAs and AlGaAs epilayers as the etching process proceeds through the layered sample. The phenomenon can be explained by the difference of thermal parameters of the heterojunction interface. The local temperature rise from laser irradiation has been calculated to investigate etching characteristics for GaAs and AlGaAs. It is concluded that the good thermal confinement at GaAs/AlGaAs interface produces the wider etch width of GaAs layer than that of AlGaAs layer in GaAs/AlGaAs multilayer. The maximum etch rate of the GaAs/AlGaAs multilayer was 32.5 μm/sec and the maximum etched width ratio of GaAs to AlGaAs was 1.7.