Simulation for capacitance correction from Nyquist plot of complex impedance–voltage characteristics

The impression of series resistance on unipolar semiconductor device’s capacitance–voltage spectrum is discussed by conventional impedance and admittance analysis, and it is shown that series resistance may cause large errors in capacitance–voltage data. It is shown that the existence of such errors can be deduced from suitable complex impedance measurement obtained during the capacitance–voltage measurement process and this information can be used to correct the distorted capacitance values. A theoretical analysis and computer simulation are presented in order to illustrate the nature of the problem and the technique by which accurate depletion region capacitance can be obtained.     

Electrical properties of high permittivity ZrO2 gate dielectrics on strained-Si

Deposition and electrical properties of high dielectric constant (high-k) ultrathin ZrO₂ films on tensilely strained silicon (strained-Si) substrate are reported. ZrO₂ thin films have been deposited using a microwave plasma enhanced chemical vapor deposition technique at a low temperature (150 °C). Metal insulator semiconductor (MIS) structures are used for high frequency capacitance–voltage (C–V), current–voltage (I–V), and conductance–voltage (G–V) characterization. Using MIS capacitor structures, the reliability and the leakage current characteristics have been studied both at room and high temperature. Schottky conduction mechanism is found to dominate the current conduction at a high temperature. Observed good electrical and reliability properties suggest the suitability of deposited ZrO₂ thin films as an alternative as gate dielectrics. Compatibility of ZrO₂ as a gate dielectric on strained-Si is shown.     

Interface properties of the Si(1 0 0)–SiO2 system formed by rapid thermal oxidation

In this work, the properties of the Si(1 0 0)–SiO₂ interface are examined directly following wet and dry rapid thermal oxidation (RTO) at 1000–1100°C. The high frequency and quasi-static CV response of the Si(1 0 0)–SiO₂ system are measured using a mercury probe method. The analysis indicates a high interface state density across the band gap for dry oxidation, with a characteristic peak in the range 0.8–0.9 eV above the valence band edge. These interface state profiles are compared to polysilicon/oxide/Si(1 0 0) structures, measured after rapid thermal annealing at 1050°C (where the gate oxide is grown by conventional furnace oxidation). The results show a striking similarity, pointing to a common origin for the interfacial defects. Steam-assisted RTO samples do not reveal these peaks, and the reasons for this are presented. The significance of these new results to thin oxide growth and optimisation by RTO are discussed.     

高阈值电压低界面态增强型Al2O3/GaN MIS-HEMT

采用高温热氧化栅极凹槽刻蚀工艺并结合高温氮气氛围退火技术,制备出了高阈值电压的硅基GaN增强型Al_2O_3/GaN金属-绝缘体-半导体高电子迁移率晶体管(MIS-HEMT)。采用高温热氧化栅极凹槽刻蚀工艺刻蚀AlGaN层,并在AlGaN/GaN界面处自动终止刻蚀,可有效控制刻蚀的精度并降低栅槽表面的粗糙度。同时,利用高温氮气退火技术能够修复Al_2O_3/GaN界面的界面陷阱,并降低Al_2O_3栅介质体缺陷,因此能够减少Al_2O_3/GaN界面的界面态密度并提升栅极击穿电压。采用这两项技术制备的硅基GaN增强型Al_2O_3/GaN MIS-HEMT具有较低的栅槽表面平均粗糙度(0.24 nm)、较高的阈值电压(4.9 V)和栅极击穿电压(14.5 V)以及较低的界面态密度(8.49×10¹¹ cm^-2)。     

The characterization of retention properties of metal–ferroelectric (PbZr0.53Ti0.47O3)–insulator (Dy2O3, Y2O3)–semiconductor devices

Metal–ferroelectric–insulator–semiconductor (MFIS) capacitors and field effect transistors with the structures of Al/Pb (Zr_0.53, Ti_0.47) O₃ (PZT)/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si were fabricated. The memory windows of Al/PZT/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si capacitors with sweep voltage of 10 V are 1.03 V and 1.48 V, respectively. The effect of band offset on the memory window was discussed. The retention times of Al/PZT/Y₂O₃/Si and Al/PZT/Dy₂O₃/Si MFISFETs are 11.5 days and 11.1 h, respectively. The longer retention time of Al/PZT/Y₂O₃/Si field effect transistors is attributed to the larger conduction band offset at the Y₂O₃/Si interface (2.3 eV) compared to that of Dy₂O₃/Si (0.79 eV).     

Electroforming of Si/SiO2 /W Structures with an Exposed Nanometer-Thick SiO2Layer

An experiment is presented concerning the electroforming of exposed-insulator Si/SiO₂/W structures, i.e., the current-induced formation of a carbonaceous conducting medium on the exposed area of the insulator and the self-organization of a nanometer-sized nonconducting gap in the medium. It is shown that the electroforming of Si/SiO₂/W structures greatly differs from that of Al/Al₂O₃/W structures. This difference is mainly due to the high level of the spreading resistance of the Si electrode and the high initial conductivity on the exposed area. The current–voltage characteristics of the electroformed structures are examined. It is argued that the structures could serve as a basis for memory arrays with a high density of data.     

Frequency effects on the dielectric properties of AlN film deposited by radio frequency reactive magnetron sputtering

Applications insulated metal substrates (IMS) for high-density and high-power mounting are greatly extending with miniaturizing of electronic components. Recently, aluminum nitride film has been used as a potential insulator and/or passivation material in insulated metal substrate because of its high intrinsic thermal conductivity, low thermal expansion coefficient, low dielectric constant and high electric resistivity. In this investigation, AlN films were deposited on Al substrates by radio frequency (RF) reactive magnetron sputtering. The metal-interfacial insulator layer-metal (Al/AlN/Al MIM) structures were obtained with AlN layer on Al substrates. Electrical properties of the MIM structures were investigated by meaning of C-V and C-f characteristics in the frequency range of 100 Hz-500 kHz and voltage range of −4 V to 4 V. Experimental results show that the dielectric constant of this structure decreases gradually with increasing frequency. While the dielectric loss tangent was tested from low frequency to high frequency, it is found that the dielectric loss tangent decreases from 0.03375, reaches a minimum (0.00424) at approximately 65 kHz and then increases sharply. These results are in accordance with modified model of Goswami and Goswami for such structure. The dielectric dispersion is observed due to distribution of interface states as well as ionized space charge carriers such as the oxygen atoms, nitrogen vacancies and defects. The AC conductivity results show that the electrical resistance decreases as the frequency increasing due to hopping type conduction.     

Tuning of the electrical characteristics of organic bistable devices by varying the deposition rate of Alq3 thin film

Organic bistable devices with an Al/Alq₃/n-type Si structure are investigated at different deposition rates of Alq₃ thin film. We can obtain current–voltage characteristics of these devices similar to those of metal/organic semiconductor/metal structures that are widely used for organic bistable devices. The bistable effect of the Al/Alq₃/n-type Si structure is primarily caused by the interface defects at the Al/Alq₃ junction. Moreover, the electrical properties of these devices can be modified and controlled by utilizing the appropriate deposition rates of the Alq₃ thin film by thermal deposition. XPS, AFM, and GIXRD measurements are performed to characterize the properties of Alq₃ thin film and Alq₃/Al interface. This type of devices involves an extremely simple fabrication process and offers great potential in future advanced organic electronics.     

Single band electronic conduction in hafnium oxide prepared by atomic layer deposition

Current–voltage and capacitance–voltage measurements on MOS structures with hafnium gate oxide (HfO₂) prepared by atomic layer deposition were conducted to determine the dominant current conduction in the Al/HfO₂/Si structure. In n-type substrate MOS structures, electron injection from Al into HfO₂ is observed when the Al electrode is negatively biased. Whereas in p-type MOS capacitors at negative biasing, no hole injection can be detected and the current in the insulator is again due to the electron injection from Al. These results unambiguously indicate that in both p- and n-type substrates and at both biasing polarities only electronic current conduction in the Si/HfO₂/Al is significant.     

Improved conversion efficiency of a‐Si:H/µc‐Si:H thin‐film solar cells by using annealed Al‐doped zinc oxide as front electrode material

In recent years, zinc oxide has been investigated as a front electrode material in hydrogenated amorphous silicon/hydrogenated microcrystalline silicon (a‐Si:H/µc‐Si:H) tandem solar cells. Such as for other transparent conducting oxide materials and applications, a proper balancing of transparency and conductivity is necessary. The latter is directly related to the density and the mobility of charge carriers. A high density of charge carriers increases conductivity but leads to a higher absorption of light in the near‐infrared part of the spectrum due to increased free‐carrier absorption. Hence, the only way to achieve high conductivity while keeping the transparency as high as possible relies on an increase of carrier mobility. The carrier density and the mobility of sputtered Al‐doped zinc oxide (ZnO:Al) can be tailored by a sequence of different annealing steps. In this work, we implemented such annealed ZnO:Al films as a front electrode in a‐Si:H/µc‐Si:H tandem solar cells and compared the results with those of reference cells grown on as‐deposited ZnO:Al. We observed an improvement of short‐circuit current density as well as open‐circuit voltage and fill factor. The gain in current density could be attributed to a reduction of both sub‐band‐gap absorption and free‐carrier absorption in the ZnO:Al. The higher open‐circuit voltage and fill factor are indicators of a better device quality of the silicon for cells grown on annealed ZnO:Al. Altogether, the annealing led to an improved initial conversion efficiency of 12.1%, which was a gain of +0.7% in absolute terms. Copyright © 2013 John Wiley & Sons, Ltd.     

Characterization of ultralow voltage, fully depleted silicon on insulator CMOS device and circuit technology

We present the design, fabrication and characterization of fully depleted silicon on insulator (FDSOI) CMOS devices and circuits for ultralow voltage operation. We have obtained symmetrical threshold voltages for N and P channel devices with an ON–OFF current ratio of 1000:1. A figure of merit of 5 fJ/stage is achieved at 0.25 V on 0.25 μm, 2-input NAND gate FDSOI CMOS ring oscillators. Polysilicon gate depletion and source–drain series resistance limit the performance of the FDSOI CMOS technology. A simplified model combined with high frequency capacitance–voltage measurements at two different frequencies is developed to determine the series resistance and polysilicon gate depletion effects.     

Novel Thermally Stable Single-Component Organic-Memory Cell Based on Oxotitanium Phthalocyanine Material

This letter reports a novel single-component organic-memory cell based on oxotitanium phthalocyanine (TiOPc) material. The device can achieve good resistive-switching performance such as a high on/off current ratio of about $hbox{10}^{4}$, large read signal window (4 V), and good retention (4 h at 1-V read voltage). The organic-memory cell exhibits excellent thermal stability above 525 K due to the thermal robustness of TiOPc, which indicates its potential for hybrid integration with CMOS technology at the back-end process and flexible electronics system. The current–voltage characteristics are comprehensively investigated, and a possible mechanism is proposed and well fitted with the experimental data. The results show that the trap-filling space-charge-limited conduction with TiOPc charge confinement and the electrochemical reaction at the Al/TiOPc interface can elucidate the switching behavior of the memory cell.      

Improvement of gate dielectric reliability for p+poly MOS devices using remote PECVD top nitride deposition on ultra-thin (2.4–6 nm) gate oxides

Dual layer dielectrics have been formed by remote PECVD deposition of ultra-thin (0.4–1.2 nm) nitrides onto thin thermal oxides grown on n-type Si(100) substrates. Activation of boron-implanted p+ polycrystalline silicon gate electrodes was accomplished by a high temperature anneal, 1–4 min at 1000°C. Boron penetration through the dielectric film to the n-type substrate was investigated by performing a quasi-static C–V analysis and monitoring the flatband voltage shift. Boron penetration was effectively stopped by a 0.8 nm nitride film, and partially stopped by a 0.4 nm nitride film. In addition, the charge to breakdown as monitored by the Q_bd value to 50% cumulative failure was highest for the device with the 0.8 nm top nitride, and decreased significantly in the thermal oxide. However there were essentially no differences in the mid-gap interface state densities, D_it, between oxide and nitride/oxide gate dielectric structures with Al gate. It is concluded that the 0.8 nm of plasma nitride was sufficient to block boron atom out-diffusion from a heavily implanted p+ poly-silicon gate electrode under the conditions of an aggressive implant activation anneal to improve the dielectric reliability.     

Sensing behavior and mechanism of titanium dioxide-based MOS hydrogen sensor

A Pd/TiO₂/Si MOS sensor (Pdtisin sensor) is proposed for the detection of hydrogen gas. The sensor is fabricated on a p-type 1 1 1 silicon wafer having resistivity of 3–6 Ω cm. The thickness of TiO₂ in this structure is about 600 nm. The capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics of the device is observed on the exposure of hydrogen gas at room temperature. The mechanism of hydrogen sensing of titanium dioxide-based MOS sensor (MOS capacitor) has been investigated by evaluating the change in flat-band voltage (V_FB) and fixed surface state density of the device in presence of hydrogen gas. The device exhibits very large parallel shift in C–V as well in G–V characteristics. The possible mechanism on Pd/TiO₂ and TiO₂/Si surface in presence of hydrogen gas has been proposed. The response and recovery time of the device is also measured at room temperature.     

Double-Junction Schottky Diodes Using a Ti/Si/Al Structure

Ti/Si/Al structures are studied theoretically and experimentally. The effect of the reverse-biased junction on the current–voltage characteristic of the entire structure is revealed. It is noted that the behavior of the curve is determined by the image-force lowering of the potential barrier. The current–voltage characteristic is shown to obey a power law if the voltage is low enough. It is established that the capacitance of the structure decreases with increasing voltage if the latter is positive. This phenomenon is modeled using two capacitors in a series.     

Numerical analysis of the non-equilibrium plasma flow in the gaseous electronics conference reference reactor

The capacitively coupled plasma in the gaseous electronics conference reference reactor is numerically investigated for argon flow using a non-equilibrium plasma fluid model. The finite rate chemistry is adopted for the chemical non-equilibrium among species including neutral metastable, whereas a two-temperature model is employed to resolve the thermal non-equilibrium between electrons and heavy species. The predicted plasma density agrees very well with experimental data for the validation case. A strong thermal non-equilibrium is observed between heavy particles and electrons due to its low collision frequency, where the heavy species remains near ambient temperature for low pressure and low voltage conditions (0.1 Torr, 100 V). The effects of the operating parameters on the ion flux are also investigated, including the electrode voltage, chamber pressure, and gas flow rate. It is found that the ion flux can be increased by either elevating the electrode voltage or lowering the gas pressure.     

Thermal reliability of gold–aluminum bonds encapsulated in bi-phenyl epoxy resin

Bond degradation of Au wire/Al pad has become a major problem, because of the use of molding resin with low thermal stability (e.g. bi-phenyl epoxy resin) and the use of the IC devices under high thermal environments. It is therefore important to insure the thermal reliability at Au/Al bonds. The lifetime to bond failure of bi-phenyl epoxy molding became shorter than that for cresol novolac epoxy. The failures were caused by the corrosion reaction of Au–Al intermetallics with bromine (Br) contained in the resin compounds. It was clarified that the reactive intermetallic was Au₄Al phase formed in the bond interface.The governing factors of the bond corrosion were investigated such as resin compound and gold wire material. Especially some impurities in gold wire could affect the Au–Al intermetallic growing and therefore retard the corrosion. The use of the alloyed wire was effective in improving the bond reliability.     

$hbox{TiN/ZrO}_{2}$/Ti/Al Metal–Insulator–Metal Capacitors With Subnanometer CET Using ALD-Deposited $hbox{ZrO}_{2}$ for DRAM Applications

We provide the first report of the structural and electrical properties of $hbox{TiN/ZrO}_{2}$/Ti/Al metal–insulator–metal capacitor structures, where the $hbox{ZrO}_{2}$ thin film (7–8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance–voltage ($C$– $V$) and current–voltage ( $I$–$V$) characteristics are reported for premetallization rapid thermal annealing (RTP) in $hbox{N}_{2}$ for 60 s at 400 $^{circ}hbox{C}$, 500 $^{circ}hbox{C}$, or 600 $^{ circ}hbox{C}$. For the RTP at 400 $^{circ}hbox{C}$ , we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of $sim$ 0.9 nm at a gate voltage of 0 V. The dielectric constant of $ hbox{ZrO}_{2}$ is 31 $pm$ 2 after RTP treatment at 400 $^{circ}hbox{C}$.      

Investigations on electrical characteristics and reliability properties of MOS capacitors using HfAlOx on n-GaAs substrates

Radio frequency sputtering system is employed to fabricate metal oxide semiconductor (MOS) capacitors using an ultra-thin layer of HfAlO_x dielectric deposited on n-GaAs substrates with and without a Si interface control layer incorporated in between the dielectric and the semiconductor. Measurements are performed to obtain capacitance voltage (C–V) and current voltage (I–V) characteristics for GaAs/Si/HfAlO_x and GaAs/HfAlO_x capacitors under different constant voltage and constant current stress conditions. The variation of different electrical parameters such as change in interface trap density, hysteresis voltage with various values of constant voltage stress and the dependence of flat band voltage, fractional change in gate leakage current density, etc. with stress time are extracted from the C–V and I–V data for capacitors with and without a Si interlayer. Further the trap charge density and the movement of trap centroid are investigated for various injected influences. The dielectric breakdown and reliability properties of the dielectric films are studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd ? 1350 s) is observed for HfAlO_x gate dielectric with a silicon inter-layer under the high constant voltage stress at 8 V. Compared to capacitors without a Si interlayer, MOS capacitors with a Si interlayer exhibit improved electrical and breakdown characteristics, and excellent interface and reliability properties.     

Reliability of thick Al wire bonds in IGBT modules for tractionmotor drives

Reliability enhancement of thick Al wire bonds during thermal fatigue test has been investigated from a metallurgical viewpoint. Al wire bonds degrade with the increase of crack length during thermal fatigue tests with high ΔT_j due to the tensile stress generated by the thermal expansion coefficient mismatch between Al wires and Si. It is also found that cracks propagate along the small grain boundaries of Al wires at the bonding interface. It is predicted that the Al wire bonds may not degrade due to thermal fatigue if ΔT_j is controlled below 40 K, i.e., keeping it within the actual temperature fluctuation range in IGBT modules for traction motor drives. The reliability of Al wire bonds can be enhanced by increasing the grain size of the Al wire at the bonding interface. The high temperature bonding is considered to be a good candidate for enhancing the reliability of Al wire bonds