Base current relaxation transient in reverse emitter-base biasstressed silicon bipolar junction transistors

The base current relaxation transient following reverse emitter-base (EB) bias stress and its effect on time-to-failure (TTF) determination are examined in self-aligned and nonself-aligned silicon bipolar junction transistors (BJTs) with thermal and deposited base oxide. A quantitative model indicates that the transient is due to a reduction of the stress-generated positive charge trapped in the oxide layer near the emitter-base junction due to holes tunneling from oxide hole traps to silicon band states or SiO₂/Si interface traps. The neutral oxide hole traps may be quickly recharged through hole tunneling or hole injection into the oxide during further reverse-bias stress. A delay time of ~10^-3 s was observed after the termination of stress before base current relaxation begins, which affects the extraction of the ac operation TTF from dc stress measurements     

Temperature dependence of hot-electron degradation in bipolartransistors

Degradation of the base current and current gain observed in bipolar transistors that were electrically stressed at-75, 175, and 240°C for 1000 h with a constant reverse-bias voltage applied to the emitter-base junctions is discussed. The rate of degradation was found to be temperature-dependent with a larger degradation occurring at the lower temperature. This temperature dependency is studied using an electron energy simulation technique and experimental data on degradation and postdegradation annealing. From the electron energy simulations, the number of hot electrons above a damage threshold energy was seen to increase with increasing ambient temperature at a constant reverse-bias voltage. This increase with temperature occurred because higher stress currents dominated over a reduction in the electron mean free path between collisions at higher temperatures. However, an actual degradation rate reduction at higher temperatures occurs because of simultaneous annealing of the states produced by hot electrons. A model that describes the temperature dependence of degradation and postdegradation annealing is described     

Degradation of High-Brightness Green LEDs Submitted to Reverse Electrical Stress

This letter describes an extensive analysis of the reverse-bias degradation of green light-emitting diodes. The analysis consists in a wide set of stress tests carried out under different negative-bias levels. The results presented in this letter indicate the following: 1) Leakage current is strongly correlated to the presence of reverse-bias luminescence; 2) reverse current flows through preferential leakage paths and is due to a soft-breakdown mechanism that is possibly correlated to the presence of structural defects; 3) reverse-bias stress can induce an increase in the leakage current, with a corresponding decrease in the breakdown voltage of the samples; and 4) the degradation rate has a linear dependence on the (reverse) stress-current level, suggesting that degradation is induced by hot carriers. On the basis of the evidence collected in this letter, degradation can be ascribed to the generation/propagation of point defects due to the injection of highly accelerated carriers.     

Defect generation in InGaN/GaN light-emitting diodes under forward and reverse electrical stresses

Electrical and optical degradations of GaN/InGaN single-quantum-well light-emitting diodes (LEDs) under high-injection current (150 A/cm²) and reverse-bias (−20 V) stresses were investigated. A substantial increase in the tunneling components of both forward and reverse currents was observed in the devices subjected to reverse biases. However, the stressed LEDs exhibited minimal degradation of optical characteristics. For devices subjected to high forward currents, a monotonic decrease in light intensities with stress time, accompanied by an increase of forward leakage current, was observed in the low-injection region, but a positive stress effect was found on the light output measured at high currents. These degradation behaviors can be explained by slow generation of point defects in the LEDs via different mechanisms, i.e., thermally induced defect formation in the InGaN active region in the devices subjected to high-injection currents, and destructive microstructual changes as a result of impact ionization in the cladding layer in the devices under high reverse-bias stress.     

Reliability investigation of AlGaN/GaN high electron mobility transistors under reverse-bias stress

Impact of reverse-bias stress on the reliability of AlGaN/GaN high electron mobility transistors was investigated in this paper. We found that inverse piezoelectric effect could induce noisy characteristics of stress current, and the “critical voltage” increased with the drain–source bias in the step-stress experiments. Although the degradation of the gate leakage current and drain-to-source leakage current are non-recoverable, the maximum output current can recover almost completely through electron de-trapping procedure after stress. The de-trapping activation energy was estimated to be 0.30 eV by the dynamic conductance technique. The surface morphology of the electrically stressed devices was investigated after removing the gate metallization by chemical etching, and no pits or cracks under the gate contact were observed.     

Soft breakdown in titanium-silicided shallow source/drain junctions

Electrical characterization of the leakage current in p⁺/n shallow junctions (X_j=130 nm) shows that the current increases dramatically with titanium thickness and strongly depends on the reverse-bias voltage. The activation energy of leakage current extracted from the temperature dependence of the current decreases with increasing reverse-bias voltage. This behavior cannot be explained by the Shockley-Hall-Read (SHR) generation-recombination mechanism. A mechanism involving Frenkel-Poole barrier lowering of a trap potential is proposed     

A New Extraction Technique for the Complete Small-Signal Equivalent-Circuit Model of InGaP/GaAs HBT Including Base Contact Impedance and AC Current Crowding Effect

In this paper, both ac current crowding and base contact impedance are considered and included in the T-type small-signal equivalent circuit of InGaP/GaAs heterojunction bipolar transistors. The ac current crowding effect and base contact impedance are modeled as a parallel$RC$circuit, respectively. Devices parameters of the equivalent circuit are obtained by a new parameters extraction technique. The technique is to directly analyze the two-port parameters of multibias conditions (cutoff-bias, open-collector, and active-bias modes). The parallel capacitances ($C_B$and$C_ bi$), base resistances ($R_B$and$R_ bi$), and base inductance$(L_B)$are especially determined under the active-bias mode without numerical optimization. In addition, the small-signal equivalent circuits of cutoff-bias and open-collector modes are directly derived from the active-bias mode circuit for consistency. By considering base contact impedance and intrinsic base impedance effects in the presented small-signal equivalent circuit, the calculated$S$-parameters agree well with the measured$S$-parameters. The observed difference in the slope for the unilateral power gain$(U)$versus frequency at high frequency is mainly attributed to the ac emitter current crowding effect and well modeled in this study.     

Revisiting the analytic theory of p-n junction impedance:improvements guided by computer simulation leading to a new equivalentcircuit

We revisit the analytic derivation of the dc and low frequency ac behavior of the p-n step junction and suggest all preexisting treatments are flawed for three important reasons. First, not all contributions to the diode current are included. We derive a rigorous expression for each component of current that can be used to judge the completeness of existing analytic theories. Additionally, wrong boundary conditions for minority carrier concentrations and incorrect equivalent circuit topologies undermine present analytic theories of the diode. We propose a new analytic equivalent circuit model which institutes correct boundary conditions. The resulting circuit model demonstrates excellent dc and ac accuracy for symmetric and asymmetric junctions, for long, short, or intermediate base regimes. Inductive behavior associated with short base diodes at large forward bias is reproduced, as is the decrease in capacitance observed in long base diodes. The assumptions and limitations of our new circuit model are thoroughly investigated     

Impact of geometrical scaling on low-frequency noise in SiGe HBTs

The influence of geometrical scaling on low-frequency noise in SiGe HBTs is presented. Small-size transistors show a strong variation in noise across many samples, whereas the noise in larger devices is more statistically reproducible. This size-dependent variation in noise can produce challenges for accurate compact modeling. This effect is investigated using reverse-bias emitter-base stress and calculations based on the superposition of generation/recombination noise.     

GaN基绿光LED芯片电流加速失效机理研究

采用电流加速的电应力老化方法研究GaN基绿光 LED芯片的失效机理。LED芯片在经过60 mA 电流老化424 h后,其发光效率总体趋势都是随老化时间增加而减小 ,但是小测量电流相比于大测量电 流的发光效率衰减程度更为明显。同时,在正向偏压下电流电压曲线基本没有变化,而反向 偏压下的反向 电流随老化时间的增加而快速增加。笔者认为在电应力老化作用下,随老化时间增加,有源 区的缺陷能级 增多,在正向偏压下,缺陷能级起到一个有效陷阱的作用,增加了载流子的寿命,降低了辐 射复合的几率, 使得发光效率降低,但是并没有减小正向偏压下的电流,而反向偏压时,缺陷能级起到了一 个漏电通道的作用,使得反向电流增大。     

A distributed model of the junction transistor and its application in the prediction of the emitter-base diode characteristic, base impedance, and pulse response of the device

A distributed model for a junction transistor has been analyzed to include both dc and ac biasing effects in the active base region, with particular emphasis on a small-geometry diffused base planar transistor. For such devices with extremely narrow base width, dc biasing effects cannot be neglected. At high frequencies, the response of these devices is greatly modified by ac biasing effects which are accentuated by the significant dc biasing at large emitter current levels. Two-dimensional current flow under these biasing conditions was studied with a distributed model of the active base region. From such a model, the expressions for emitter-base diode characteristic, small-signal and large-signal base resistance, and complex base impedance valid for high frequencies have been deduced in terms of physical parameters of the devices like the geometry, base resistivity, etc. This equivalent base impedance and an ideal diode with its diffusion and emitter-base transition capacitance constitute the lumped model of the emitter-base region. For any particular frequency, the base impedance can be represented exactly by a parallel RC network. The distributed model can also predict the pulse response of the device more accurately than a lumped model and show the sensitivity of the transient response to the physical parameters mentioned above. Experimental verifications of the theoretical expressions are found to be satisfactory, and limitations of the earlier works are pointed out in regard to present devices.     

Modeling of output resistance in SiGe heterojunction bipolartransistors with significant neutral base recombination

A simple compact model, suitable for circuit simulations, is derived which enables quantitative determination of the impact of neutral base recombination on the small signal ac output resistance of SiGe HBT's for arbitrary base ac drive conditions. The model uses existing SPICE parameters which are routinely extracted from bipolar transistors plus an additional model parameter which can be extracted from a proposed experimental technique involving output resistance measurements under base ac voltage and current drive conditions. The modeling approach also enables the forward and reverse base transit times to be related to transistor small signal ac output resistance by a simple analytic expression. The currently accepted expression for the r _μ parameter, which is used to model neutral base recombination in the ac hybrid-π equivalent circuit, is shown to be incorrect and is replaced by a new correct expression. Numerical simulations of a SiGe HBT structure which exhibits neutral base recombination are used to verify the validity of the model     

Compact Modeling Methodology of Strained-Si Channel-on-Insulator (SSOI) MOSFETs

Compact physical models for SSOI MOSFETs are presented. The models consider specific features for strained-Si devices including SSOI such as mobility enhancement, band offsets, junction capacitance, and self-heating effects. All of the floating-body current components in conventional SOI structure, which are generation/recombination current, reverse-bias (band-to-band and trap-assisted) junction tunneling currents, gate-induced drain leakage current, gatebody oxide tunneling current, and impact ionization current are applied to the SSOI device, and their effects are discussed. The model validity is confirmed by fabricated 70?nm bulk-Si (control) and strained-Si devices.     

An accurate charge control approach for modeling excess phase shiftin the base region of bipolar transistors

The conventional charge control approach is extended to enable the accurate determination of excess phase shift in the ac common-emitter current gain of bipolar transistors arising from distributed stored minority carrier charge in the neutral base. Generalized expressions, valid for transistors with arbitrary impurity profiles and position-dependent transport parameters, are presented from which the excess phase shift can be determined solely from device structure and process data. The ac model parameters which result from the extended charge control approach are used in an existing high-frequency compact nonquasi-static bipolar model which is suitable for SPICE simulation     

Leakage current by Frenkel–Poole emission on benzotriazole and benzothiadiazole based organic devices

In this study three different organic semiconductors were used in the fabrication of ITO/PEDOT:PSS/Polymer:PCBM/LiF/Al configuration. Reverse current density–voltage (J_r–V) measurements of the samples were investigated to define the reverse-bias leakage current mechanisms on benzotriazole and benzothiadiazole based organic devices. Our results indicate that the J_r–V plot behaviors are given by linear dependence between In ( J_r) and V^1/2, where J_r is the reverse current density, and V is the applied voltage. This behavior is well known as the Poole–Frenkel (PF) effect where it is found to be dominating in the reverse-bias leakage current.     

Substrate-bias effect and source-drain breakdown characteristics inbody-tied short-channel SOI MOSFET's

The substrate-bias effect and source-drain breakdown characteristics in body-tied short-channel silicon-on-insulator metal oxide semiconductor field effect transistors (SOI MOSFET's) were investigated. Here, “substrate bias” is the body bias in the SOI MOSFET itself. It was found that the transistor body becomes fully depleted and the transistor is released from the substrate-bias effect, when the body is reverse-biased. Moreover, it was found that the source-drain breakdown voltage for reverse-bias is as high as that for zero-bias. This phenomenon was analyzed using a three-dimensional (3-D) device simulation considering the body-tied SOI MOSFET structure in which the body potential is fixed from the side of the transistor. This analysis revealed that holes which are generated in the transistor are effectively pulled out to the body electrode, and the body potential for reverse-bias remains lower than that for zero-bias, and therefore, the source-drain breakdown characteristics does not deteriorate for reverse-bias. Further, the influence of this effect upon circuit operation was investigated. The body-tied configuration of SOI devices is very effective in exploiting merits of SOI and in suppressing the floating body-effect, and is revealed to be one of the most promising candidates for random logic circuits such as gate arrays and application specific integrated circuits     

Inherent and stress-induced leakage in heavily doped siliconjunctions

Inherent leakage currents and leakage induced with reverse-bias stress are investigated in heavily doped emitter-base junctions of polysilicon self-aligned bipolar transistors and similar diodes. Inherent in the devices is a reverse leakage component found to have a perimeter trap-assisted tunneling component characteristic of the Si-SiO ₂ surface and evident at doping insufficient for significant band-to-band tunneling. The band-to-band phonon-assisted tunneling and avalanche leakage components are also identified. Introducing surface states through reverse-bias stress induces a Pool-Frenkel electric field enhanced generation/recombination surface leakage component. The induced and trap-assisted tunneling components are distinct. The induced component is found to saturate as available states, dependent on the peak electric field, are exhausted. Trapped charge accumulation after extensive stressing affects the electric field along the surface reducing the induced and trap-assisted tunneling leakage components     

Sinusoidal AC stressing of thin-gate oxides and oxide/siliconinterfaces in 0.5-μm n-MOSFETs

Sinusoidal ac signals are applied to 90-Å thick gate-oxide in 0.5-μm n-MOSFETs. The objective is to emulate ac stressing to devices, recently reported to occur during plasma processes. AC stressing is found to be more damaging to the oxide and oxide/silicon interface when compared to dc stressing. The damage induced by the ac stress is observed to depend on the signals frequency and amplitude. It is proposed that carrier hopping is primarily responsible for oxide current and device damage observed following the ac stress. This hopping current is insignificant during high-field dc stress when Fowler-Nordheim tunneling becomes the dominant conduction mechanism     

High-Frequency Noise Modeling of InGaP/GaAs HBT With Base-Contact Capacitance and AC Current Crowding Effect

A heterojunction-bipolar-transistor (HBT) noise model including the base-impedance effect is presented, which takes into account the base-contact capacitance and ac current crowding effect. The proposed noise model describes well the high-frequency noise characteristics of InGaP/GaAs HBTs in the presence of base-impedance effect. Good agreement is observed between the measured and calculated noise parameters for the different sizes of InGaP/GaAs HBTs. We found that the effect of ac current crowding on noise parameters is more critical than that of base-contact capacitance.      

MEXTRAM modeling of Si-SiGe HPTs

The integration of the photodetector is essential for optical communication chips. The heterojunction phototransistor (HPT) is integrable with the SiGe HBT process and can be modeled by a modified MEXTRAM model for the circuit simulation. The impact ionization to obtain an extra gain for the optoelectronic conversion and the "early voltage reduction" under constant illumination are well modeled in a modified model. The base recombination current (nkT current) and the substrate contact to enhance the HPT speed are incorporated in ac model. It shows a good agreement between measurement and simulation.