Novel write‐erasable input display with memory circuits and photosensors

We have developed a new conceptual liquid crystal display (LCD) with a memory circuit and a photosensor in each pixel to realize excellent handwriting performance. Direct writing and erasing a character in the LCD are available because their direct processing only in the pixel are performed without calculating coordinates by using a light pen and integrated pixel circuits. In addition, this LCD enables to display still image data stored in the pixel memory circuit at a low liquid crystal (LC) driving frequency of 1.0 Hz. In the result, we have achieved faster handwriting response time of 0.5 ms and lower power consumption of 0.7 mW in 7.0‐in. QVGA reflective LCD panel.     

A novel pixel memory using integrated voltage‐loss‐compensation (VLC) circuit for ultra‐low‐power TFT‐LCDs

Abstract— A novel pixel memory using an integrated voltage‐loss‐compensation (VLC) circuit has been proposed for ultra‐low‐power TFT‐LCDs, which can increase the number of gray‐scale levels for a single subpixel using an analog voltage gray‐scale technique. The new pixel with a VLC circuit is integrated under a small reflective electrode in a high‐transmissive aperture‐ratio (39%) 3.17‐in. HVGA transflective panel by using a standard low‐temperature‐polysilicon process based on 1.5‐μm rules. No additional process steps are required. The VLC circuit in each pixel enables simultaneous refresh with a very small change in voltage, resulting in a two‐orders‐of‐magnitude reduction in circuit power for a 64‐color image display. The advanced transflective TFT‐LCD using the newly proposed pixel can display high‐quality multi‐color images anytime and anywhere, due to its low power consumption and good outdoor readability.     

TFT‐LCD driver IC with embedded non‐volatile memory for portable applications

Abstract— To improve the display quality and yield of the TFT‐LCD driver IC, non‐volatile multiple‐time‐programmable (MTP) memory, which consists of an EEPROM cell and our proposed sense amplifier and power control circuit (SP), was integrated into a TFT‐LCD driver IC. The proposed SP has a 30% smaller layout area and a 18% faster response time compared to that of the conventional SP. The proposed SP also has lower power consumption because it does not use a static current. The TFT‐LCD quality was also improved by tuning the characteristics of the driver IC and the panel with the VREF, OSC, and VCOM blocks, using non‐volatile MTP memory. When the display quality improved, the yield also improved, along with a reduction in the failure ratio of the display module, which consists of the driver IC and the panel. As a result, the TFT‐LCD driver IC with the non‐volatile MTP memory demonstrated improved display quality and a higher yield compared to conventional driver ICs without such a memory.     

Design of a low‐power‐consumption a‐IGZO TFT‐based Vcom driver circuit with long‐term reliability

Abstract— An amorphous‐InGaZnO (a‐IGZO) thin‐film transistor (TFT)‐based Vcom driver circuit that has long‐term reliability and can be integrated with the pixel array on a panel has been designed. Owing to the Vcom inversion, the power consumed by the proposed driving scheme is 40% less than that consumed by the conventional line‐inversion method. The high mobility (>10 cm²/V‐sec) of the a‐IGZO TFTs allows the integration of devices with small channel widths (<750 μm) and thus keeps the overall device size small, which is important for displays with narrow bezels. The lifetime of the Vcom driver is improved by AC driving (by clocking the n‐th and (n + 1)‐th frame with 20 and 0 V, respectively) of the buffer TFTs.     

Digital‐to‐analog converter with gamma correction on glass substrate for TFT‐panel applications

Abstract— Low‐temperature polysilicon (LTPS) technology has a tendency towards integrating all circuits on glass substrate. However, the poly‐Si TFTs suffered poor uniformity with large variations in the device characteristics due to a narrow laser process window for producing large‐grained poly‐Si TFTs. The device variation is a serious problem for circuit realization on the LCD panel, so how to design reliable on‐panel circuits is a challenge for system‐on‐panel (SOP) applications. In this work, a 6‐bit R‐string digital‐to‐analog converter (DAC) with gamma correction on glass substrate for TFT‐panel applications is proposed. The proposed circuit, which is composed of a folded R‐string circuit, a segmented digital decoder, and reordering of the decoding circuit, has been designed and fabricated in a 3‐μm LTPS technology. The area of the new proposed DAC circuit is effectively reduced to about one‐sixth compared to that of the conventional circuit for the same LTPS process.     

Ultra‐low‐power LTPS TFT‐LCD technology using a multi‐bit pixel memory circuit

Abstract— Two types of low‐temperature poly‐Si TFT LCDs, which integrate a multi‐bit memory circuit and a liquid‐crystal driver within a pixel, have been developed using two different TFT process technologies. Both a 1.3‐in. 116‐ppi LCD having a 2‐bit pixel memory and a 1.5‐in. 130‐ppi LCD having a 5‐bit pixel memory consume very little power, less than 100 μW, which indicates that this technology is promising for mobile displays.     

A novel low‐power‐consumption all‐digital system‐on‐glass display with serial interface

Abstract— A new conceptual ultra‐compact LCD panel, which features a simple interface and lower‐power consumption by using low‐temperature polysilicon thin‐film transistor (LTPS‐TFT) technology has been developed. This panel is capable of switching operation modes based on an input command, and all the data are directly communicated with the circuit inside the panel through a Serial Peripheral Interface (SPI) protocol. The integration of the serial‐data‐receiver function on glass substrate has enabled the achievement of a significant reduction in the number of interface pins. Moreover, a low power consumption of 15 μW for a 2.26‐in. reflective LCD panel in combination with the technique of integrating a memory circuit in each pixel has been achieved.     

A digitally driven pixel circuit with current compensation for AMOLED microdisplays

A novel digitally driven pixel circuit for active‐matrix organic light‐emitting diode (OLED) microdisplays is proposed and evaluated. This circuit supports both pulse width modulation and pulse density modulation digital drive approaches. Only three transistors and one capacitor are required per pixel for the proposed circuit. A current mirror is used to compensate for the pixel current changes that occur because of the degradation of the OLEDs over time. The compensation current depends on the potential of the common cathode, the properties of the current mirror, and the Width/Length (W/L) ratio of the drive transistor. The proposed digital pixel circuit also has advantages in circuit layout compared with analog pixel circuits.     

Novel 120‐Hz TFT‐LCD motion‐blur‐reduction technology with integrated motion‐compensated frame‐interpolation timing controller

Abstract— Samsung has developed a high‐resolution full‐HD (1920 × 1080) 120‐Hz LCD‐TV panel using a novel pixel structure and a motion‐compensated frame‐interpolation (McFi) single‐chip solution. Our latest work includes launch of a 70‐in. full‐HD panel, the world's largest LCD TV in mass production, with a 120‐Hz frame rate. A serious problem involving the charging time margin has been completely overcome through the use of a new alternative 1G‐2D pixel structure and a new driving scheme. Compared with conventional dot‐inversion driving, our new dot‐inversion method, which is a spatial averaging technique, can save power because the column drivers are operated using vertical inversion driving. In addition, McFi, which merges individual ME/MC and timing‐controller (TCON) ICs and memories, has been developed and applied in a mass‐production product for the first time ever. The McFi solution provides 120‐Hz driving with the lowest possible system cost. Motion‐picture response time (MPRT) has been reduced from 1 5 to 8 msec. Moreover, for the case of 24‐Hz film source mode, motion judder has been completely eliminated. As a result, a lineup consisting of 40‐, 46‐, 52‐, 70‐, and 82‐in. LCD‐TV panels with high quality and manufacturability has been made possible.     

Low‐power‐consumption TFT‐LCD with dynamic memory embedded in the pixels

A low‐power‐consumption thin‐film‐transistor liquid‐crystal display (TFT‐LCD) with dynamic memory cells embedded in each pixel using low‐temperature poly‐Si technology has been developed. By holding data in the memory, the operating rate of the data driver can be dramatically reduced to 4 Hz. Eight levels of gray scale with low power consumption can be achieved by using the area‐ratio gray‐scale method. This TFT‐LCD can be used for displaying fine still images, with low power consumption.     

Electrical models of TFT‐LCD panels for circuit simulations

Abstract— As thin‐film‐transistor liquid‐crystal‐display (TFT‐LCD) panels become larger and provide higher resolution, the propagation delay of the row and column lines, the voltage modulation of Vcom, and the response time of the liquid crystal affect the display images now more than in the past. It is more important to understand the electrical characteristics of TFT‐LCD panels these days. There are several commercial products that simulate the electrical and optical performance of TFT‐LCDs. Most of the simulators are made for panel designers. However, this research is for circuit, system, and panel designers. It is made in a SPICE and Cadence environment as a commercial circuit‐design tool. For circuit and system designers, it will help to design the circuit around a new driving method. Also, it can be easily modified for every situation. It also gives panel designers design concepts. This paper describes the electrical model of a 15‐in. XGA (1024 × 768) TFT‐LCD panel. The parasitic resistance and capacitance of the panel are obtained by 3‐D simulation of a subpixel. The accuracy of these data is verified by the measured values of an actual panel. The developed panel simulation platform, the equivalent circuit of a 1 5‐in. XGA panel, is simulated by HSPICE. The results of simulation are compared with those of experiment, according to changing the width of the OE signal. The proposed simulation platform for modeling TFT‐LCD panels can be especially applied to large‐sized LCD TVs. It can help panel and circuit designers to verify their ideas without making actual panels and circuits.     

Fast voltage‐driving scheme for AMOLED displays based on internal feedback

Abstract— A new driving scheme for active‐matrix organic light‐emitting diodes (AMOLED) displays based on voltage programming is proposed. While conventional voltage drivers have a trade‐off between speed and accuracy, the new scheme is inherently fast and accurate. Based on the new driving scheme, a fast pixel circuit is designed using amorphous‐silicon (a‐Si) thin‐film transistors (TFTs). As the simulation results indicate, this pixel circuit can compensate the threshold‐voltage shift (VT shift) of the driver transistors. This pixel can be programmed in just 10 μsec, and it can compensate the threshold‐voltage shifts over 5 V with an error rate of less than 5% for a 1 ‐μA pixel current.     

A high image quality organic light‐emitting diode display with motion blur reduction for ultrahigh resolution and premium TVs

In this paper, we present a high image quality organic light‐emitting diode (OLED) display with motion blur reduction technology. Our latest work includes driving method that reduces motion blur using an adaptive black data insertion, brightness compensation technology, the simple structure pixel with low capacitance coupling for horizontal noise, and the multifunction integrated gate driver. The moving picture response time (MPRT) value of the OLED display panel with a fast response time was significantly affected by the frame frequency and the compensation driving method. The MPRT value of the large‐size OLED display panels was significantly decreased by using the integrated gate driver circuit with an MPRT reduction method. The decrease in the MPRT value originated from the turning of the emitting pixels off in advance resulting from providing black data. The integrated gate drivers were designed to achieve the normal display, the black data insertion, and the compensation mode. The MPRT value of the 65‐in. ultrahigh‐definition (UHD) OLED panels was decreased to 3.4 ms by using an integrated gate driver circuit. The motion blur of large‐size OLED display panels was significantly reduced due to a decrease in the MPRT value.     

Line‐time optimization technology for ultra‐large and high‐resolution liquid crystal displays

This paper proposes a line‐time optimization (LTO) technology for ultra‐large and high‐resolution liquid crystal display (LCD) televisions. Line‐time optimization enables a single‐bank data driver configuration without severe image degradation. When the proposed method is applied to an ultra‐high‐definition (UHD) LCD with a single‐bank data driver scheme, the LCD performance comparable to that of a dual‐bank data driver method can be obtained. The implementation of the proposed method helps in achieving desirable goals such as a reduction in the number of drivers and realization of a much more flexible design of UHD LCDs.     

LTPS circuit integration for system‐on‐glass LCDs

Abstract— A 3.5‐in. QVGA‐formatted driving‐circuit fully integrated LCD has been developed using low‐temperature poly‐Si (LTPS) technology. This display module, in which no external ICs are required, integrates all the driving circuits for a six‐bit RGB digital interface with an LTPS device called a “FASt LDD TFT” and achieves a high‐quality image, narrow frame width, and low power consumption. The LTPS process, device, and circuit technologies developed for system‐on‐glass LCD discussed. The development phase of LTPS circuit integration for system‐on‐glass LCDs is also reviewed.     

Reducing the memory of compression Feedforward driving for a new LCD controller

Abstract— The authors have studied a method of reducing the frame memory for signal processing used to improve the response time of liquid crystals. Compared with cases in which quantization is used, the compression Feedforward driving method, which reduces frame memory by applying an image‐compression technique, can effectively reduce the frame‐memory size. The study revealed that errors decrease by 6–10 dB or so if the image data was reduced to 1/3 by means of image compression. Based on the results of the study, the authors have developed a second‐generation LCD controller. With just one SDRAM unit, this LCD controller can produce almost ideal processing effects.     

A small‐area and low‐power data driver IC using two‐stage DAC with a capacitor array for active matrix flat‐panel displays

A small‐area and low‐power data driver integrated circuit (IC) using a two‐stage digital‐to‐analog converter (DAC) with a capacitor array is proposed for active matrix flat‐panel displays. The proposed data driver IC employs a capacitor array in the two‐stage DAC so as to reduce the DAC area and eliminate the need for a resistor string, which has high‐power consumption. To verify the proposed two‐stage DAC, a 20‐channel data driver IC with the proposed 10‐bit two‐stage DAC was fabricated using a 0.18‐μm complementary metal–oxide–semiconductor process with 1.8 and 6 V complementary metal–oxide–semiconductor devices. The proposed 10‐bit two‐stage DAC occupies only 43.8% of the area of a conventional 10‐bit two‐stage DAC. The measurement results show that the differential nonlinearity and integral nonlinearity are +0.58/?0.52 least significant bit and +0.62/?0.59 least significant bit, respectively. The measured interchannel deviation of the voltage outputs is 8.8 mV, and the measured power consumption of the 20‐channel data driver IC is reduced to 7.1 mW, which is less than half of the power consumed by the conventional one.     

Locally pixel‐compensated backlight dimming on LED‐backlit LCD TV

Abstract— The pixel brightness of an LCD panel perceived by a user is the product of the backlight brightness and the panel transmittance. In conventional LCD panels, the backlight brightness is constant and always at peak luminance. This design suffers from light leakage and power waste problems at dark scenes. This paper presents a new LCD system, which uses locally pixel‐compensated backlight dimming (PCBD). The proposed method combines backlight control and pixel processing for reducing light leakage and power consumption while keeping the image at the original brightness. Backlight luminance is dimmed locally in the dark‐image region, and pixel values are compensated synchronously according to the luminance profile of dimmed backlight. By reducing the light leakage, a static contrast of over 20,000:1 has been achieved on a large‐sized LCD panel with the proposed PCBD method. No obvious artifacts have been noticed as well. The power consumption of the panel can also be greatly reduced, depending on various video content. The PCBD method could be widely used for developing state‐of‐the‐art LCD panels with LED backlights.     

Multioutputs single‐stage gate driver on array with wide temperature operable thin‐film‐transistor liquid‐crystal display for high resolution application

A hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability, 10.7‐inch automotive display has been proposed. The driver circuit is composed of one SR controller, eight driving TFTs (one stage to eight outputs) with bridging TFTs. The SR controller, which starts up the driving TFTs, could also prevent the noise of gate line for nonworking period. The bridging TFT, using width decreasing which connects between the SR controller and the driving TFT, could produce the floating state which is beneficial to couple the gate voltage, improves the driving ability of output, and reaches consistent rising time in high temperature and low temperature environment. Moreover, 8‐phase clocks with 75% overlapping and dual‐side driving scheme are also used in the circuit design to ensure enough charging time and reduce the loading of each gate line. According to lifetime test results, the proposed gate driver of 720 stages pass the extreme temperature range test (90°C and ?40°C) for simulation, and operates stably over 800 hours at 90°C for measurement. Besides, this design is successfully demonstrated in a 10.7‐inch full HD (1080 × RGB×1920) TFT‐liquid‐crystal display (LCD) panel.     

FPC‐free LCD panel with capacitive coupling for transmission of signals and power

Abstract— A flexible‐printed‐cable (FPC) free liquid‐crystal‐display (LCD) panel by using a capacitive‐coupling technique has been developed. A QQVGAeight‐color image was successfully displayed for the first time without attaching any signal or power cables to the panel. The receiving circuitry and capacitive‐coupling electrodes were integrated on the LCD panel using a low‐temperature polysilicon (LTPS) fabrication process. In the proposed digital coding method, the receiving circuit converts derivative waveform signals via the capacitive coupling to conventional logic‐level signals. The maximum data rate of 2.4‐Mbps × 3ch (RGB) was achieved. In addition, LTPS low‐capacitance diode bridge and regulator enabled us to obtain stable DC power of 2.4 mW on the panel from the AC‐power signal. This study is the first step towards integrating the wireless‐communication function on the display panel to achieve a high‐value‐added flat‐panel display (FPD).