A dual-axis MEMS capacitive inertial sensor with high-density proof mass

This paper reports a novel dual-axis microelectromechanical systems (MEMS) capacitive inertial sensor that utilizes multi-layered electroplated gold. All the MEMS structures are made by gold electroplating that is used as a post complementary metal-oxide semiconductor (CMOS) process. Due to the high density of gold, the Brownian noise on the proof mass becomes lower than those made of other materials such as silicon in the same size. The single gold proof mass works as a dual-axis sensing electrode by utilizing both out-of-plane (Z axis) and in-plane (X axis) motions; the proof mass has been designed to be 660 μm × 660 μm in area with the thickness of 12 μm, and the actual Brownian noise in the proof mass has been measured to be 1.2 \({\upmu}{\text{G/}}\sqrt {\text{Hz}}\) (in Z axis) and 0.29 \({\upmu}{\text{G/}}\sqrt {\text{Hz}}\) (in X axis) at room temperature, where 1 G = 9.8 m/s². The miniaturized dual-axis MEMS accelerometer can be implemented in integrated CMOS-MEMS accelerometers to detect a broad range of acceleration with sub-1G resolution on a single sensor chip.     

Free-Form Simulation of Sequential Etching and Surface Characterization for 3-D MEMS Fabrication

A new diffusion-based simulation model of isotropic wet etching and free-form surface characterization method for 3-D free-form microelectromechanical systems (MEMS) fabrication is presented in this paper. To simulate the etching process, a diffusion-based model solved by the finite-element method (FEM) has been developed, allowing extraction of more accurate etch-front data at discrete time steps. In the developed method, free-form MEMS objects are modeled as B-spline functions with material concentration. Finite elements are generated by discretization in the parametric domain of the free-form object and mapping back to the Euclidean space. Points on the etch front are extracted using a Z-map method. The extracted point data are characterized to obtain a B-spline representation of the etch-front surface. Examples from the isotropic etching simulation of 2-D and 3-D objects with both regular and free-form geometry are presented. The developed method allows the simulation of 3-D objects with free-form input and free-form mask opening and facilitates the simulation of sequential etching of free-form objects with irregular mask openings. This paper also discusses applications of the developed method in MEMS process planning that can be realized by taking advantage of the better control of geometry that it provides in MEMS fabrication.     

微机电系统的封装技术

MEMS封装是在微电子封装技术基础上发展起来的一项关键的MEMS技术。介绍了MEMS封装技术的功能、特点与分类。在此基础上,重点介绍了键合技术、上下球栅阵列技术、倒装芯片技术、多芯片技术以及3-D技术等几种重要的MEMS封装技术。最后,进一步探讨了MEMS封装的发展趋势及研究方向。     

Advanced MEMS-based technologies and displays

MEMS (microelectromechanical systems) are used in many fields including display applications, which are extensively studied both in academia and industry. For practical devices, numbers of advanced technologies have been developed based on MEMS concept. For display technologies, projection displays, reflective displays, transmissive displays and other display modes have been achieved by different MEMS modes. In this review, the current MEMS-based display technologies are introduced and discussed including digital micromirror device (DMD), laser scanning display (LSD), interferometric modulator display (IMOD), digital micro-shutter (DMS), time multiplexed optical shutter (TMOS), grating light valve (GLV) and others. The typical structure and fundamental of each display mode are interpreted.     

A Self-Aligned Fabrication Process for Capacitive Fixed-Fixed Beam RF MEMS Components

A self-aligned fabrication process for capacitive fixed-fixed beam RF microelectromechanical system (MEMS) components is disclosed. It enables the scaling of the critical dimensions and reduces the number of processing steps by 40% compared with a conventional RF MEMS fabrication process. RF MEMS varactors with beam lengths of 30 are demonstrated by using the self-aligned fabrication process, and the performance of a four-by-four RF MEMS varactor bank is discussed as well. At 20 GHz, the measured capacitance values range between 180.5 and 199.2 fF. The measured capacitance ratio is 1.15 when a driving voltage of 35 V is applied, and the measured loaded -factor ranges between 14.5 and 10.8. The measured cold-switched power handling is 200 mW.     

Application of the Generalized Differential Quadrature Method to the Study of Pull-In Phenomena of MEMS Switches

This paper reports on the pull-in behavior of nonlinear microelectromechanical coupled systems. The generalized differential quadrature method has been used as a high-order approximation to discretize the governing nonlinear integro-differential equation, yielding more accurate results with a considerably smaller number of grid points. Various electrostatically actuated microstructures such as cantilever beam-type and fixed-fixed beam-type microelectromechanical systems (MEMS) switches are studied. The proposed models capture the following effects: (1) the intrinsic residual stress from fabrication processes; (2) the fringing effects of the electrical field; and (3) the nonlinear stiffening or axial stress due to beam stretching. The effects of important parameters on the mechanical performance have been studied in detail. These results are expected to be useful in the optimum design of MEMS switches or other actuators. Further, the results obtained are summarized and compared with other existing empirical and analytical models.     

MEMS optical switches and interconnects

This paper reviews several optical connecting devices that are based on microelectromechanical systems (MEMS) components. In this paper, we divide optical connecting devices into two categories. The first category includes MEMS-based optical switches developed for optical fiber communication, which perform optical switching, wavelength division multiplexing (WDM) routing, and/or optical cross connection. The other category consists of MEMS-based optical interconnects that have been constructed primarily for use in rack-to-rack, board-to-board, chip-to-chip, card-to-card and/or intra-chip interface connections. Working principles of these MEMS optical connecting devices will also be discussed in this paper.     

Design and process considerations for fabricating RF MEMS switches on printed circuit boards

Design considerations and process development for fabricating radio frequency microelectromechanical systems (RF MEMS) switches on microwave laminate printed circuit boards (PCBs) are presented in details in this work. Two key processes, high-density inductively coupled plasma chemical vapor deposition (HDICP CVD) for low-temperature silicon nitride deposition, and compressive molding planarization (COMP) have been developed for fabricating RF MEMS switches on PCB. The effects of process conditions of HDICP CVD on low-temperature nitride film are fully characterized for its use in RF MEMS switches on PCB. Not only can COMP planarize the surface of the photoresist for lithographic patterning over topologically complex surfaces, but also simultaneously create a membrane relief pattern on the surface of a MEMS structure. Several membrane-type capacitive switches have been fabricated showing excellent RF performance and dynamic responses similar to those on semiconductor substrates. This technology promises the potential of enabling further monolithic integration of switches with other RF components, such as antennas, microwave monolithic integrated circuits (MMICs), phase shifters, tunable filters, and transmission lines on the same PCBs reducing the losses due to impedance mismatching from components/system assembly and simplifies the design of the whole RF system. [1416].     

Redundancy RF MEMS Multiport Switches and Switch Matrices

The objective of this paper is to investigate novel configurations of planar multiport radio-frequency (RF) microelectromechanical systems (MEMS) C-type and R-type switches and redundancy switch matrices for satellite communications. An in-house monolithic fabrication process dedicated to electrostatic multiport RF MEMS switches and switch matrices is developed and fine tuned. The proposed C-type switch is a four-port device with two operational states. This switch exhibits an insertion loss of less than 0.3 dB and isolation of about 25 dB at satellite C-band frequency range. The novel R-type switch is also a four-port device with an additional operational state. The measured results show an insertion loss of better than 0.4 dB and an isolation of better than 25 dB at C-band. This is the first time that an R-type RF MEMS switch is ever reported. Several of these switches are integrated in the form of redundancy switch matrices, and two novel monolithic five to seven redundancy switch matrices are developed, fabricated, and tested. It is shown that the additional operating state of the R-type switch not only decreases the number of elements by 50% but also reduces the size drastically     

Design and analysis of perforated MEMS resonator

Microsystem Technologies - In this paper, we have designed an optimal design of microelectromechanical (MEMS) resonator. The paper explains the idea of suitable design, modeling and optimization of...     

日本微电子机械系统研究现状

介绍了日本微电子机械系统的发展现状。分析了该技术发展的背景、基础技术、应用领域、面临的问题以及今后发展的趋势     

M-TEST: A test chip for MEMS material property measurement usingelectrostatically actuated test structures

A set of electrostatically actuated microelectromechanical test structures is presented that meets the emerging need for microelectromechanical systems (MEMS) process monitoring and material property measurement at the wafer level during both process development and manufacturing. When implemented as a test chip or drop-in pattern for MEMS processes, M-Test becomes analogous to the electrical MOSFET test structures (often called E-Test) used for extraction of MOS device parameters. The principle of M-Test is the electrostatic pull-in of three sets of test structures [cantilever beams (CB's), fixed-fixed beams (FB's), and clamped circular diaphragms (CD's)] followed by the extraction of two intermediate quantities (the S and B parameters) that depend on the product of material properties and test structure geometry. The S and B parameters give a direct measure of the process uniformity across an individual wafer and process repeatability between wafers and lots. The extraction of material properties (e.g., Young's modulus, plate modulus, and residual stress) from these S and B parameters is then accomplished using geometric metrology data. Experimental demonstration of M-Test is presented using results from MIT's dielectrically isolated wafer-bonded silicon process. This yielded silicon plate modulus results which agreed with literature values to within ±4%. Guidelines for adapting the method to other MEMS process technologies are presented     

Super multi-view and holographic displays using MEMS devices

Holographic displays and super multi-view (SMV) displays have been developed to solve the accommodation–vergence conflict that is responsible for visual fatigue caused by the 3D images that are generated by conventional three-dimensional (3D) displays upon which the eye cannot focus. However, holographic and SMV displays provide 3D images upon which the eye can readily focus so that the accommodation–vergence conflict does not occur. Because these two display techniques require the generation of a very large amount of image data, the high data bandwidth of microelectromechanical (MEMS) devices is effectively utilized. The present article describes the holographic display system that employs a MEMS spatial light modulator (SLM), which increases the screen size and viewing zone angle. Two SMV displays are also described, where one employs MEMS SLMs and the other an array of MEMS projectors. The resolution and the number of viewpoints of the SMV displays have increased. Moreover, the technique using a MEMS SLM to eliminate speckles from holographic reconstructed images is also described.     

微机电系统的现状与展望

在过去20多年中,微机电系统(MEMS)已经从早期的技术开发、设备探索和实验室研究的阶段发展到当前的实际应用阶段,并逐渐扩展到许多新的研究和探索领域,MEMS已经成为21世纪最具潜力的研究领域之一。对MEMS进行了简要的介绍,包括MEMS应用,MEMS的市场情况,以及3种主要的MEMS微制造技术,即体微制造、面微制造和LIGA技术。最后,提出了MEMS将来研究和发展的趋势。     

A Six-Axis MEMS Force–Torque Sensor With Micro-Newton and Nano-Newtonmeter Resolution

This paper describes the design of a six-axis microelectromechanical systems (MEMS) force-torque sensor. A movable body is suspended by flexures that allow deflections and rotations along the x-, y-, and z-axes. The orientation of this movable body is sensed by seven capacitors. Transverse sensing is used for all capacitors, resulting in a high sensitivity. A batch fabrication process is described as capable of fabricating these multiaxis sensors with a high yield. The force sensor is experimentally investigated, and a multiaxis calibration method is described. Measurements show that the resolution is on the order of a micro-Newton and nano-Newtonmeter. This is the first six-axis MEMS force sensor that has been successfully developed.     

Wafer bonding with nano-imprint resists as sacrificial adhesive for fabrication of silicon-on-integrated-circuit (SOIC) wafers in 3D integration of MEMS and ICs

In this paper, we present the use of thermosetting nano-imprint resists in adhesive wafer bonding. The presented wafer bonding process is suitable for heterogeneous three-dimensional (3D) integration of microelectromechanical systems (MEMS) and integrated circuits (ICs). Detailed adhesive bonding process parameters are presented to achieve void-free, well-defined and uniform wafer bonding interfaces. Experiments have been performed to optimize the thickness control and uniformity of the nano-imprint resist layer in between the bonded wafers. In contrast to established polymer adhesives such as, e.g., BCB, nano-imprint resists as adhesives for wafer-to-wafer bonding are specifically suitable if the adhesive is intended as sacrificial material. This is often the case, e.g., in fabrication of silicon-on-integrated-circuit (SOIC) wafers for 3D integration of MEMS membrane structures on top of IC wafers. Such IC integrated MEMS includes, e.g., micro-mirror arrays, infrared bolometer arrays, resonators, capacitive inertial sensors, pressure sensors and microphones.     

Fabrication and dynamic analysis of the electrostatically actuated MEMS variable capacitor

Future microwave networks require miniature high-performance tunable elements such as switches, inductors, and capacitors. In this paper, high performance variable capacitor was fabricated by simple microelectromechanical systems (MEMS) technology. The capacitance and quality (Q) factor at 1 GHz are 0.792 pF and 51.6. The pull-in voltage is 13.5 V and the tuning ratio of the capacitor is more than 1.31:1. A reduced-order model for the dynamic characteristics of the capacitor is established based on the equilibrium among the plate flexibility.     

Mechanical Coupling in Single Crystal Silicon for MEMS Design

There is an active interest in the development of microelectromechanical systems (MEMS) devices using single crystal silicon. Single crystal silicon is known to display anisotropic mechanical properties and several papers have been presented that deal explicitly with various aspects arising from the anisotropy. In this paper we develop comprehensive expressions and graphs to allow for the easy determination of anisotropic coupling effects in beam and plate structures with a particular emphasis upon     

An extraction-based verification methodology for MEMS

Micromachining techniques are being increasingly used to develop miniaturized sensor and actuator systems. These system designs tend to be captured as layout, requiring extraction of the equivalent microelectromechanical circuit as a necessary step for design verification. This paper presents an extraction methodology to (re-)construct a circuit schematic representation from the layout, enabling the designer to use microelectromechanical circuit simulators to verify the functional behavior of the layout. This methodology uses a canonical representation of the given layout on which feature-based and graph-based recognition algorithms are applied to generate the equivalent extracted schematic. Extraction can be performed to either the atomic level or the functional level representation of the reconstructed circuit. The choice of level in hierarchy is governed by the trade off between simulation time and simulation accuracy of the extracted circuit. The combination of the MEMS layout extraction and lumped-parameter circuit simulation provides MEMS designers with VLSI-like tools enabling faster design cycles, and improved design productivity