小型化高平坦度窄步进梳状谱源研究

设计实现了一种高平坦度、窄步进、低成本的高效梳状谱频率源。该频率源采用高速数字计数器产生脉冲信号的技术,可实现从10 kHz~300 MHz的频率范围梳状谱,该梳状谱源弥补了传统模拟阶跃二极管低频段效率低、平坦度差的不足。如特征指标步进500 kHz,20 MHz带宽内平坦度为1.8 dB。     

0．2～18GHz梳状谱信号发生器研制

梳状谱信号发生器在电子设备和雷达系统中有着广泛的使用,文中通过对实际产生梳状谱信号电路的分析,给出了具体设计宽带、窄脉冲信号发生电路的参数,设计研制出输出0.2~18 GHz的梳状谱信号发生器,在较低的成本下完全可以替代国外同类产品。     

基于FPGA的锯齿波调频梳状信号发生器的设计与实现

随着通信技术的发展,跳频信号在通信系统中有着越来越广泛的应用。梳状谱信号对跳频通信系统的影响十分显著,本文根据梳状谱信号产生机理,在理论分析与Matlab仿真基础上,基于FPGA平台设计与实现了锯齿波调频梳状谱信号发生器。     

脉冲雷达梳状回波现象机理分析

基于单脉冲雷达在火箭发射初始段时经常接收到梳状回波信号,通过雷达距离显示器图像数据,从信号出现时间、功率强度、脉冲间距和脉冲数量等四方面对多次任务中的梳状回波特性进行分析统计。结果表明,该梳状回波的脉冲间距变化规律在多次任务中表现相同,具有“间距相等且随时间递增”的鲜明特点。同时,排查了可能产生梳状回波的三种模式,结合梳状回波脉冲间距反映出的地面反射体距离和散射截面积仿真计算结果,指出发射工位形成的角反射器效应是引发箭载应答机被连锁触发产生梳状回波的主要原因。     

0.1～5GHz梳状谱发生器的设计与实现

梳状谱信号发生器在捷变频雷达、频标发生器等要求激励源同时输出数十个高纯频点中有着普遍的应用,同时在仪器设备中常常是扩展频带的关键器件。阶跃恢复二极管常用于梳状谱发生器及单阶高次的倍频器的设计。这里利用阶跃恢复二极管的强非线性特性,设计一个0.1到5GHz梳状谱发生器,输入信号为100MHz。首先通过理论计算和ADS辅助仿真获得初值,然后通过在真实系统上大量的实验获得最终结果。     

基于单个电吸收调制器产生超平坦双光梳

为产生频率间隔相同而又平坦的光频梳,基于单个多量子阱电吸收调制器强度调制特性,设计出一种新型超平坦双光梳产生方案。通过在电吸收调制器前置矩形滤波器,精密控制多量子阱电吸收调制器的反向偏置电压与射频驱动信号幅度,滤除频谱的中心谱线后,得到了平坦度为0.01dB的双光梳。利用Optisystem7.0软件进行仿真,其对不同线宽(100kHz、10 MHz和20 MHz)的激光光源均可产生位于中心谱线两侧对称的、带宽均为300 GHz、谱线均为15条、谱线间距均为20GHz以及平坦度可达0.01dB的双光梳。     

基于异步射频信号驱动级联相位调制器产生平坦光学频率梳

基于级联相位调制器(PM),设计并实现了一种梳线数量与梳线间距均可调谐的光学频率梳(OFC)产生方案。采用正弦型射频信号与其倍频信号分别驱动两级PM,并在第二级射频信号加入微小的频率偏移,得到了相位不敏感、平坦度高的OFC。梳线数量与平坦度由两级PM的调制指数调控。当频率偏移为第二级射频信号频率的10-5倍时,OFC的平坦度低于3dB。实验结果表明,产生OFC的梳线数量为7,9,11根,梳线间距分别为5.5GHz和7.5GHz,平坦度不超过2.4dB。     

基于ADS仿真的梳状谱发生器的设计与实现

梳状谱信号发生器在微波频率合成电路中应用广泛。文中利用阶跃恢复二极管的强非线性特点,设计了一种输入频率为100 MHz、输出频率为0.1～4 GHz的梳状谱信号发生器。首先通过理论计算获得初值,再通过ADS进行仿真优化,以及多次调试和实验,使该电路在0.1～4 GHz范围内产生丰富的谐波,并适合于工程应用。     

基于InP HBT工艺的宽带非线性传输线梳谱发生器MMIC设计

基于NEDI0.7μmInP HBT工艺,设计了一种宽带非线性传输线梳谱发生器MMIC,输出频率范围覆盖DC-100GHz,最大倍频次数高达60.梳谱发生器由40级非线性传输线单元级联构成,每个非线性单元由高阻微带线以及基极-集电极短接的晶体管组成.在一定功率的正弦波或方波信号驱动条件下,芯片输出端可以得到系列高次脉冲...     

基于偏振复用技术的光频梳研究

为提高光频梳带宽和谱线平坦度,设计了一种基于偏振复用和电吸收调制(EAM)技术的光频梳产生方 案。通过调整EAM 参数产生除中心载波外的高平坦度光频梳,再结合偏振复用技术优化中心载波峰值功率,使得光频 梳带宽整体提升一倍。文中讨论了相关参数对光频梳平坦度的影响,利用Optisystem 软件搭建了基于该方案的微波频 率可调载波重用全双工光载无线系统(RoF)。研究结果表明,在下行链路中当误码率为10-9 时,传输10 km 与背靠背 传输相比功率代价仅为0.42 dB。     

1.8-THz bandwidth, zero-frequency error, tunable optical combgenerator for DWDM applications

We report on the experimental realization of a simple optical comb generator, based on phase modulation within an amplified fiber loop, which offers exact referencing to an arbitrary supplied reference frequency and tunable comb-line spacing. At a reference wavelength of 1529 nm up to 103 comb lines within a 40-dB power envelope were generated with spacings adjustable from 1 to 25 GHz, limited only by the bandwidth of the phase modulator     

Spectral Line-by-Line Pulse Shaping on an Optical Frequency Comb Generator

We demonstrate optical processing based on spectral line-by-line pulse shaping of a frequency comb generated by an optical frequency comb generator (OFCG). The OFCG is able to generate a smooth, broad, stable, known-phase frequency comb, which is ideal for recently developed spectral line-by-line pulse shaping technology applications. We demonstrate line-by-line pulse shaping on 64 lines at 10-GHz line spacing, generate transform-limited 1.6-ps short pulses at 10 GHz by combining two pulses in each period directly from the OFCG, and show various examples for optical arbitrary waveform generation. Further, we demonstrate that these pulse sources are of sufficient quality to support optical fiber communication applications as confirmed by bit error rate measurements.     

Generation of ultrawideband phase chaos in the decimeter band

The problem of obtaining ultrawideband phase chaos in the decimeter band with the use of a phase-locked loop is considered. The mathematical simulation of a third-order phase-locked loop is performed with account for the real characteristics of the phase detector, the signal frequency divider in the phase-locked loop, and the voltage-controlled oscillator. This simulation allows determination of the parameters of a prototype of a phase-locked loop operating in the chaotic generation mode. Based on the obtained results and available circuit technology, a prototype of a phase-locked loop generating ultrawideband phase-chaotic oscillations with a uniform power spectrum in a frequency range from 700 to 1300 MHz is developed and tested.     

一种超宽带超低相位噪声频率综合器

为了解决直接频率合成方法频带拓展困难和锁相频率合成方法相位噪声附加恶化严重的问题,设计了一种联合直接模拟频率合成和锁相频率合成的混频锁相频率综合器. 该频率综合器采用梳谱发生器激励超低相位噪声的偏移信号后,再将该信号插入锁相环进行环内混频,降低鉴相器的倍频次数进而优化输出信号的相位噪声,同时解决了超宽带混频锁相环的错锁问题. 该文设计的频率覆盖范围为12~24 GHz、步进为100 MHz的超宽带频率综合器实验测试表明:频率综合器在低频段12 GHz处相位噪声优于?116 dBc/Hz@1 kHz,在高频段24 GHz处相位噪声优于?109 dBc/Hz@1 kHz,相位噪声指标与直接模拟频率合成方法相当,均优于传统锁相方法20 dB以上. 本文混合频率合成方法具有超宽带和超低相位噪声的优点,可以用于高性能的电子设备和系统.     

Novel system clock generation from a modulated signal

This paper describes a novel technique to derive a pure-spectral system clock with a common multi-modulus divider from a frequency modulated signal. Therefore, the dividing factor is inverse frequency modulated to compensate the frequency modulation component on the divider input signal. Additionally, $\Upsigma\Updelta$ dithering is applied to the frequency divider. The technique is used for a FM-radio transmitter based on an all-digital phase-locked loop (PLL) to generate a higher-frequency clock for baseband signal processing. It can also be applied to other PLL based transmitters or receivers, especially, if only a slow PLL reference clock is available and a faster system or baseband clock is required. The main factor determining the quality of the generated clock signal is the PLL??s reference quartz oscillator as it determines the accuracy of the PLL??s RF oscillator, which limits then the accuracy of the newly generated clock. In the FM-radio transmitter, a generated ??1?MHz clock signal with 30.58?ppm frequency offset and 515?ps root mean square jitter is generated. The phase noise is determined to ?83.5?dBc/Hz at 10?kHz offset and ?70.5?dBc/Hz at 1?kHz, respectively. The signal can also be used in co-integrated or external circuits.     

A CMOS frequency synthesizer with an injection-locked frequencydivider for a 5-GHz wireless LAN receiver

A fully integrated 5-GHz phase-locked loop (PLL) based frequency synthesizer is designed in a 0.24 μm CMOS technology. The power consumption of the synthesizer is significantly reduced by using a tracking injection-locked frequency divider (ILFD) as the first frequency divider in the PLL feedback loop. On-chip spiral inductors with patterned ground shields are also optimized to reduce the VCO and ILFD power consumption and to maximize the locking range of the ILFD. The synthesizer consumes 25 mW of power of which only 3.8 mW is consumed by the VCO and the ILFD combined. The PLL has a bandwidth of 280 kHz and a phase noise of -101 dBc/Hz at 1 MHz offset frequency. The spurious sidebands at the center of adjacent channels are less than -54 dBc     

基于改进型ADPLL的频合器设计与实现

本文采用VHDL语言完成了基于改进型全数字锁相环(ADPLL)的频率合成器设计与实现。本设计使用自适应数字分频器克服了锁相环同步带的限制。频率合成器的输入信号频率从1Hz到10MHz范围,输出信号相位以输入信号为基准,输出信号频率从1Hz到10MHz由用户设定,频率分辨率为1Hz。输出信号与输入信号的最大相差可控,输出信号频率的最大频差可控。     

一种低相噪宽带频率合成器实现

简述了宽带小步进频率合成器的常规实现方法。着重介绍了一种基于DDS＋PLL结构简洁的宽带小步进频率合成器。DDS在锁相环中用作小数分频器，对合成器的相噪指标进行了深入的分析，并详细阐述了合成器的设计思想和电路实现方法。结合要求给出合成器电路板的合理布局，同时完成了样机设计。测试结果显示，合成器具有大带宽、小步进、低相噪等特点，可应用于小型化的雷达信号模拟器。     

线性调频微波锁相环

本文介绍一种用在X波段、调频脉冲周期为1ms、脉宽为6s、幅度为7V,带宽宽于30MHz的微波固态源锁相环(简称线性调频微波锁相环)。锁相环用来稳定微波固态源振荡器产生的线性调频信号起始点的频率,使该点频率具有和5MHz晶振相同的高稳定度,这种环路与一般锁相环的工作状态不同,它是处在频繁的开关工作状态,这种环路具有最短的时延、最快的捕捉能力、较大的同步范围和良好的环路信噪比,在电路结构上,也作了特别考虑,该环路首次用在遥感系统中并取得了较好的结果,通过实际运用证明,该环路简单、可靠、输出功率大、性能优良。本文将着重介绍这种环路的工作特点和实现该环路所采取的一些特殊方法。