基于石英基片的二毫米频段三倍频器的研制

介绍了一个基于石英基片的二毫米频段三倍频器.采用反向并联变容二极管对结构实现倍频.建立了该二极管管对的等效电路模型并提取了模型参数.设计实现的倍频器输入为K型接头结构,输出为WR-8波导结构.获得的倍频器在输出频率为112.8～118.2 GHz范围内,输出功率大于0 dBm,最大输出功率超过2 dBm,最小倍频损耗为...     

高功率110 GHz平衡式肖特基二极管频率倍频器

高频段的太赫兹信号通常是由多个倍频器级联输出的,因此要求倍频链路的前级必须具备高输出功率的能力。为了提升太赫兹倍频器的功率容量和效率,结合高频特性下肖特基二极管有源区电气模型建模方法,采用高热导率的陶瓷基片,利用对称边界条件,在HFSS和ADS中实现对倍频器电路的分析和优化,研制出了高功率110 GHz平衡式倍频器。最终测试结果表明,驱动功率为28 dBm左右时,该倍频器在102~114.2 GHz的工作带宽内的最高输出功率和效率分别为108 mW和17.6%,为链路后续的二倍频和三倍频提供足够的驱动功率。     

固态太赫兹二倍频器设计

研制了一种平衡结构的太赫兹二倍频器,采用Teratech公司的AS1太赫兹平面肖特基二极管。在对太赫兹肖特基二极管建模和分析的基础上,结合HFSS和ADS软件对太赫兹二倍频器进行仿真。对该倍频器进行加工测试,实测结果表明,在180~192GHz,最大输出功率16.3mW,最大倍频效率为9.1%。     

高效170 GHz平衡式肖特基二极管倍频器

太赫兹源的输出功率是限制太赫兹技术远距离应用的重要参数。为了实现高效的太赫兹倍频器,基于高频特性下肖特基二极管的有源区电气模型建模方法,利用指标参数不同的两种肖特基二极管,研制出了两种170 GHz平衡式倍频器。所采用的肖特基二极管有源结区模型完善地考虑了二极管IV特性,载流子饱和速率限制,直流串联电阻以及趋肤效应等特性。通过对两种倍频器仿真结果进行对比,完备地分析了二极管主要指标参数对倍频器性能的影响。最后测试结果显示两种平衡式170 GHz倍频器在155~178 GHz工作带宽内的最高倍频效率分别大于11%和24%,最高输出功率分别大于15 mW和25 mW。从仿真和测试结果表示,采用的肖特基二极管建模方法和平衡式倍频器结构适用于研制高效的太赫兹倍频器。     

基于肖特基二极管单片集成芯片的340GHz收发链路

针对太赫兹通信及成像等系统对高集成度射频收发链路的需求,在自主研制的太赫兹肖特基二极管的基础上,建立了器件的精确模型,设计并制备出基于二极管的倍频/混频单片集成芯片,解决了传统二极管装配难度大、一致性差的难题,提高了器件的性能。成功研制出170 GHz、340 GHz倍频器和340 GHz混频器模块,并且开发出集成化的340 GHz发射与接收链路。发射端一体化模块实现了342 GHz功率为22 mW的输出,接收端一体化模块实现了330～350 GHz单边带变频损耗在10 dB上下。该模块的开发为未来太赫兹通信及成像技术的应用奠定基础。     

335 GHz非平衡式肖特基二极管三倍频器

基于混合集成的方式,采用对称锥形渐变线匹配结构设计了335 GHz非平衡式三倍频器。在保证单模传输的条件下,该匹配结构不仅能够固定二极管位置,而且可以增大匹配效果,解决了高频段倍频器3 dB带宽较窄的问题。实测结果表明,该倍频器在330~356 GHz频率范围内输出功率均大于5 mW。驱动功率为220 mW时,有最高输出功率11.2 mW,由它作为核心器件组成的固态太赫兹本振源,能够驱动超外差接收机中670 GHz二次谐波混频器。     

340 GHz GaN大功率固态倍频链

随着太赫兹技术的应用和发展,对大功率太赫兹固态源的需求愈加迫切。文中基于GaN肖特基二极管(SBD)工艺设计并制造了具有高功率输出的170 GHz和340 GHz太赫兹倍频器,实现了340 GHz大功率太赫兹固态倍频链。采用多管芯GaN SBD提高器件功率承载能力,综合开展电路优化设计提升倍频性能,通过仿真研究和实验测试,验证了倍频器设计的有效性和先进性。170 GHz倍频器的实测峰值输出功率达到580 mW,倍频效率为14.5%。340 GHz倍频器的实测峰值输出功率为66 mW,倍频效率为12.5%。该太赫兹固态倍频链性能优良,在太赫兹系统中具有重要的应用价值。     

基于肖特基二极管的太赫兹二倍频器设计

固态倍频器是太赫兹源应用中的关键器件,如何利用非线性器件提高太赫兹倍频器件的效率是设计太赫兹固态电路的关键。本文介绍了利用肖特基二极管非线性特性设计固态太赫兹二倍频器的2种方法,即采用直接阻抗匹配和传输模式匹配设计了2种不同拓扑结构的170 GHz二倍频器,针对设计的结构模型,分别进行三维有限元电磁仿真和非线性谐波平衡仿真。仿真结果表明,在17 dBm输入功率的驱动下,倍频器在160 GHz~180 GHz输出频率范围内,倍频效率在15%左右,输出功率大于7 mW。最后对2种方法设计的倍频器结构进行了简单对比和分析,为今后太赫兹倍频研究和设计提供仿真方法。     

260 GHz GaN高功率三倍频器设计

基于GaN太赫兹二极管芯片,采用非平衡式电路结构,设计了一款260 GHz三倍频器。采用GaN肖特基二极管芯片提高电路的耐受功率和输出功率;采用“减高+减宽”的输出波导结构抑制二次谐波;采用高低阻抗带线结构设计了倍频器的输入滤波器和输出滤波器。测试结果显示,该三倍频器在261 GHz峰值频率下,实现最大输出功率为69.1 mW,转换效率为3.3%,同时具有较好的谐波抑制特性。     

340 GHz基于肖特基二极管未匹配电路倍频源

太赫兹技术是一个新兴的交叉研究领域。在过去20 年,太赫兹技术有了巨大的发展。倍频器是太赫兹差分接收机重要技术,主要运用在天文、大气和行星科学射频前端。太赫兹空白的存在主要因素是缺少高效太赫兹源和探测器。通过倍频器技术和放大技术,可以得到高稳定低相噪的倍频源。340 GHz 是太赫兹大气传输窗口之一,所以340 GHz 倍频源能够运用在各种通信成像系统中。肖特基二极管倍频源可以工作在常温和低温下。倍频器是倍频链路最关键的部分。通过理论分析和3D 电磁仿真设计了一个340 GHz 倍频器。实验得到最大输出功率为4.8 dBm,最大效率为3%,在331~354.5 GHz输出功率大于0 dBm。实验结果证明电路仿真和建模的可行性。     

Design of a W-band Frequency Tripler for Broadband Operation Based on a Modified Equivalent Circuit Model of GaAs Schottky Varistor Diode

This paper presents the design and experimental results of a W-band frequency tripler with commercially available planar Schottky varistor diodes DBES105a fabricated by UMS, Inc. The frequency tripler features the characteristics of tunerless, passive, low conversion loss, broadband and compact. Considering actual circuit structure, especially the effect of ambient channel around the diode at millimeter wavelength, a modified equivalent circuit model for the Schottky diode is developed. The accuracy of the magnitude and phase of S21 of the proposed equivalent circuit model is improved by this modification. Input and output embedding circuits are designed and optimized according to the corresponding embedding impedances of the modified circuit model of the diode. The circuit of the frequency tripler is fabricated on RT/Rogers 5880 substrate with thickness of 0.127 mm. Measured conversion loss of the frequency tripler is 14.5 dB with variation of ±1 dB across the 75?~?103 GHz band and 15.5?~?19 dB over the frequency range of 103?~?110 GHz when driven with an input power of 18 dBm. A recorded maximum output power of 6.8 dBm is achieved at 94 GHz at room temperature. The minimum harmonics suppression is greater than 12dBc over 75?~?110 GHz band.     

330GHz砷化镓单片集成分谐波混频器

在太赫兹频段,二极管尺寸与波长相比已不能忽略,二极管的封装会引入很大的寄生参量,因此需建立二极管三维模型提取寄生参数.同时人工装配难度增大,会增加电路不确定性.采用12μm砷化镓单片集成悬置微带线结构,基于电子科技大学与中国电子科技集团第十三研究所自主联合设计的肖特基二极管研制330 GHz砷化镓单片集成分谐波混频器.实测结果显示在5 mW本振功率的驱动下,在328 GHz可得到最小变频损耗10.4 dB,在320~340 GHz范围内,单边带变频损耗小于14.7 dB.     

基于肖特基二极管的670 GHz四次谐波混频器设计

常温固态太赫兹谐波混频器是太赫兹系统应用中的关键器件。介绍了一款基于肖特基二极管的670 GHz四次谐波混频器的仿真与设计。在高频结构仿真软件(HFSS)中对准垂直结构肖特基势垒变阻二极管进行三维结构建模,采用基于谐波平衡算法的整体综合仿真方法对混频器进行仿真和优化。结果表明：在功率为10 mW的167 GHz本振信号驱动下,混频器单边带变频损耗在637~697 GHz射频频率范围内小于13.8 dB,3 dB变频损耗带宽为60 GHz;最优单边带变频损耗在679 GHz为10.6 dB。     

5 THz混频二极管等效电路模型研究

采用电磁场和电路联合仿真,基于直流测试和三维电磁建模仿真技术,建立了截止频率5 THz的混频肖特基二极管的等效电路模型。重点研究了二极管的非线性结模型和外围结构三维电磁全波仿真模型,构建了考虑实际电路形式的四端口三维电磁全波仿真模型。该等效电路模型可用于太赫兹低频段混频模块设计,该模型的建立方法也为更高频段模型的建立提供了一种参考。基于该模型设计了一款220 GHz分谐波混频器,在192~230 GHz宽带范围内,双边带变频损耗小于10 dB,测试结果与仿真结果较为一致。     

110GHz 阻性平衡三倍频器设计

本文介绍了一种基于阻性肖特基二极管芯片UMS DBES105a 的110GHz 三倍频器,通过两个芯片反向并联形成 了平衡结构,同时提高了倍频器的功率承受能力。电路设计中使用二极管三维电磁模型,匹配设计时未设计专门的输入 过渡和滤波器,而是直接经行匹配设计,提供了更多的可优化参量,以达到最佳的匹配效果和带宽。经过HFSS 和ADS 联合仿真,在频率为31~44GHz,功率为20dBm 的驱动信号激励下,三倍频器输出频率大于7dBm,最大输出功率为 9.1dBm@105GHz。     

A 12-36GHz PHEMT MMIC balanced frequency tripler

A novel configuration of balanced frequency InGaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) tripler is proposed. A resonant LC filter is used to eliminate the fundamental frequency and a phase delay line is employed to suppress the second harmonic. The separation of the independent phase shifters makes the tripler more compact and flexible. The conversion loss of the tripler operating from 12 to 36GHz is less than 9.4dB at 9-dBm input power. As compared to the third-harmonic frequency, the fundamental frequency is suppressed more than 21.4dB while for the second harmonic is more than 22.3dB at 36GHz.     

GaAs Schottky-barrier-diode frequency multipliers in 300 and 450 GHz bands

A 450 GHz-band tripler delivering an output power of ?11.2 dBm has been developed. A high-efficiency 300 GHz doubler whose conversion loss is 10.7 dB has also been developed. These efficient multiplications have been obtained by the use of GaAs Schottky-barrier diodes and thin-film integrated-circuit techniques.     

Optimization of a 250-GHz Schottky tripler using novel fabricationand design techniques

A technique for optimizing a diode waveguide mount for millimeter- and submillimeter-wave applications has been developed. The structure consists of a planar rectangular radiator for which an accurate derivation of impedance is available. The planar radiating probe incorporates the diode contacting tip, is fabricated integrally with the microstrip filter, and is used in a 230-290-GHz frequency tripler. Modification of the tripler using the described technique resulted in an improvement of ≈6 dB in available output power, compared to the authors' previous results for this device. Device output power exceeds 8.5 mW at 245 GHz for an input power of 132 mW. The best flange-to-flange efficiency (in excess of 11%) was achieved at 3.3-mW output power. This technique was then applied to a waveguide mount, incorporating two diodes contacted in parallel, so that greater input power could be handled. This resulted in a tripler with a maximum output power of 15 mW at 270 GHz for an input of 280 mW     

A compact 220 GHz heterodyne receiver module with planar Schottky diodes

This letter presents the development of a compact 220 GHz heterodyne receiver module for radars application in which a novel low pass wide stop band intermediate frequency (IF) filter is integrated. The planar Schottky anti-parallel mixing diode based subharmonic mixer (SHM) is used as the receiver’s first stage. The diode is flip-chip mounted on a 50 μm thick quartz substrate. The accurate modeling of the self and mutual inductance of the diode’s air-bridges are discussed. The measured conversion loss (CL) of the SHM has a minimum value of 6.2 dB at 210.5 GHz, and is lower than 8.4 dB in the frequency range 209.4–219.6 GHz with a 10 mW input power from a local oscillator (LO). The LO chain consists of a 110 GHz passive tripler, two Ka-band amplifiers and a Ka-band active tripler. The tested minimum double side band (DSB) noise temperature of the integrated 220 GHz heterodyne receiver is 725 K at 205.2 GHz and lower than 1550 K in the frequency range 199–226 GHz.