Improved circuit-device interface for microwave bipolar power transistors

Several improvements in the mounting and interconnection of bipolar microwave power transistors are described. A plated heat sink applied to thinned transistor pellets decreases the junction temperature for a given dissipation level by approximately a factor of 2. A new, low-parasitic-BeO carrier provides improved power sharing between cells and better high-frequency performance as illustrated by a CW power output of 4 W at 5 GHz with 6-dB gain. Finally, a new etched-line interconnection system is discussed that promises to become a highly reproducible, low-cost replacement for the widely used, but troublesome, multiple wire bonds.     

A simplified approach to noise in microwave transistors

The theory of noise in transistors is applied to microwave transistors at microwave frequencies and an expression for the noise figure is obtained in terms of easily measurable parameters of the transistor. By making some simplifying assumptions, the expression for the noise figure can be reduced to a simple form containing only one parameter, which is useful for engineering applications. The effects of feedback and parasitics introduced by the encapsulation are taken into account. Friiss' formula is modified in order to take the effects of image frequency response on the measurements into account. A method of measuring gain and noise figure simultaneously is also described. Experimental verification of the theory up to 4 GHz is presented.     

Accurate modeling of AlGaAs/GaAs heterostructure bipolar transistors by two-dimensional computer simulation

An accurate modeling of Al0.3Ga0.7As/GaAs heterostructure bipolar transistors (HBT's) has been carried out using a two-dimensional numerical simulator. By comparing an HBT with a GaAs homotransistor, the potential advantages of the HBT, such as a high injection efficiency, a low voltage drop in the base region, and an improvement in high-frequency operation, were well confirmed, not only by the calculated transistor performance but also by the carrier and the potential distributions. It was also demonstrated that the injected electrons spread more and more conspicuously into the extrinsic base region, even for the HBT's with the increase in the collector current. Taking into account the near ballistic transport in the base region, it is possible to realize an abrupt HBT with a maximum cutoff frequency of above 130 GHz and current gains of up to 3200. The HBT was confirmed to be a promising device for the realization of ultrahigh-frequency integrated circuits.     

The future of bipolar power transistors

Silicon based bipolar power transistor (BPT) as a switching power transistor has been replaced by other superior power devices in the past two decades. This transformation is primarily due to the poor performance of the BPT. Among many problems of the BPT, low current gain and small safe operation area (SOA) caused by the second breakdown have been most detrimental to silicon BPT's fate. However, BPT performance based on newer materials, such as wide bandgap semiconductors, has not been previously studied. This paper systematically compares the BPTs based on wide bandgap semiconductor materials. Device figures-of-merit for conduction and switching losses are proposed. Comparison of the BPT based on total power loss is then provided. Based on this work, it is concluded that BPTs based on wide bandgap materials overcome the critical disadvantages of silicon BPTs, and are capable of switching power operation at several hundred kilohertz frequencies at very high current densities and voltages. Therefore, BPTs based on wide bandgap materials are still very attractive switching power devices for the future     

Monte Carlo simulation of bipolar transistors

A new approach is proposed to investigate, the limits of validity of the conventional drift-diffusion equation analysis for modeling bipolar transistor structures containing submicrometer dimensions. The single-particle Monte Carlo method is used for the solution of the Boltzmann equation. An electron velocity overshoot of 1.8 times the static saturation velocity has been found for electrons near the base-collector junction of a silicon device. The effect of this velocity overshoot was calculated to enhance the output collector current and reduce the electron transit time by 5 percent for the device structure considered in this work.     

An application of device modeling to microwave power transistors

A new approach for modelling bipolar transistors in the microwave region under class-C conditions is presented. The following features were combined in the modelling procedure: 1) modelling at microwave frequencies, 2) modelling under large-signal class-C conditions, 3) modelling under mismatched conditions, and 4) correlation between measurements and modelling results. A model has been economically implemented and sufficient accuracy was obtained for: 1) device modelling over a range of operating conditions for which direct experimental characterization is not economically obtainable, 2) optimizing decisions for improved device fabrication, and 3) computer optimization of matching networks for microwave transistors.     

Charge-control modeling of power bipolar junction transistors

This paper describes an improved lumped circuit model of power bipolar junction transistors (BJTs) that can predict the turn-off fall time to a greater accuracy than currently available models. Though the existing models simulate the storage time and delay time to a good accuracy, the fall time performance is neglected. This is because the existing models do not account for the charge decay due to recombination. The model presented in this paper is based on the charge dynamics of the device. The charge dynamics are explained in detail using simulation results from an advanced two-dimensional (2-D) device and circuit simulator. Based on a physical understanding of the charge dynamics, this model is implemented to incorporate the charge decay due to recombination to account for the current tail during turn-off. The lumped-circuit model is implemented in PSPICE using the existing quasisaturation model along with controlled sources. To validate the model, the device was subjected to hard- as well as soft-switching renditions (zero current switching and zero voltage switching). The modeled results are observed to have a good match with measured results     

Reliability of microwave SiGe/Si heterojunction bipolar transistors

The degradation behavior of NPN Si/SiGe/Si heterojunction bipolar transistors, grown by solid-source molecular beam epitaxy (MBE), has been studied by accelerated lifetime testing at different ambient temperatures. The degradations of the dc current gain and the microwave performance of the devices are explained in terms of recombination enhanced impurity diffusion (REID) of boron atoms from the base region and the subsequent formation of parasitic energy barriers at the base-emitter and base-collector junctions     

New method to determine the base resistance of bipolar transistors

A new method to determine the base resistance of bipolar transistors under forward-bias conditions is presented. Using special transistor structures, the total base resistance has been directly measured and then separated into its components, the external and internal base resistances. The sheet resistance for the internal base region can be estimated for a base-emitter voltage range of practical interest. An accurate estimation of the base resistance of advanced bipolar transistors under high-forward-bias conditions is demonstrated     

A unified approach to RF and microwave noise parameter modeling inbipolar transistors

A unified approach to RF and microwave noise parameter modeling in bipolar transistors is presented. Circuit level noise parameters including the minimum noise figure, the optimum generator admittance, and the noise resistance are analytically linked to the fundamental noise sources and the y-parameters of the transistor through circuit analysis of the chain noisy two-port representation. Comparisons of circuit level noise parameters from different physical models of noise sources in the transistor were made against measurements in UHV/CVD SiGe HBTs. A new model for the collector shot noise is then proposed which produces better noise parameter agreement with measured data than the SPICE noise model and the thermodynamic noise model, the two most recent Y-parameter based noise models     

Improved second breakdown of integrated bipolar power transistors

This paper presents two new power bipolar transistor structures With greatly increased forward Second breakdown values without saturation voltage degradation. These structures, labeledS1 andS2, were obtained with slight modification of the output stages of an IC power amplifier and without complicating the standard IC process. The design concepts developed in this paper were applied to power transistors fabricated using two different processes already in production: processA(V_{CEO(sus)} gt 50V) and processB(V_{CEO(sus)} gt 80V). Measurements have Shown that an improvement of three times for dc conditions and four times or more for single pulses duration of less than 1 ms can be obtained for structureS1 while structureS2 is able to achieve the proportionality between power silicon area and power levels. Experimental temperature distributions over emitter area and some theoretical calculations for the steady-state condition are given.     

An 1800 V 300 A nondestructive tester for bipolar power transistors

A nondestructive reverse-bias safe operating area (RBSOA) tester using an ultra-fast shunt circuit is constructed and demonstrated up to an 1800 V 300 A level. An innovative MOSFET shunt circuit is the key to the high power capability of the tester. The tester is an upgraded version of the old tester (rated at 1000 V 120 A) reported by the authors in 1985. The basic operation of the tester is reviewed, the design and the fabrication of the new tester are described, and test results are provided     

A study of the effect of peripheral injection in bipolar transistors using simplified computer analysis

The effect of injection from the emitter periphery into the base of a double diffused bipolar transistor is studied using the variable boundary regional approach and representing minority carrier current as the sum of radial currents using the cylindrical approximation. The results are combined with those for the active base region (i.e. under the emitter). It is shown that improvement in the prediction of hFEand fTversus Icis obtained by inclusion of the charge and current in the peripheral base region. The method used has the advantage of 1) fast computer time and 2) separation of active and peripheral base region and provides a useful tool to improve the precision when designing devices from fabrication data.     

静电放电作用下微波双极型晶体管的失效机理研究

通过理论建模和试验测试的方法研究了多指结构微波双极型晶体管在静电放电作用下的热稳定性和电稳定性。选择2SC3356作为受试器件,对100个测试样本进行人体模型静电放电注入实验,并从器件内部电场强度、电流密度和温度分布变化出发,用二维器件级仿真软件辅助分析了在静电放电应力下其内在损伤过程与机理。由于指间热耦合的存在,雪崩电流在各指上分布不均,局部的电流拥挤和过热效应会导致晶格损伤。试验结果表明,由于特殊的物理结构,受试器件对静电放电最敏感的端对并不是EB结,而是CB结,当静电放电电压增大到1.3KV时,CB结首先损坏。失效分析进一步表明静电放电引起的失效机理通常是介质层的击穿和局部铝硅共晶体的过热融化。静电放电注入实验的过程中存在积累效应,多次低强度的注入测试会导致潜在性失效并使器件性能大幅下降。     

New method to measure emitter resistance of heterojunction bipolar transistors

The in third-order intermodulation as a function of emitter current in a bipolar transistor is exploited to find emitter Ohmic resistance. The measurement can be carried out using only low-cost equipment and a scalar receiver. Results for an heterojunction bipolar transistor (HBT) are compared with those found using a vector network analyzer and a sophisticated extraction algorithm. The method is extended to simultaneously determine thermal resistance, R/sub TH/, and to obtain a most precise estimate of emitter resistance.     

Understanding the failure mechanisms of microwave bipolar transistors caused by electrostatic discharge

Electrostatic discharge(ESD) phenomena involve both electrical and thermal effects,and a direct electrostatic discharge to an electronic device is one of the most severe threats to component reliability.Therefore, the electrical and thermal stability of multifinger microwave bipolar transistors(BJTs) under ESD conditions has been investigated theoretically and experimentally.100 samples have been tested for multiple pulses until a failure occurred.Meanwhile,the distributions of electric field,current density and lattice temperature have also been analyzed by use of the two-dimensional device simulation tool Medici.There is a good agreement between the simulated results and failure analysis.In the case of a thermal couple,the avalanche current distribution in the fingers is in general spatially unstable and results in the formation of current crowding effects and crystal defects.The experimental results indicate that a collector-base junction is more sensitive to ESD than an emitter-base junction based on the special device structure.When the ESD level increased to 1.3 kV,the collector-base junction has been burnt out first.The analysis has also demonstrated that ESD failures occur generally by upsetting the breakdown voltage of the dielectric or overheating of the aluminum-silicon eutectic.In addition,fatigue phenomena are observed during ESD testing,with devices that still function after repeated low-intensity ESDs but whose performances have been severely degraded.     

Numerical simulation of GaAs/GaAlAs heterojunction bipolar transistors

A numerical analysis program for the 1-dimensional simulation of GaAs/GaAlAs heterojunction bipolar transistors is described. Calculations for a representative transistor structure indicate that a cutoff frequency, ft, of 100 GHz is obtainable. To attain such a high value, the transistor design incorporated a graded-bandgap base region and relatively high emitter doping (5 × 10¹⁷cm^-3), and the device was operated at high current density (5 × 10⁴A/cm²). Transient electron velocity overshoot effects were also included.     

Partitioned-charge-based modeling of bipolar transistors for non-quasi-static circuit simulation

The concept of partitioned-charge-based (PC) modeling of bipolar transistors is developed and demonstrated, and shown to be fundamentally superior to conventional quasi-static charge-control modeling, the basis of the common (capacitance-based) Gummel-Poon (GP) equivalent circuit. SPICE transient simulations with PC and GP models are contrasted to show a first-order accounting for non-quasi-static (NQS) delay in the PC model which is not accounted for in the GP model. Additional model contrasts in the small-signal domain, compared with exact ac solutions, confirm the superiority of the PC model, the characterization of which is in fact no more tedious than that of the GP model.