嵌入式系统的动态功耗管理结构

近几年来功耗问题成为在嵌入式系统领域中普遍关注的热点问题。其中动态功耗管理便是一种重要的减少系统范围的能量的方式。在近年的处理机设计技术中引入了支持基于动态电压与频率缩放的功耗管理的系统,主要提出一种基于这种技术的动态功耗管理的层次体系结构,它是基于"策略"的一种抽象定义。最后文章还用一个实例说明该结构不但能很好地完成复杂系统的功耗管理功能,而且具有较好的可扩展性,并且可以大幅度地降低系统功耗。     

动态电压调节技术在高性能计算领域的能效研究

功耗问题是未来高性能计算机系统性能提高面临的最突出问题之一,本文调查典型的低功耗技术动态电压调节应用于高性能计算机系统的有效性。建立了动态电压调节技术在高性能计算领域的能耗模型,提出了程序运行时钟能耗和真实能耗的概念。在三种典型的计算机系统上,使用智能功率仪表测试使用动态电压调节技术后的系统能耗,说明了动态电压调节技术在高性能计算领域节能降耗的有效性。     

System-level integrated power management for handheld systems

We propose a system-level integrated power management scheme for battery-operated handheld systems such as cell phones and PDAs. Rather than dealing separately with each system component, we consider the interactions between CPU, WNIC (wireless network interface card), LCD, and applications, to reduce energy consumption at the system-level. Depending on the type of applications, the proposed scheme takes the interaction between CPU voltage and frequency and either LCD clock frequency or WNIC power modes, selectively, or both of them. The proposed method selects voltage for CPU in the context of LCD clock speed to reduce the system energy consumption. The application type and the power mode of WNIC are also considered to control the CPU voltage and frequency. Experimental results show that our scheme reduces the system energy consumption by as much as 30% compared to the systems of simply combining DVS (dynamic voltage scaling) and DPM (dynamic power management) or those of using no energy saving policy.     

User-Driven Frequency Scaling

We propose and evaluate user-driven frequency scaling (UDFS) for improved power management on processors that support dynamic voltage and frequency scaling (DVFS), e.g, those used in current laptop and desktop computers. UDFS dynamically adapts CPU frequency to the individual user and the workload through a simple user feedback mechanism, unlike currently-used DVFS methods which rely only on CPU utilization. Our UDFS algorithms dramatically reduce typical operating frequencies while maintaining performance at satisfactory levels for each user. We evaluated our techniques through user studies conducted on a Pentium M laptop running Windows applications. The UDFS scheme reduces measured system power by 22.1%, averaged across all our users and applications, compared to the Windows XP DVFS scheme     

无线传感器网络异步任务集双效节能延迟调度算法研究

深亚微米技术的发展,使得漏电功耗在CMOS电路总功耗中所占比重日益增大,传统的传感器节点CPU节能研究主要针对动态功耗,其能耗估计和优化方法已凸显局限.针对此问题,提出动态电压调节(DVS)和动态功耗管理(DPM)相结合的双效节能延迟调度算法.从相对截止期小于等于周期的异步实时任务调度出发,结合DVS技术,综合考虑动态功耗和漏电功耗的影响,在满足任务实时性的前提下,选取每个任务的CPU执行速度,以降低总能耗,并通过任务的延迟调度对CPU空闲时段加以合并,采用DPM方法使CPU在空闲时段有选择性的进入低功耗状态,从而进一步降低漏电能耗.仿真实验验证了该算法的有效性.     

Using probabilistic model checking for dynamic power management

Dynamic power management (DPM) refers to the use of runtime strategies in order to achieve a tradeoff between the performance and power consumption of a system and its components. We present an approach to analysing stochastic DPM strategies using probabilistic model checking as the formal framework. This is a novel application of probabilistic model checking to the area of system design. This approach allows us to obtain performance measures of strategies by automated analytical means without expensive simulations. Moreover, one can formally establish various probabilistically quantified properties pertaining to buffer sizes, delays, energy usage etc., for each derived strategy.Received November 2003Revised September 2004Accepted December 2004 by M. Leuschel and D. J. Cooke     

System level fixed priority energy management algorithm for embedded real time application

Dynamic power management (DPM) and dynamic voltage scaling (DVS) are crucial techniques to reduce the energy consumption in embedded real-time systems. Many previous studies have focused on the energy consumption of the processor or I/O devices. In this paper, we focus on the problem of energy management integrating DVS and DPM techniques for periodic embedded real-time applications with rate monotonic (RM) policy and present a system level fixed priority energy-efficient scheduling (SLFPEES) algorithm. The SLFPEES algorithm consists of I/O device scheduling and job scheduling. I/O device scheduling is based on the dynamic power management with rate monotonic (DPM-RM) policy which puts devices into the sleep state when the idle interval is larger than devices break even time. Job scheduling is based on the RM policy and uses stack resource protocol (SRP) to guarantee exclusive access to the shared resources. For energy efficiency, the SLFPEES algorithm schedules the task with a lower speed and a higher speed. The experimental result shows that the SLFPEES algorithm can yield significantly energy savings with respect to the existing techniques.     

基于低阈值单元的高性能低功耗设计方法

在高性能IC设计中对高低两种阈值电压技术进行比较,利用低阈值电压降低动态功耗的手段实现降低总功耗的目标,并分析出了两种阈值电压低功耗设计各自适应的电路类型。首先对40nm工艺中标准单元的内部功耗、时序、尺寸进行分析。接着在相同延时下对高阈值和低阈值两种标准单元所设计的反相器链时序电路的功耗进行对比分析。最后基于Benchmark和AES两种类型电路,分别采用高阈值和低阈值进行综合,对比得出在相同时钟周期下更低功耗的设计所对应的阈值电压设计方式。结果显示,在相同的时钟频率下,对动态功耗占据总功耗比例极大的电路使用低阈值设计得到的功耗更低。同样,在动态功耗比例不是极大的电路中,当低阈值综合的slack为正时,以及当高阈值综合的slack为负、低阈值的slack为0时,用低阈值设计功耗更低;而当高阈值、低阈值综合的slack都为0时,用高阈值设计功耗更低。     

面向高性能业务应用的基于剖视信息的系统能耗优化

当前,很多部门使用高性能计算机周期性地进行业务性的数值计算。维护这些业务系统的主要代价是每天消耗的大量电能,降低能量消耗能够极大地降低维护业务系统的成本。高性能业务系统的核心是微处理器,当前,微处理器普遍支持动态电压调节技术。该技术通过降低微处理器的电压和频率减小微处理器的能耗,但是一般会导致系统性能的下降。提出了一种面向高性能业务应用的能量优化技术。该技术利用系统支持的多个频率层次,建立性能约束下的能量优化模型,优化业务应用的能耗。根据程序信息获取方式的差别,提出了SEOM 和 CEOM 两种能量优化模型,SEOM模型的程序信息可以直接测试获取,CEOM的程序信息采用编译器插桩方法获取。使用典型平台对能耗优化效果进行了验证,最多可节省12%的能耗。     

Energy saving strategies for parallel applications with point-to-point communication phases

Although high-performance computing traditionally focuses on the efficient execution of large-scale applications, both energy and power have become critical concerns when approaching exascale. Drastic increases in the power consumption of supercomputers affect significantly their operating costs and failure rates. In modern microprocessor architectures, equipped with dynamic voltage and frequency scaling (DVFS) and CPU clock modulation (throttling), the power consumption may be controlled in software. Additionally, network interconnect, such as Infiniband, may be exploited to maximize energy savings while the application performance loss and frequency switching overheads must be carefully balanced. This paper advocates for a runtime assessment of such overheads by means of characterizing point-to-point communications into phases followed by analyzing the time gaps between the communication calls. Certain communication and architectural parameters are taken into consideration in the three proposed frequency scaling strategies, which differ with respect to their treatment of the time gaps. The experimental results are presented for NAS parallel benchmark problems as well as for the realistic parallel electronic structure calculations performed by the widely used quantum chemistry package GAMESS. For the latter, three different process-to-core mappings were studied as to their energy savings under the proposed frequency scaling strategies and under the existing state-of-the-art techniques. Close to the maximum energy savings were obtained with a low performance loss of 2% on the given platform.     

动态电源管理的在线优化技术

研究离散事件动态系统中的一类随机离散动态系统—–半Markov决策过程,在动态电源管理问题中的应用.动态电源管理问题存在于很多便携式电子设备中,其主要目的是根据电子设备的状态通过电源管理策略选择关闭或休眠一些元器件,从而实现节省电子设备功耗,延长电池使用时间的目的.首先讨论了动态电源管理问题的建模,给出了一种带有禁止时间的在线优化方法,该方法通过设备自身运行数据,自主地学习并改进电源的动态管理策略,从而使每台电子设备具有个性化的动态电源管理方式,其优化过程可以在设备充电时完成,不需要通过云传输和云计算,避免了隐私数据的泄漏.最后通过仿真实验验证了算法的有效性.     

Prediction-Based Power-Performance Adaptation of Multithreaded Scientific Codes

Computing has recently reached an inflection point with the introduction of multi-core processors. On-chip thread-level parallelism is doubling approximately every other year. Concurrency lends itself naturally to allowing a program to trade performance for power savings by regulating the number of active cores, however in several domains users are unwilling to sacrifice performance to save power. We present a prediction model for identifying energy-efficient operating points of concurrency in well-tuned multithreaded scientific applications, and a runtime system which uses live program analysis to optimize applications dynamically. We describe a dynamic, phase-aware performance prediction model that combines multivariate regression techniques with runtime analysis of data collected from hardware event counters to locate optimal operating points of concurrency. Using our model, we develop a prediction-driven, phase-aware runtime optimization scheme that throttles concurrency so that power consumption can be reduced and performance can be set at the knee of the scalability curve of each program phase. The use of prediction reduces the overhead of searching the optimization space while achieving near-optimal performance and power savings. A thorough evaluation of our approach shows a reduction in power consumption of 10.8% simultaneous with an improvement in performance of 17.9%, resulting in energy savings of 26.7%.     

Adaptive,transparent CPU scaling algorithms leveraging inter-node MPI communication regions

Although users of high-performance computing are most interested in raw performance, both energy and power consumption have become critical concerns. Because the CPU is often the major power consumer, some microprocessors allow frequency and voltage scaling, which enables a system to efficiently reduce CPU performance and power. When the CPU is not on the critical path, such dynamic frequency and voltage scaling can produce significant energy savings with little performance penalty.This paper presents an MPI runtime system that dynamically reduces CPU frequency and voltage during communication phases in MPI programs. It dynamically identifies such phases and, without a priori knowledge, selects the CPU frequency in order to minimize energy-delay product. All analysis and subsequent frequency and voltage scaling is within MPI and so is entirely transparent to the application. This means that the large number of existing MPI programs, as well as new ones being developed, can use our system without modification. Results show that the median reduction in energy-delay product for twelve benchmarks is 8%, the median energy reduction is 11%, and the median increase in execution time increase is only 2%.     

Automatic runtime frequency-scaling system for energy savings in parallel applications

Although high-performance computing has always been about efficient application execution, both energy and power consumption have become critical concerns owing to their effect on operating costs and failure rates of large-scale computing platforms. Modern processors provide techniques, such as dynamic voltage and frequency scaling (DVFS) and CPU clock modulation (called throttling), to improve energy efficiency on-the-fly. Without careful application, however, DVFS and throttling may cause a significant performance loss due to system overhead. This paper proposes a novel runtime system that maximizes energy saving by selecting appropriate values for DVFS and throttling in parallel applications. Specifically, the system automatically predicts communication phases in parallel applications and applies frequency scaling considering both the CPU offload, provided by the network-interface card, and the architectural stalls during computation. Experiments, performed on NAS parallel benchmarks as well as on real-world applications in molecular dynamics and linear system solution, demonstrate that the proposed runtime system obtaining energy savings of as much as 14 % with a low performance loss of about 2 %.     

Power-aware fixed priority scheduling for sporadic tasks in hard real-time systems

In this paper, we consider the generalized power model in which the focus is the dynamic power and the static power, and we study the problem of the canonical sporadic task scheduling based on the rate-monotonic (RM) scheme. Moreover, we combine with the dynamic voltage scaling (DVS) and dynamic power management (DPM). We present a static low power sporadic tasks scheduling algorithm (SSTLPSA), assuming that each task presents its worst-case work-load to the processor at every instance. In addition, a more energy efficient approach called a dynamic low power sporadic tasks scheduling algorithm (DSTLPSA) is proposed, based on reclaiming the dynamic slack and adjusting the speed of other tasks on-the-fly in order to reduce energy consumption while still meeting the deadlines. The experimental results show that the SSTLPSA algorithm consumes 26.55–38.67% less energy than that of the RM algorithm and the DSTLPSA algorithm reduces the energy consumption up to 18.38–30.51% over the existing DVS algorithm.     

Using OS Observations to Improve Performance in Multicore Systems

Today's operating systems don't adequately handle the complexities of Multicore processors. Architectural features confound existing OS techniques for task scheduling, load balancing, and power management. This article shows that the OS can use data obtained from dynamic runtime observation of task behavior to ameliorate performance variability and more effectively exploit multicore processor resources. The authors' research prototypes demonstrate the utility of observation-based policy.     

Performance Analysis of Power-Aware Task Scheduling Algorithms on Multiprocessor Computers with Dynamic Voltage and Speed

Task scheduling on multiprocessor computers with dynamically variable voltage and speed is investigated as combinatorial optimization problems, namely, the problem of minimizing schedule length with energy consumption constraint and the problem of minimizing energy consumption with schedule length constraint. The first problem has applications in general multiprocessor computing systems where energy consumption is an important concern and in mobile computers where energy conservation is a main concern. The second problem has applications in real-time multiprocessing systems where timing constraint is a major requirement. These problems emphasize the tradeoff between power and performance and are defined such that the power-performance product is optimized by fixing one factor and minimizing the other. It is found that both problems are equivalent to the sum of powers problem and can be decomposed into two subproblems, namely, scheduling tasks and determining power supplies. Such decomposition makes design and analysis of heuristic algorithms tractable. We analyze the performance of list scheduling algorithms and equal-speed algorithms and prove that these algorithms are asymptotically optimal. Our extensive simulation data validate our analytical results and provide deeper insight into the performance of our heuristic algorithms.     

RTLPoWer：一个实时动态电压调节低功耗系统

功耗问题是计算机系统发展亟待解决的问题,硬件和软件在解决功耗问题上都有重要的作用.尽管有许多工具可用于低功耗硬件的开发,但支持软件技术开发的低功耗工具并不多见.我们基于ARM的指令集开发了一个实时动态电压调节低功耗系统RTLPower.RTLPower综合了编译指导的动态电压调节和程序的性能功耗模拟,该系统能够有效支持编译指导的动态电压调节技术的研究开发.     

Achieving energy efficiency during collective communications

Energy consumption has become a major design constraint in modern computing systems. With the advent of petaflops architectures, power‐efficient software stacks have become imperative for scalability. Techniques such as dynamic voltage and frequency scaling (called DVFS) and CPU clock modulation (called throttling) are often used to reduce the power consumption of the compute nodes. To avoid significant performance losses, these techniques should be used judiciously during parallel application execution. For example, its communication phases may be good candidates to apply the DVFS and CPU throttling without incurring a considerable performance loss. They are often considered as indivisible operations although little attention is being devoted to the energy saving potential of their algorithmic steps. In this work, two important collective communication operations, all‐to‐all and allgather, are investigated as to their augmentation with energy saving strategies on the per‐call basis. The experiments prove the viability of such a fine‐grain approach. They also validate a theoretical power consumption estimate for multicore nodes proposed here. While keeping the performance loss low, the obtained energy savings were always significantly higher than those achieved when DVFS or throttling were switched on across the entire application run. Copyright © 2012 John Wiley & Sons, Ltd.