A high-speed 128-kb MRAM core for future universal memory applications

A 128-kb magnetic random access memory (MRAM) test chip has been fabricated utilizing, for the first time, a 0.18-/spl mu/m V/sub DD/=1.8 V logic process technology with Cu metallization. The presented design uses a 1.4-/spl mu/m/sup 2/ one-transistor/one-magnetic tunnel junction (1T1MTJ) cell and features a symmetrical high-speed sensing architecture using complementary reference cells and configurable load devices. Extrapolations from test chip measurements and circuit assessments predict a 5-ns random array read access time and random write operations with <5-ns write pulse width.     

A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects

A low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm/sup 2/ 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-/spl mu/m CMOS process utilizing five layers of metal and two layers of poly.     

Minimal group refractive index dispersion and gain evolution in ultra-broad-band quantum cascade lasers

The group refractive index dispersion in ultra-broad-band quantum cascade (QC) lasers has been determined using Fabry-Perot spectra obtained by operating the lasers in continuous wave mode below threshold. In the wavelength range of 5-8 /spl mu/m, the global change of the group refractive index is as small as +8.2 /spl times/ 10/sup -3/ /spl mu/m/sup -1/. Using the method of Hakki and Paoli (1975), the subthreshold gain of the lasers has furthermore been measured as a function of wavelength and current. At the wavelength of best performance, 7.4 /spl mu/m, a modal gain coefficient of 16 cm/spl middot/kA/sup -1/ at threshold and a waveguide loss of 18 cm/sup -1/ have been estimated. The gain evolution confirms an earlier assumption that cross-absorption restricted laser action to above 6 /spl mu/m wavelength.     

Nano-Watt silicon-on-sapphire ADC using 2C-1C capacitor chain

An analogue-to-digital converter (ADC) in a 0.5 /spl mu/m silicon-on-sapphire CMOS technology is reported. This innovative ADC uses a 2C-1C capacitor chain and a switched capacitor comparator. The ADC is capable of sampling at 409 kS/s, consuming 900 nW at 1.1 V power supply and 1.35 /spl mu/W at 1.5 V. It uses an active area of 300/spl times/700 /spl mu/m/sup 2/ and 640/spl times/1070 /spl mu/m/sup 2/ with pads.     

A highly reliable 3-D integrated SBT ferroelectric capacitor enabling FeRAM scaling

Ferroelectric random access memories (FeRAMs) combine very attractive properties such as low-voltage operation, fast write and nonvolatility. However, unlike Flash memories, FeRAMs are difficult to scale along with the CMOS technology roadmap, mainly because of the decrease of available signal with decreasing cell area. One solution for further scaling is to integrate three-dimensional (3-D) FeCAPs. In this paper, we have integrated a 3-D FeCAP structure in a 0.35-/spl mu/m CMOS technology whereby the effective area of <1 /spl mu/m/sup 2/ single FeCAPs is increased by a factor of almost two. We show that, after optimization of the metal-organic chemical vapor deposition (MOCVD) deposition and post-anneal steps of the Sr/sub 0.8/Bi/sub 2.2/Ta/sub 2/O/sub 9/ (SBT) layer, the sidewall SBT contributes to the polarization Pr, resulting in higher Pr values for 0.81-/spl mu/m/sup 2/ three-dimensional (3-D) capacitors (2Pr/spl ap/15 /spl mu/C/cm/sup 2/) than for 1000 /spl mu/m/sup 2/ 2-D capacitors (2Pr/spl ap/10 /spl mu/C/cm/sup 2/). Moreover, these 3-D capacitors are observed to be fatigue-free and imprint-free up to 10/sup 11/ cycles (5-V square pulses), and extrapolations of retention tests indicate less than 10% Pr loss after ten years at 85/spl deg/C, which shows that sidewall SBT retains the same excellent reliability properties as 2-D capacitors. We demonstrate in this paper that the negative signal-scaling trend can be halted using 3-D FeCAPs. To our knowledge, this paper is the first report on electrical and reliability properties of integrated 3-D FeCAPs, and is a starting point for future development work on densely scaled FeRAMs.     

Design and fabrication of RESURF MOSFETs on 4H-SiC(0001), (112~0), and 6H-SiC(0001)

Design and fabrication of lateral SiC reduced surface field (RESURF) MOSFETs have been investigated. The doping concentration (dose) of the RESURF and lightly doped drain regions has been optimized to reduce the electric field crowding at the drain edge or in the gate oxide by using device simulation. The optimum oxidation condition depends on the polytype: N/sub 2/O oxidation at 1300/spl deg/C seems to be suitable for 4H-SiC, and dry O/sub 2/ oxidation at 1250/spl deg/C for 6H-SiC. The average inversion-channel mobility is 22, 78, and 68 cm/sup 2//Vs for 4H-SiC(0001), (112~0), and 6H-SiC(0001) MOSFETs, respectively. RESURF MOSFETs have been fabricated on 10-/spl mu/m-thick p-type 4H-SiC(0001), (112~0), and 6H-SiC(0001) epilayers with an acceptor concentration of 1/spl times/10/sup 16/ cm/sup -3/. A 6H-SiC(0001) RESURF MOSFET with a 3-/spl mu/m channel length exhibits a high breakdown voltage of 1620 V and an on-resistance of 234 m/spl Omega//spl middot/cm/sup 2/. A 4H-SiC(112~0) RESURF MOSFET shows the characteristics of 1230 V-138 m/spl Omega//spl middot/cm/sup 2/.     

Low-resistance ultrashallow extension formed by optimized flash lamp annealing

Flash lamp annealing (FLA) technology is proposed as a new method of activating implanted impurities. By optimizing FLA and implantation conditions, junction depth (Xj) at the concentration of 1 /spl times/ 10/sup 18/ cm/sup -3/ and the sheet resistance of 13 nm and 700 /spl Omega//sq for As and 14 nm and 770 /spl Omega//sq for BF/sub 2/ with junction leakage lower than 1 /spl times/ 10/sup -16/ A//spl mu/m/sup 2/ at 1.5 V were successfully obtained without wafer slip and warpage problems.     

Optimized second-harmonic generation in quantum cascade lasers

Optimized second-harmonic generation (SHG) in quantum cascade (QC) lasers with specially designed active regions is reported. Nonlinear optical cascades of resonantly coupled intersubband transitions with giant second-order nonlinearities were integrated with each QC-laser active region. QC lasers with three-coupled quantum-well (QW) active regions showed up to 2 /spl mu/W of SHG light at 3.75 /spl mu/m wavelength at a fundamental peak power and wavelength of 1 W and 7.5 /spl mu/m, respectively. These lasers resulted in an external linear-to-nonlinear conversion efficiency of up to 1 /spl mu/W/W/sup 2/. An improved 2-QW active region design at fundamental and SHG wavelengths of 9.1 and 4.55 /spl mu/m, respectively, resulted in a 100-fold improved external linear-to-nonlinear power conversion efficiency, i.e. up to 100 /spl mu/W/W/sup 2/. Full theoretical treatment of nonlinear light generation in QC lasers is given, and excellent agreement with the experimental results is obtained. For the best structure, a second-order nonlinear susceptibility of 4.7/spl times/10/sup -5/ esu (2/spl times/10/sup 4/pm/V) is calculated, about two orders of magnitude above conventional nonlinear optical materials and bulk III-V semiconductors.     

A resonant tunneling quantum-dot infrared photodetector

A novel device-resonant tunneling quantum-dot infrared photodetector-has been investigated theoretically and experimentally. In this device, the transport of dark current and photocurrent are separated by the incorporation of a double barrier resonant tunnel heterostructure with each quantum-dot layer of the device. The devices with In/sub 0.4/Ga/sub 0.6/As-GaAs quantum dots are grown by molecular beam epitaxy. We have characterized devices designed for /spl sim/6 /spl mu/m response, and the devices also exhibit a strong photoresponse peak at /spl sim/17 /spl mu/m at 300 K due to transitions from the dot excited states. The dark currents in the tunnel devices are almost two orders of magnitude smaller than those in conventional devices. Measured values of J/sub dark/ are 1.6/spl times/10/sup -8/ A/cm/sup 2/ at 80 K and 1.55 A/cm/sup 2/ at 300 K for 1-V applied bias. Measured values of peak responsivity and specific detectivity D/sup */ are 0.063 A/W and 2.4/spl times/10/sup 10/ cm/spl middot/Hz/sup 1/2//W, respectively, under a bias of 2 V, at 80 K for the 6-/spl mu/m response. For the 17-/spl mu/m response, the measured values of peak responsivity and detectivity at 300 K are 0.032 A/W and 8.6/spl times/10/sup 6/ cm/spl middot/Hz/sup 1/2//W under 1 V bias.     

Interdigitated Ge p-i-n photodetectors fabricated on a Si substrate using graded SiGe buffer layers

We report an interdigitated p-i-n photodetector fabricated on a 1-/spl mu/m-thick Ge epitaxial layer grown on a Si substrate using a 10-/spl mu/m-thick graded SiGe buffer layer. A growth rate of 45 /spl Aring//s/spl sim/60 /spl Aring//s was achieved using low-energy plasma enhanced chemical vapor deposition. The Ge epitaxial layer had a threading dislocation density of 10/sup 5/ cm/sup -2/ and a rms surface roughness of 3.28 nm. The 3-dB bandwidth and the external quantum efficiency were measured on a photodetector having 1-/spl mu/m finger width and 2-/spl mu/m spacing with a 25/spl times/28 /spl mu/m/sup 2/ active area. At a wavelength of 1.3 /spl mu/m, the bandwidth was 2.2, 3.5, and 3.8 GHz at bias voltages of -1, -3, and -5 V, respectively. The dark current was 3.2 and 5.0 /spl mu/A at -3 and -5 V, respectively. This photodetector exhibited an external quantum efficiency of 49% at a wavelength of 1.3 /spl mu/m.     

High-power nearly diffraction-limited AlGaAs-InGaAs semiconductor slab-coupled optical waveguide laser

Beam-quality measurements on the output of a 915-nm AlGaAs-InGaAs-GaAs slab-coupled optical waveguide laser (SCOWL) are reported. This device had a nearly circular mode (3.8 /spl mu/m by 3.4 /spl mu/m 1/e/sup 2/ widths in the near-field) and was capable of a single-ended continuous-wave output power of greater than 1 W. Measurements of M/sup 2/ indicate that the SCOWL output beam is nearly diffraction-limited in both directions with M/sub x//sup 2/ /spl sim/ M/sub y//sup 2/ /spl sim/ 1.1 over the entire range of output powers measured.     

Electrical characteristics of 8-/spl Aring/ EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions

The authors demonstrate high-performing n-channel transistors with a HfO/sub 2//TaN gate stack and a low thermal-budget process using solid-phase epitaxial regrowth of the source and drain junctions. The thinnest devices have an equivalent oxide thickness (EOT) of 8 /spl Aring/, a leakage current of 1.5 A/cm/sup 2/ at V/sub G/=1 V, a peak mobility of 190 cm/sup 2//V/spl middot/s, and a drive-current of 815 /spl mu/A//spl mu/m at an off-state current of 0.1 /spl mu/A//spl mu/m for V/sub DD/=1.2 V. Identical gate stacks processed with a 1000-/spl deg/C spike anneal have a higher peak mobility at 275 cm/sup 2//V/spl middot/s, but a 5-/spl Aring/ higher EOT and a reduced drive current at 610 /spl mu/A//spl mu/m. The observed performance improvement for the low thermal-budget devices is shown to be mostly related to the lower EOT. The time-to-breakdown measurements indicate a maximum operating voltage of 1.6 V (1.2 V at 125 /spl deg/C) for a ten-year lifetime, whereas positive-bias temperature-instability measurements indicate a sufficient lifetime for operating voltages below 0.75 V.     

An OFDM-specified lossless FFT architecture

In this paper, a VLSI architecture based on radix-2/sup 2/ integer fast Fourier transform (IntFFT) is proposed to demonstrate its efficiency. The IntFFT algorithm guarantees the perfect reconstruction property of transformed samples. For a 64-points radix-2/sup 2/ FFT architecture, the proposed architecture uses 2 sets of complex multipliers (six real multipliers) and has 6 pipeline stages. By exploiting the symmetric property of lossless transform, the memory usage is reduced by 27.4%. The whole design is synthesized and simulated with a 0.18-/spl mu/m TSMC 1P6M standard cell library and its reported equivalent gate count usage is 17,963 gates. The whole chip size is 975 /spl mu/m/spl times/977 /spl mu/m with a core size of 500 /spl mu/m/spl times/500 /spl mu/m. The core power consumption is 83.56 mW. A Simulink-based orthogonal frequency demodulation multiplexing platform is utilized to compare the conventional fixed-point FFT and proposed IntFFT from the viewpoint of system-level behavior in items of signal-to-quantization-noise ratio (SQNR) and bit error rate (BER). The quantization loss analysis of these two types of FFT is also derived and compared. Based on the simulation results, the proposed lossless IntFFT architecture can achieve comparative SQNR and BER performance with reduced memory usage.     

High-performance 1.06-/spl mu/m selectively oxidized vertical-cavity surface-emitting lasers with InGaAs-GaAsP strain-compensated quantum wells

We present the first room-temperature continuous-wave operation of high-performance 1.06-/spl mu/m selectively oxidized vertical-cavity surface-emitting lasers (VCSEL's). The lasers contain strain-compensated InGaAs-GaAsP quantum wells (QW's) in the active region grown by metalorganic vapor phase epitaxy. The threshold current is 190 /spl mu/A for a 2.5/spl times/2.5 /spl mu/m/sup 2/ device, and the threshold voltage is as low as 1.255 V for a 6/spl times/6 /spl mu/m/sup 2/ device. Lasing at a wavelength as long as 1.1 /spl mu/m was also achieved. We discuss the wavelength limit for lasers using the strain-compensated QW's on GaAs substrates.     

1.3-/spl mu/m InAs quantum-dot laser with high dot density and high uniformity

We realized a triple-stacked 1.3-/spl mu/m InAs quantum dot (QD) with a high density of 2.4/spl times/10/sup 11/ cm/sup -2/ and a high uniformity of below 24 meV that employs an As/sub 2/ source and a gradient composition (GC) strain-reducing layer (SRL) grown on a GaAs substrate. We demonstrated the 1.3-/spl mu/m wavelength emission of this triple-stacked QD laser with a 0.92-mm cavity length and a cleaved facet at room temperature. In addition, we realized the highest maximum modal gain yet reported of 8.1 cm/sup -1/ per QD layer at beyond 1.28 /spl mu/m by using our high-density and high-uniformity QD.     

Fabrication of high-performance InGaAsN ridge waveguide lasers with pulsed anodic oxidation

We have demonstrated high-performance InGaAsN triple-quantum-well ridge waveguide (RWG) lasers fabricated using pulsed anodic oxidation. The lowest threshold current density of 675 A/cm/sup 2/ was obtained from a P-side-down bonded InGaAsN laser, with cavity length of 1600 /spl mu/m and contact ridge width of 10 /spl mu/m. The emission wavelength is 1295.1 nm. The transparency current density from a batch of unbonded InGaAsN RWG lasers was 397 A/cm/sup 2/ (equivalent to 132 A/cm/sup 2/ per well). High characteristic temperature of 138 K was also achieved from the bonded 10/spl times/1600-/spl mu/m/sup 2/ InGaAsN laser.     

A micromachined Pirani gauge with dual heat sinks

This paper reports a micromachined Pirani gauge with dual heat sinks that can be integrated with microelectromechanical systems (MEMS) devices inside a vacuum package to monitor long-term pressure changes and stability inside the package. The Pirani gauge utilizes small gaps (<1 /spl mu/m) between its heater and two thermal heat sinks to obtain large dynamic range (20 mtorr to 2 torr) and high sensitivity (3.5/spl times/10/sup 5/ (K/W)/torr). The gauge is 2/spl times/2 mm/sup 2/ in size, is fabricated using the dissolved wafer process (DWP) on a glass substrate, and utilizes dielectric bridges for signal routing. Measurements show the low end of the dynamic range can be extended by reducing the gap distance between the heater and thermal sinks, which matches well with analytical modeling. This gauge shows an uncertainty of 50 /spl mu/torr and a detectable leak rate of 3.1/spl times/10/sup -16/ cm/sup 3//s, assuming a common micropackage volume of 1.6/spl times/10/sup -5/ cm/sup 3/, which represents at least four orders of magnitude improvement over traditional leak testing.     

Low-threshold operation of 1.34-/spl mu/m GaInNAs VCSEL grown by MOVPE

Low-threshold operation was demonstrated for a 1.34-/spl mu/m vertical-cavity surface-emitting laser (VCSEL) with GaInNAs quantum wells (QWs) grown by metal-organic vapor-phase epitaxy. Optimizing the growth conditions and QW structure of the GaInNAs active layers resulted in edge-emitting lasers that oscillated with low threshold current densities of 0.87 kA/cm/sup 2/ at 1.34 /spl mu/m and 1.1 kA/cm/sup 2/ at 1.38 /spl mu/m, respectively. The VCSEL had a low threshold current of 2.8 mA and a lasing wavelength of 1.342 /spl mu/m at room temperature and operated up to 60/spl deg/C.     

A 125-mm/sup 2/ 1-Gb NAND flash memory with 10-MByte/s program speed

A single 3-V only, 1-Gb NAND flash memory has been successfully developed. The chip has been fabricated using 0.13-/spl mu/m CMOS STI technology. The effective cell size including the select transistors is 0.077 /spl mu/m/sup 2/. To decrease the chip size, a new architecture is introduced. The in-series connected memory cells are increased from 16 to 32. Furthermore, as many as 16 k memory cells are connected to the same wordline. As a result, the chip size is decreased by 15%. A very small die size of 125 mm/sup 2/ and an excellent cell area efficiency of 70% are achieved. As for the performance, a very fast programming and serial read are realized. The highest program throughput ever of 10.6-MByte/s is realized: 1) by quadrupling the page size and 2) by newly introducing a write cache. In addition, the garbage collection is accelerated to 9.4-MByte/s. In addition, the write cache accelerates the serial read operation and a very fast 20-MByte/s read throughput is realized.     

A Submicrometer Megabit DRAM Process Technology Using Trench Capacitors

This paper describes guidelines for developing a 1-4-Mbit DRAM process, and device/process technologies for fabricating an experimental 1-Mbit DRAM. A single transistor cell combined with a trench capacitor and on-chip ECC technologies has the potential to realize a cell size of 10 /spl mu/m/sup 2/ without degrading soft error immunity. A depletion trench capacitor, submicrometer n-well CMOS process, Mo-poly gate, and sub-micrometer pattern formation technologies are developed, and an experimental 1-Mbit DRAM with a cell size of 20 /spl mu/m/sup 2/ is successfully developed by using these technologies.