Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Frequency and voltage dependency of interface states and series resistance in Al/SiO2/p-Si MOS structure

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Al/SiO₂/p-Si metal-oxide-semiconductor (MOS) Schottky diodes have been measured in the voltage range from ?3 to +3 V and frequency range from 5 KHz to 1 MHz at room temperature. It is found that both C and G/ω of the MOS capacitor are very sensitive to frequency. The fairly large frequency dispersion of C–V and G/ω–V characteristics can be interpreted in terms of the particular distribution of interface states at SiO₂/Si interface and the effect of series resistance. At relatively low frequencies, the interface states can follow an alternating current (AC) signal that contributes to excess capacitance and conductance. This leads to an anomalous peak of C–V curve in the depletion and accumulation regions. In addition, a peak at approximately ?0.2 V appears in the R_s–V profiles at low frequency. The peak values of the capacitance and conductance decrease with increasing frequency. The density distribution profile of interface state density (N_ss) obtained from C_HF–C_LF capacitance measurement also shows a peak in the depletion region.     

Determination of the laterally homogeneous barrier height of palladium Schottky barrier diodes on n-Ge (1 1 1)

We have studied the experimental linear relationship between barrier heights and ideality factors for palladium (Pd) on bulk-grown (1 1 1) Sb-doped n-type germanium (Ge) metal-semiconductor structures with a doping density of about 2.5×10¹⁵ cm^?3. The Pd Schottky contacts were fabricated by vacuum resistive evaporation. The electrical analysis of the contacts was investigated by means of current–voltage (I–V) and capacitance–voltage (C–V) measurements at a temperature of 296 K. The effective barrier heights from I–V characteristics varied from 0.492 to 0.550 eV, the ideality factor n varied from 1.140 to 1.950, and from reverse bias capacitance–voltage (C^?2–V) characteristics the barrier height varied from 0.427 to 0.509 eV. The lateral homogenous barrier height value of 0.558 eV for the contacts was obtained from the linear relationship between experimental barrier heights and ideality factors. Furthermore the experimental barrier height distribution obtained from I–V and (C^?2?V) characteristics were fitted by Gaussian distribution function, and their mean values were found to be 0.529 and 0.463 eV, respectively.     

The effects of thermal annealing on the electrical characteristics of Au/n–InP/In diode

An Au/n–InP/In diode has been fabricated in the laboratory conditions and the current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the diode have been measured in room temperature. In order to observe the effect of the thermal annealing, this diode has been annealed at temperatures 100 and 200 °C for 3 min in N₂ atmosphere. The characteristic parameters such as leakage current, barrier height and ideality factor of this diode have been calculated from the forward bias I–V and reverse bias C–V characteristics as a function of annealing temperature. Also the rectifying ratio of the diode is evaluated for as-deposited and annealed diode.     

Evaluation of lateral barrier height of inhomogeneous photolithography-fabricated Au/n-GaAs Schottky barrier diodes from 80 K to 320 K

In order to evaluate current conduction mechanism in the Au/n-GaAs Schottky barrier diode (SBD) some electrical parameters such as the zero-bias barrier height (BH) Φ_bo(I–V) and ideality factor (n) were obtained from the forward bias current–voltage (I–V) characteristics in wide temperature range of 80–320 K by steps of 10 K. By using the thermionic emission (TE) theory, the Φ_bo(I–V) and n were found to depend strongly on temperature, and the n decreases with increasing temperature while the Φ_bo(I–V) increases. The values of Φ_bo and n ranged from 0.600 eV and 1.51(80 K) to 0.816 eV and 1.087 (320 K), respectively. Such behavior of Φ_bo and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of BHs at Au/n-GaAs interface. In the calculations, the electrical parameters of the experimental forward bias I–V characteristics of the Au/n-GaAs SBD with the homogeneity in the 80–320 K range have been explained by means of the TE, considering GD of BH with linear bias dependence.     

Electrical parameters of a DC sputtered Mo/n-type 6H-SiC Schottky barrier diode

A Mo/n-type 6H-SiC/Ni Schottky barrier diode (SBD) was fabricated by sputtering Mo metal on n-type 6H-SiC semiconductor. Before the formation of Mo/n-type 6H-SiC SBD, an ohmic contact was formed by thermal evaporation of Ni on n-type 6H-SiC and annealing at 950 °C for 10 min. It was seen that the structure had excellent rectification. The electrical parameters were extracted using its current–voltage (I–V) and capacitance–voltage (C–V) measurements carried out at room temperature. Very high (1.10 eV) barrier height and 1.635 ideality factor values were reported for Mo/n-type 6H-SiC using ln I–V plot. The barrier height and series resistance values of the diode were also calculated as 1.413 eV and 69 Ω from Norde׳s functions, respectively. Furthermore, 1.938 eV barrier height value of Mo/n-type 6H-SiC SBD calculated from C–V measurements was larger than the one obtained from I–V data.     

Electrical characterization of current conduction in Au/TiO2/n-Si at wide temperature range

In this study, we have examined Au/TiO₂/n-Si Schottky barrier diodes (SBDs), in order to interpret in detail the experimental observed non-ideal current–voltage–temperature (I–V–T) characteristics. I–V characteristics were measured in the wide temperature range of 80–400 K. TiO₂ was deposited on n-Si substrate by reactive magnetron sputtering. The zero-bias barrier height (ϕ_B0) and ideality factor (n) show strong temperature dependence. While n decreases, ϕ_B0 increases with increasing temperature. Experimental results show that the current across the SBDs may be greatly influenced by the existence of Schottky barrier height (SBH) inhomogeneity. These temperature behaviors have been explained on the basis of the thermionic emission (TE) theory with Gaussian distribution (GD) of the barrier heights (BHs) due to BH inhomogeneities at metal–semiconductor (M/S) interface. From this assumptions, obtaining Richardson constant value of the A^* 121.01 A/cm² K² is perfect agreement with the theoretical value of 120 A/cm² K² for n-type Si. Hence, behaviors of the forward-bias I–V characteristics of the Au/TiO₂/n-Si (SBDs) can be successfully explained on the basis of a TE mechanism with a double Gaussian distribution of the BHs.     

The effects of surface states and series resistance on the performance of Au/SnO2/n-Si and Al/SnO2/p-Si (MIS) Schottky barrier diodes

We have fabricated two types of Schottky barrier(SBDs),Au/SnO₂/n-Si (MIS1) and Al/SnO₂/p-Si (MIS2), to investigate the surface (N_ss) and series resistance (R_s) effect on main electrical parameters such as zero-bias barrier height (Φ_Bo) and ideality factor (n) for these SBDs. The forward and reverse bias current–voltage (I–V) characteristics of them were measured at 200 and 295 K, and experimental results were compared with each other. At temperatures of 200 and 295 K, Φ_Bo, n, N_ss and R_s for MIS1 Schottky diodes (SDs) ranged from 0.393 to 0.585 eV, 5.70 to 4.75, 5.42×10¹³ to 4.27×10¹³ eV^?1 cm^?2 and 514 to 388 Ω, respectively, whereas for MIS2 they ranged from 0.377 to 0.556 eV, 3.58 to 2.1, 1.25×10¹⁴ to 3.30×10¹⁴ eV^?1 cm^?2 and 312 to 290 Ω, respectively. The values of n for two types of SBDs are rather than unity and this behavior has been attributed to the particular distribution of N_ss and interfacial insulator layer at the metal/semiconductor interface. In addition, the temperature dependence energy density distribution profiles of N_ss for both MIS1 and MIS2 SBDs were obtained from the forward bias I–V characteristics by taking into account the bias dependence of effective barrier height (Φ_e) and R_s. Experimental results show that both N_ss and R_s values should be taken into account in the forward bias I–V characteristics. It has been concluded that the p-type SBD (MIS2) shows a lower barrier height (BH), lower R_s, n and N_ss compared to n-type SBD (MIS1), which results in higher current at both 200 and 295 K.     

Evaluation of the hydrostatic pressure effect on Mn/p-Si Schottky barrier diode electrical parameters and interface states

Mn/p-Si Schottky barrier diode (SBD) electrical parameters and interface state density have been investigated with current–voltage (I–V) characteristics and Cheung's functions employing hydrostatic pressure. The interface state density of the diodes has an exponential growth with bias from the midgap towards the top of the valance band. We have seen that the Schottky barrier height (SBH) for Mn/p-Si SBD has a pressure coefficient of 1.61 meV/kbar (16.1 meV/GPa). We have reported that the p-type barrier height exhibited a weak pressure dependence, accepting that the Fermi level at the interface do not shift as a function of the pressure.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.     

Decamethylcobaltocene as an efficient n-dopant in organic electronic materials and devices

n-Doping of copper phthalocyanine (CuPc), which has an electron affinity (EA) of 3.52 eV, by decamethylcobaltocene (DMC) is demonstrated. DMC has a remarkably low solid-state ionization energy (IE) of 3.3 eV, as measured by ultra-violet photoemission spectroscopy (UPS). Further UPS measurements show a large 1.4 eV upward shift of the Fermi-level within the single particle gap of CuPc between the p- and n-doped films. n-Doping is also confirmed by current–voltage (I–V) measurements, which show a 10⁶-fold increase in current density due to improved electron injection and enhanced conductivity of the bulk film. An organic p–i–n CuPc homojunction is also fabricated using F₄-TCNQ and DMC as p- and n-dopants, respectively. Current–voltage characteristics demonstrate excellent rectification with a turn on voltage of approximately 1.3 eV, which is consistent with the built-in voltage measured by UPS and capacitance–voltage (C–V) measurements.     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

Electrical characteristics of Pd Schottky contacts on ZnO films

The electrical characteristics of Pd Schottky contacts on ZnO films have been investigated by current-voltage (I–V) and capacitance–voltage (C–V) measurements at different temperatures. ZnO films of two thicknesses (400 nm and 1000 nm) were grown by DC-magnetron sputtering on n-Si substrates. The basic structural, optical and electrical properties of these films are also reported. We compared the two Schottky diodes by means of characteristic parameters, such as rectification ratio, ideality factor (η), barrier height (Φ_b) and series resistance and obtained better results for the 1000 nm-ZnO Schottky diodes. We also discussed the dependence of I‐V characteristics on temperature and the two distinct linear regions observed at low temperatures are attributed to the existence of two different inhomogeneous barrier heights. From I–V plots in a log-log scale we found that the dominant current-transport mechanism at large forward bias is space-charge limited current (SCLC) controlled by the presence of traps within the ZnO bandgap. The existence of such traps (deep states or interface states) is demonstrated by frequency-dependent capacitance and deep-level transient spectroscopy (DLTS) measurements.     

Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning

To achieve high performance Ge nMOSFETs it is necessary to reduce the metal/semiconductor Schottky barrier heights at the source and drain. Ni/Ge and NiGe/Ge Schottky barriers are fabricated by electrodeposition using n-type Ge substrates. Current (I)–voltage (V) and capacitance (C)–voltage (V) and low temperature I–V measurements are presented. A high-quality Schottky barrier with extremely low reverse leakage current is revealed. The results are shown to fit an inhomogeneous barrier model for thermionic emission over a Schottky barrier. A mean value of 0.57 eV and a standard deviation of 52 meV is obtained for the Schottky barrier height at room temperature. A likely explanation for the distribution of the Schottky barrier height is the spatial variation of the metal induced gap states at the Ge surface due to a variation in interfacial oxide thickness, which de-pins the Fermi level.     

Investigations on electrical characteristics and reliability properties of MOS capacitors using HfAlOx on n-GaAs substrates

Radio frequency sputtering system is employed to fabricate metal oxide semiconductor (MOS) capacitors using an ultra-thin layer of HfAlO_x dielectric deposited on n-GaAs substrates with and without a Si interface control layer incorporated in between the dielectric and the semiconductor. Measurements are performed to obtain capacitance voltage (C–V) and current voltage (I–V) characteristics for GaAs/Si/HfAlO_x and GaAs/HfAlO_x capacitors under different constant voltage and constant current stress conditions. The variation of different electrical parameters such as change in interface trap density, hysteresis voltage with various values of constant voltage stress and the dependence of flat band voltage, fractional change in gate leakage current density, etc. with stress time are extracted from the C–V and I–V data for capacitors with and without a Si interlayer. Further the trap charge density and the movement of trap centroid are investigated for various injected influences. The dielectric breakdown and reliability properties of the dielectric films are studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd ? 1350 s) is observed for HfAlO_x gate dielectric with a silicon inter-layer under the high constant voltage stress at 8 V. Compared to capacitors without a Si interlayer, MOS capacitors with a Si interlayer exhibit improved electrical and breakdown characteristics, and excellent interface and reliability properties.     

A compare of electrical characteristics in Al/p-Si (MS) and Al/C20H12/p-Si (MPS) type diodes using current–voltage (I–V) and capacitance–voltage (C–V) measurements

In this study, both the metal-semiconductor (MS) and metal-polymer-semiconductor (MPS), (Al/C₂₀H₁₂/p-Si), type Schottky barrier diodes (SBDs) were fabricated using spin coating method and they were called as D₁ and D₂ diodes, respectively. Their electrical characterization have been investigated and compared using the forward and reverse bias I–V and C–V measurements at room temperature. The main electrical parameters such as ideality factor (n), reverse saturation current (I_o), zero-bias barrier height (Φ_Bo), series (R_s) and shunt (R_sh) resistances, energy dependent profile of interface states (N_ss), the doping concentration of acceptor atoms (N_A) and depletion layer width (W_D) were determined and compared each other and literature. The rectifying ratio (RR) and leakage current (I_R) at ±3 V were found as 2.06×10³, 1.61×10⁻⁶ A and 15.7×10³, 2.75×10⁻⁷ A for D₁ and D₂, respectively. Similarly, the R_s and R_sh values of these diodes were found as 544 Ω, 10.7 MΩ and 716 Ω and 1.83 MΩ using Ohm’s Law, respectively. In addition, energy and voltage dependent profiles of N_ss were obtained using the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) and n and low-high frequency capacitance (C_LF–C_HF) methods, respectively. The obtained value of N_ss for D₂ (MPS) diode at about the mid-gap of Si is about two times lower than D₁ (MS) type diode. Experimental results confirmed that the performance in MPS type SBD is considerably high according to MS diode in the respect of lower values of N_ss, R_s and I_o and higher values of RR and R_sh.     

Dielectric characteristics of gamma irradiated Au/SnO2/n-Si/Au (MOS) capacitor

The dielectric characteristics of gamma irradiated Au/SnO₂/n-Si/Au (MOS) capacitor were studied. The MOS capacitor was irradiated by a ⁶⁰Co gamma radiation source with a dose rate of 0.69 kGy/h. The dielectric parameters such as dielectric constant (ε′), dielectric loss (ε″), loss factor (tan δ) and ac electrical conductivity (σ_ac) were calculated from the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. It is found that the C and G/ω values decrease with the increasing total dose due to the irradiation-induced defects at the interface. Also, the calculated values of ε′, ε″ and σ_ac are found to decrease with an increased radiation dose. This result indicates that the dielectric characteristics of the MOS capacitor are sensitive to gamma-ray dose.     

The source of negative capacitance and anomalous peak in the forward bias capacitance-voltage in Cr/p-si Schottky barrier diodes (SBDs)

The frequency and voltage dependence of capacitance–voltage (C–V) and conductance-voltage (G/ω−V) characteristics of the Cr/p-Si metal semiconductor (MS) Schottky barrier diodes (SBDs) were investigated in the frequency and applied bias voltage ranges of 10 kHz to 5 MHz and (−4 V)−(+4 V), respectively, at room temperature. The effects of series resistance (R_s) and density distribution of interface states (N_ss), both on C–V and G/ω−V characteristics were examined in detail. It was found that capacitance and conductance, both, are strong functions of frequency and applied bias voltage. In addition, both a strong negative capacitance (NC) and an anomalous peak behavior were observed in the forward bias C–V plots for each frequency. Contrary to the behavior of capacitance, conductance increased with the increasing applied bias voltage and there happened a rapid increase in conductance in the accumulation region for each frequency. The extra-large NC in SBD is a result of the existence of R_s, N_ss and interfacial layer (native or deposited). In addition, to explain the NC behavior in the forward bias region, we drew the C–I and G/ω−I plots for various frequencies at the same bias voltage. The values of C decrease with increasing frequency at forward bias voltages and this decrease in the NC corresponds to an increase in conductance. The values of N_ss were obtained using a Hill–Coleman method for each frequency and it exhibited a peak behavior at about 30 kHz. The voltage dependent profile of R_s was also obtained using a Nicollian and Brews methods.     

Investigation of deep level defects in electron irradiated indium arsenide quantum dots embedded in a gallium arsenide matrix

Gallium arsenide diodes with and without indium arsenide quantum dots were electron irradiated to investigate radiation induced defects. Baseline and quantum dot gallium arsenide pn-junction diodes were characterized by capacitance–voltage measurements, and deep level transient spectroscopy. Carrier accumulation was observed in the gallium arsenide quantum dot sample at the designed depth for the quantum dots via capacitance–voltage measurements. Prior to irradiation, a defect 0.84 eV below the conduction band (E_C – 0.84 eV) was observed in the baseline sample which is consistent with the native EL2 defect seen in gallium arsenide. After 1 MeV electron irradiation three new defects were observed in the baseline sample, labeled as E3 (E_C – 0.25 eV), E4 (E_C – 0.55 eV), and E5 (E_C – 0.76 eV), consistent with literature reports of electron irradiated gallium arsenide. Prior to irradiation, the addition of quantum dots appeared to have introduced defect levels at E_C – 0.21, E_C – 0.38, and E_C – 0.75 eV denoted as QD–DX1, QD–DX2, and QD–EL2 respectively. In the quantum dot sample after 1 MeV electron irradiation, QD–E3 (E_C – 0.28 eV), QD–E4 (E_C – 0.49 eV), and QD–EL2 (E_C – 0.72 eV) defects, similar to the baseline sample, were observed, although the trap density was dissimilar to that of the baseline sample. The quantum dot sample showed a higher density of the QD–E4 defect and a lower density of QD–E3, while the QD–EL2 defect seemed to be unaffected by electron irradiation. These findings suggest that the quantum dot sample may be more radiation tolerant to the E3 defect as compared to the baseline sample.     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.