Three-dimensional discrete wavelet transform architectures

The three-dimensional (3-D) discrete wavelet transform (DWT) suits compression applications well, allowing for better compression on 3-D data as compared with two-dimensional (2-D) methods. This paper describes two architectures for the 3-D DWT, called the 3DW-I and the 3DW-II. The first architecture (3DW-I) is based on folding, whereas the 3DW-II architecture is block-based. Potential applications for these architectures include high definition television (HDTV) and medical data compression, such as magnetic resonance imaging (MRI). The 3DW-I architecture is an implementation of the 3-D DWT similar to folded 1-D and 2-D designs. It allows even distribution of the processing load onto 3 sets of filters, with each set performing the calculations for one dimension. The control for this design is very simple, since the data are operated on in a row-column-slice fashion. Due to pipelining, all filters are utilized 100% of the time, except for the start up and wind-down times. The 3DW-II architecture uses block inputs to reduce the requirement of on-chip memory. It has a central control unit to select which coefficients to pass on to the lowpass and highpass filters. The memory on the chip will be small compared with the input size since it depends solely on the filter sizes. The 3DW-I and 3DW-II architectures are compared according to memory requirements, number of clock cycles, and processing of frames per second. The two architectures described are the first 3-D DWT architectures     

The recursive pyramid algorithm for the discrete wavelet transform

The recursive pyramid algorithm (RPA) is a reformulation of the classical pyramid algorithm (PA) for computing the discrete wavelet transform (DWT). The RPA computes the N-point DWT in real time (running DWT) using just L(log N-1) words of storage, as compared with O(N) words required by the PA. L is the length of the wavelet filter. The RPA is combined with the short-length FIR filter algorithms to reduce the number of multiplications and additions     

基于离散小波变换的网络流量多重分形模型

网络流量过程中所蕴含的分形尺度特性对网络性能有显著的影响。因此研究能全面准确地刻画网络流量过程在小时间／空间尺度上的复杂奇异性特征和大时间／空间尺度上的长程依赖性特征的流量模型对Internet网络工程有重要的意义。本文对实测的流量数据(从著名的校园网和国内著名的ISP)进行了分析，利用小波技术构建了一个新的网络流量的多重分形模型，通过模拟验证，发现该新模型能以较简洁的形式捕捉实际网络流量特性，并具有刻画真实流量数据中的多重分形特征的能力。     

Combining the discrete wavelet transform and mixed-domain filtering

A novel filtering method is proposed that combines the discrete orthogonal wavelet transform (DWT) with the mixed-domain (mixed-D) filtering method. The method uses the DWT to pre- and postprocess those dimensions of the signal that are transformed to the discrete-frequency domain by mixed-D filtering. Using the DWT in this manner provides a controlled mechanism to partition the spectrum of the input signal into subband signals, which then may be selectively filtered during the linear difference equation (LDE) step of the mixed-D algorithm. It is shown that, when the DWT is computed using filters with ideal high- and lowpass frequency responses, the LDE filters used in the mixed-D filtering stage are unchanged by the introduction of the DWT (although the frequency tuple associated with each LDE filter is altered). This indicates that the mixed-D filtering scheme can be easily used in subband coding systems. Results are given for the filtering of a three-dimensional (3-D) linear trajectory signal, representing a common application in video processing.     

VLSI implementation of discrete wavelet transform

This paper presents a VLSI implementation of discrete wavelet transform (DWT). The architecture is simple, modular, and cascadable for computation of one or multidimensional DWT. It comprises of four basic units: input delay, filter, register bank, and control unit. The proposed architecture is systolic in nature and performs both high- and low-pass coefficient calculations with only one set of multipliers. In addition, it requires a small on-chip interface circuitry for interconnection to a standard communication bus. A detailed analysis of the effect of finite precision of data and wavelet filter coefficients on the accuracy of the DWT coefficients is presented. The architecture has been simulated in VLSI and has a hardware utilization efficiency of 87.5%. Being systolic in nature, the architecture can compute DWT at a data rate of N×10⁶ samples/s corresponding to a clock speed of N MHz     

The discrete wavelet transform for a symmetric-anti symmetric multiwavelet family on the interval

The Chui-Lian multiwavelet family of approximation order three is extended to serve as a basis for an orthogonal discrete multiwavelet transform on the interval. This requires, in addition to the original symmetric and antisymmetric pairs of scaling functions and wavelets, four new functions of each type at each edge of the interval, i.e., one more than required just to preserve the approximation order. The criteria are given that such edge functions must satisfy in order to allow multiresolution analysis of data sequences without special constraints on endpoint behavior or use of periodic boundary conditions, and a specific choice is examined in applications to both noiseless and noisy data. These are accomplished through the development of interval-basis extensions for both an earlier multiwavelet projection-based prefilter/postfilter combination and a multiwavelet vector thresholding algorithm.     

Image coding using dual-tree discrete wavelet transform

In this paper, we explore the application of 2-D dual-tree discrete wavelet transform (DDWT), which is a directional and redundant transform, for image coding. Three methods for sparsifying DDWT coefficients, i.e., matching pursuit, basis pursuit, and noise shaping, are compared. We found that noise shaping achieves the best nonlinear approximation efficiency with the lowest computational complexity. The interscale, intersubband, and intrasubband dependency among the DDWT coefficients are analyzed. Three subband coding methods, i.e., SPIHT, EBCOT, and TCE, are evaluated for coding DDWT coefficients. Experimental results show that TCE has the best performance. In spite of the redundancy of the transform, our DDWT _ TCE scheme outperforms JPEG2000 up to 0.70 dB at low bit rates and is comparable to JPEG2000 at high bit rates. The DDWT _TCE scheme also outperforms two other image coders that are based on directional filter banks. To further improve coding efficiency, we extend the DDWT to an anisotropic dual-tree discrete wavelet packets (ADDWP), which incorporates adaptive and anisotropic decomposition into DDWT. The ADDWP subbands are coded with TCE coder. Experimental results show that ADDWP _ TCE provides up to 1.47 dB improvement over the DDWT _TCE scheme, outperforming JPEG2000 up to 2.00 dB. Reconstructed images of our coding schemes are visually more appealing compared with DWT-based coding schemes thanks to the directionality of wavelets.     

基于小波变换和离散余弦变换的fisher脸识别

本文结合几种现有的人脸识别特征提取算法,先对人脸图像进行小波分解去噪;然后通过离散余弦变换对低频分量作进一步特征提取和压缩,保留人脸图像中对光照、姿态、表情变化不敏感的识别信息;接着利用PCA和LDA相结合得到最终的识别特征;最后采用欧式距离和最近邻分类器识别人脸。实验采用ORL标准人脸库验证了这种组合的有效性。     

Enhanced localized computerized tomography employing the discrete wavelet transform

A new localized computerized tomography technique based on the multiresolution analysis (MRA) implementation of the discrete wavelet transform is proposed. Our technique is based upon viewing the projection data as a set of one-dimensional functions of the space variablet and decomposing each one into an approximation signal and a set of detail signals using MRA. The approximation signal and detiil signals associated with each projection are filtered using the ramp filter || of the standard reconstruction technique filtered back projection to generate the set of filtered projections. It is shown that only a very sparse set of projection data outside of the region of interest (ROI) is required to reconstruct a high-quality image of the ROI and a reasonable image outside of the ROI. Simulation results using the Shepp-Logan head phantom are presented to demonstrate the proposed technique.     

基于小波变换的硬拷贝全息水印

提出一种基于离散小波变换的硬拷贝数字全息水印方法。首先利用共轭对称延拓傅里叶计算全息生成水印全息图;然后对其进行小波分解,将包含全部水印信息的高频分量嵌入到载体图像小波分解的中频区域以实现信息隐藏。由于全息图的频谱可控性和不可撕毁性,本文全息水印方法具有很好的不可见性,可以实现水印盲提取,不仅能够抵抗剪切、噪声、滤波和...     

Fast text location based on discrete wavelet transform

The paper describes a texture-based fast text location scheme which operates directly in the Discrete Wavelet Transform (DWT) domain. By the distinguishing texture characteristics encoded in wavelet transform domain, the text is fast detected from complex background images stored in the compressed format such as JPEG2000 without full decompress. Compared with some traditional character location methods, the proposed scheme has the advantages of low computational cost, robust to size and font of characters and high accuracy. Preliminary experimental results show that the proposed scheme is efficient and effective.     

Direction-adaptive discrete wavelet transform for image compression.

We propose a direction-adaptive DWT (DA-DWT) that locally adapts the filtering directions to image content based on directional lifting. With the adaptive transform, energy compaction is improved for sharp image features. A mathematical analysis based on an anisotropic statistical image model is presented to quantify the theoretical gain achieved by adapting the filtering directions. The analysis indicates that the proposed DA-DWT is more effective than other lifting-based approaches. Experimental results report a gain of up to 2.5 dB in PSNR over the conventional DWT for typical test images. Subjectively, the reconstruction from the DA-DWT better represents the structure in the image and is visually more pleasing.     

FPGA implementation for 2D discrete wavelet transform

An operator correlation-based algorithm and its VLSI architecture For computing the 2D discrete wavelet transform is presented. The proposed discrete wavelet transform architecture was simulated in Verilog and synthesised with the FPGA compiler. The implementation for the 2D discrete wavelet transform on an FPGA-based design style is described     

小波变换和菲涅耳变换的多彩色图像加密

为了解决多彩色图像加密后,解密图像质量不佳、数据量大以及传输时速率慢的问题,采用了一种基于小波变换和菲涅耳变换的多彩色图像加密方法,加密过程中,利用小波变换的多级分解特性提取每幅彩色图像的低频分量,将低频分量分别重组为三元组图像（R,G和B）,并且依次将三元组图像（R,G和B）通过菲涅耳域中的衍射加密系统,对这3个三元组图像进一步加密,从而实现了多彩色图像的加密。结果表明,该方法不仅可以高质量地恢复原始彩色图像,而且可以同时对4幅彩色图像进行加密,提高了加密彩色图像的容量;原始图像经过小波变换,其数据量压缩到原来的1/4,有利于数据的传输和存储。该算法能够有效地同时对多幅色彩图像进行压缩和加密,不仅提高了解密图像的质量,并且具有较高的密钥敏感度和较好的鲁棒性。     

The discrete wavelet transform and the scale analysis of thesurface properties of sea ice

The formalism of the one-dimensional discrete wavelet transform (DWT) based on Daubechies wavelet filters is outlined in terms of finite vectors and matrices. Both the scale-dependent wavelet variance and wavelet covariance are considered and confidence intervals for each are determined. The variance estimates are more accurately determined with a maximal-overlap version of the wavelet transform. The properties of several Daubechies wavelet filters and the associated basis vectors are discussed. Both the Mallat orthogonal-pyramid algorithm for determining the DWT and a pyramid algorithm for determining the maximal-overlap version of the transform are presented in terms of finite vectors. As an example, the authors investigate the scales of variability of the surface temperature and albedo of spring pack ice in the Beaufort Sea. The data analyzed are from individual lines of a Landsat TM image (25-m sample interval) and include both reflective (channel 3, 30-m resolution) and thermal (channel 6, 120-m resolution) data. The wavelet variance and covariance estimates are presented and more than half of the variance is accounted for by scales of less than 800 m. A wavelet-based technique for enhancing the lower-resolution thermal data using the reflected data is introduced. The simulated effects of poor instrument resolution on the estimated lead number density and the mean lead width are investigated using a wavelet-based smooth of the observations     

Drift controlled scalable wavelet based video coding in the overcomplete discrete wavelet transform domain

Traditional video coders use the previous frame to perform motion estimation and compensation. Though they are less complex and have minimum coding delays, these coders lose their efficiency when subjected to scalability requirements. Recent 3D wavelet coders using lifting schemes offer high compression efficiency and scalability without significant loss in performance. The main drawback of 3D coders is that they process several frames at a time. This introduces additional delay, which makes them less suitable for real time applications.In this work, we propose a novel scheme to minimize drift in scalable wavelet based video coding, which gives a balanced performance between compression efficiency and reconstructed quality with less drift. Our drift control mechanism maintains two frame buffers in the encoder and decoder; one that is based on the base layer and one that is based on the base plus enhancement layers. Drift control is achieved by switching between these two buffers for motion estimation and compensation. Our prediction is initially based on the base plus enhancement layers buffer, which inherently introduces drift in the system if a part of the enhancement layer is not available at the receiver. A measure of drift is computed based on the channel information and a threshold is set. When the measure exceeds the threshold, i.e., when drift becomes significant, we switch the prediction to be based on the base layer buffer, which is always available to the receiver. We also developed an adaptive scheme with additional computation overhead at the encoder to decide the switching instance. The performance of the threshold case that needs fewer computations is comparable with the adaptive scheme. Our coder offers high compression efficiency and sustained video quality for variable bit rate wireless channels. This proves that we need not completely eliminate drift and decrease compression efficiency to get better received video quality.     

Reusable silicon IP cores for discrete wavelet transform applications

Architectures and methods for the rapid design of silicon cores for implementing discrete wavelet transforms over a wide range of specifications are described. These architectures are efficient, modular, scalable, and cover orthonormal and biorthogonal wavelet transform families. They offer efficient hardware utilization by exploiting a number of core wavelet filter properties and allow the creation of silicon designs that are highly parameterized, including in terms of wavelet type and wordlengths. Control circuitry is embedded within these systems allowing them to be cascaded for any desired level of decomposition without any interface glue logic. The time to produce chip designs for a specific wavelet application is typically less than a day and these are comparable in area and performance to handcrafted designs. They are also portable across a wide range of silicon foundries and suitable for field programmable gate array and programmable logic data implementation. The approach described has also been extended to wavelet packet transforms.     

Simplified biorthogonal discrete wavelet transform for VLSI architecture design

Biorthogonal discrete wavelet transform (BDWT) has gained general acceptance as an image processing tool. For example, the JPEG2000 standard is completely based on the BDWT. In BDWT, the scaling (low-pass) and wavelet (high-pass) filters are symmetric and linear phase. In this work we show that by using a specific sign modulator the BDWT filter bank can be realized by only two biorthogonal filters. The analysis and synthesis parts use the same scaling and wavelet filters, which simplifies especially VLSI designs of the biorthogonal DWT/IDWT transceiver units. Utilizing the symmetry of the scaling and the wavelet filters we introduce a fast convolution algorithm for implementation of the filter modules. In multiplexer–demultiplexer VLSI applications both functions can be constructed via two running BDWT filters and the sign modulator. This work was supported by the National Technology Agency of Finland (TEKES).     

Memory-efficient high-speed VLSI implementation of multi-level discrete wavelet transform

Memory requirements and critical path are essential for 2-D Discrete Wavelet Transform (DWT). In this paper, we address this problem and develop a memory-efficient high-speed architecture for multi-level two-dimensional DWT. First, dual data scanning technique is first adopted in 2-D 9/7 DWT processing unit to perform lifting operations, which doubles the throughputs per cycle. Second, for 2-D DWT architecture, the proposed Row Transform Unit and Column Transform Unit take advantage of input sample availabilities and provision computing resources accordingly to optimize the processing speed, in which the number of processors is further optimized to significantly reduce the hardware cost. Third, to address the problem of high cost of memory for the immediate computing results from each level and the computation time as resolution level increases, multiple proposed 2-D DWT units were combined to build a parallel multi-level architecture, which can perform up to six levels of 2-D DWT in a resolution level parallel way on any arbitrary image size at competitive hardware cost. Experimental results demonstrated that the proposed scheme achieves improved hardware performance with significantly reduced on-chip memory resource and computational time, which outperforms the-state-of-the-art schemes and makes it desirable in memory-constrained real-time application systems.