A preliminary study of SF6 based inductively coupled plasma etching techniques for beta gallium trioxide thin film

Beta phase Gallium trioxide (β-Ga₂O₃) thin film was grown by metal organic chemical vapor deposition technology. Mixture gases of SF₆ and Ar were used for dry etching of β-Ga₂O₃ thin film by inductively coupled plasma (ICP). The effect of SF₆/Ar (etching gas) ratio on etch rate and film etching damage was studied. The etching rate and surface roughness were measured using F20-UN thin film analyzer and atomic force microscopy showing that the etching rate in the range between 30 nm/min and 35 nm/min with an improved surface roughness was obtained when the reactive mixed gas of SF₆/Ar was used. The analysis of X-ray diffraction and transmission spectra further confirmed the non-destructive crystal quality. This work demonstrates that the properly proportioned mixture gases of SF₆/Ar is suitable for the dry etching of β-Ga₂O₃ thin film by ICP and can serve as a guide for future β-Ga₂O₃ device processing.     

Inductively coupled plasma reactive ion etching of sapphire using C2F6- and NF3-based gas mixtures

Inductively coupled plasma reactive ion etching (ICP-RIE) of sapphire wafers using C₂F₆- and NF₃-based plasma was investigated as a function of ICP power, bias power, pressure, and plasma chemistry. Etch rate of about 150 nm/min in the case of C₂F₆ plasma and about 260 nm/min in the case of NF₃ plasma was obtained at the optimum condition, with anisotropic profiles and smooth surfaces. No chamber corrosion was observed after the etching, indicating that ICP-RIE using the fluorine-related gases is a promising technique for sapphire patterning.     

Photoluminescence of phosphorous doped Ge on Si (100)

Photoluminescence (PL) of selectively grown phosphorus (P) doped germanium (Ge) is investigated. 350–600 nm thick P-doped Ge is grown on 100 nm thick P-doped Ge buffer layer, which is annealed at 800 °C before the main part of Ge deposition. In the case of Ge deposited at 325 °C, approximately two times higher PL intensity is observed by P doping of ~3.2×10¹⁹ cm⁻³. Further increase of PL intensity by a factor of 1.5 is observed by increasing the growth temperature from 325 °C to 400 °C due to improved crystal quality. Varying PH₃ partial pressure at 400 °C, red shift of the PL occurred with increasing P concentration due to higher bandgap narrowing. With increasing P concentration up to ~1.4×10¹⁹ cm⁻³ at 400 °C the PL peak intensity increases by filling electrons into the L valley and decreases due to enhanced point defect concentration and degraded crystallinity. By post-annealing at 500–800 °C, the PL intensity is further increased by a factor of 2.5 because of increased active P concentration and improved crystal quality. Reduced direct bandgap energy by introducing tensile strain is also observed.     

Deep dry etching of borosilicate glass using SF6 and SF6/Ar inductively coupled plasmas

Deep reactive ion etching (DRIE) of borosilicate glass was carried out using SF₆ and SF₆/Ar plasmas in an inductively coupled plasma (ICP) reactor. Electroplated Ni on Cu (≅50 nm)/Cr (≅100 nm)/glass structure using patterned SU-8 photoresist mask with a line spacing of 12-15 μm was used as a hard-mask for plasma etching. Plasma etching of borosilicate glass was performed by varying the various process parameters such as the gas chemistry, the gas flow ratio, the top electrode power, and the dc self-bias voltage (V_dc). In the case of using SF₆ gas only, the profiles of the etched channel showed the undercut below the Ni hard-mask due to a chemical etching and the microtrenching at the bottom of the etched channel. An optimized process using the SF₆ plasmas showed the glass etch rate of ≅750 nm/min. The addition of the Ar gas to the SF₆ gas removed the undercut and microtrenching but decreased the etch rate to ≅540 nm/min. The increasing and decreasing time-dependent etch rates with the etch depth in the SF₆ (200 sccm) and SF₆(60%)/Ar(40%) plasmas, respectively, were ascribed to the different ion-to-neutral flux ratios leading to the different etch process regime.     

Structural and electrical properties of ultra-thin high-k ZrO2 film on nitride passivated Ge(100) prepared by PEALD

The study of ultrathin ZrO₂ films grown on surface passivated germanium substrates by plasma enhanced Atomic Layer Deposition (PEALD) has been carried out. Nitride passivation has been used to form an interfacial layer between ZrO₂/Ge. The ultra-thin ZrO₂ film deposited with thickness of ~5.75 nm and refractive index of ~2.05 as observed through ellipsometry. The Ge3d, Zr3d, N1s and O1s are XPS core level spectra's confirm the formation of GeON and ZrO₂ ultra-thin films. The AFM results show the roughness of deposited films as low as 0.3 nm. The effect of post metallization annealing (PMA) on electrical properties of Au/Cr/ZrO₂/GeON/Ge capacitors has been investigated. The improvement in k value (~38) and an EOT value (~0.5 nm) after PMA on Ge/GeON/ZrO₂ stack has been observed. The flat band voltage and hysteresis of post metallization annealed devices has been reduced as compared to that of without PMA GeON/ZrO₂ stack.     

Comprehensive effects of strained Ge1−xSnx and device layout arrangement on a nano-scale Ge-based PMOSFET with a short channel

Layout patterns, including salient gate width and dummy active diffusion region (dummy OD), significantly influence the carrier mobility gain of nano scale devices. Germanium (Ge)-based devices with Ge–tin (GeSn) alloy embedded in the source/drain (S/D) regions have been regarded a promising candidate for higher channel mobility. Second-order piezoresistance coefficients were used to estimate the carrier mobility gain within the desired Ge-based device channel. A 20 nm Ge-based p-type metal oxide semiconductor field effect transistor with 100 nm gate width and 100 nm dummy OD width was selected to explore the layout effect of the short channel device. The device consisted of S/D region Ge_1−xSn_x alloy, compressive-stressed contact etch stop layer, and deposited shallow trench isolation with different process-induced stress magnitudes. Maximum carrier mobility gain of 93.65% was obtained when a 10 nm narrow distance between OD and dummy OD was achieved.     

Performance analysis of nanoscale GeSn MOSFETs for mixed-mode circuit applications

Using extensive numerical analysis we investigate the impact of Sn ranging 0–6% in compressively strained GeSn on insulator (GeSnOI) MOSFETs for mixed-mode circuit performance at channel lengths (L_g) ranging 100–20 nm with channel thickness values of 10 and 5 nm. Our results reveal that 10 nm thick Ge_0.94Sn_0.06 channel MOSFETs produce improvement of peak transconductance g_m, peak gain Av, peak cut-off frequency f_T and maximum frequency of oscillations f_max by 80.5%, 18.8%, 83.5% and 81.7%, respectively compared with equivalent GeOI device at L_g =20 nm. Furthermore, such devices exhibit 78.8% increase in ON-current I_ON while yield 44.5% reduction in delay as compared to Ge control devices enabling them attractive for logic applications. Thinning of the channel thickness from 10 to 5 nm increases peak Av, peak transconductance efficiency and reduces output conductance and OFF-current I_OFF while degrading other parameters in all GeSnOI and control Ge devices.     

Growth of a Ge layer on 8 in. Si (100) substrates by rapid thermal chemical vapor deposition

We have made the successful growth of Ge layer on 8 in. Si (100) substrates by rapid thermal chemical vapor deposition (RTCVD). In order to overcome the large lattice mismatch between Ge and Si, we used a two-step growth method. Our method shows the uniformity of the thickness and good quality Ge layer with a homogeneous distribution of tensile strain and a lower etch pit density (EPD) in order of 10⁵ cm⁻². The surface morphology is very smooth and the root mean square (RMS) of the surface roughness was 0.27 nm. The photocurrent spectra were dominated by the Ge layer related transition that corresponding to the transitions of the Si and Ge. The roll-off in photocurrent spectra beyond 1600 nm is expected due to the decreased absorption of Ge.     

Interface studies of ALD-grown metal oxide insulators on Ge and III–V semiconductors (Invited Paper)

Atomic layer deposited (ALD) HfO₂/GeO_xN_y/Ge(1 0 0) and Al₂O₃/In_0.53Ga_0.47As(1 0 0) ? 4 × 2 gate stacks were analyzed both by MOS capacitor electrical characterization and by advanced physical characterization to correlate the presence of electrically-active defects with chemical bonding across the insulator/channel interface. By controlled in situ plasma nitridation of Ge and post-ALD annealing, the capacitance-derived equivalent oxide thickness was reduced to 1.3 nm for 5 nm HfO₂ layers, and mid-gap density of interface states, D_it = 3 × 10¹¹ cm^?2 eV^?1, was obtained. In contrast to the Ge case, where an engineered interface layer greatly improves electrical characteristics, we show that ALD-Al₂O₃ deposited on the In_0.53Ga_0.47As (1 0 0) ? 4 × 2 surface after in situ thermal desorption in the ALD chamber of a protective As cap results in an atomically-abrupt and unpinned interface. By avoiding subcutaneous oxidation of the InGaAs channel during Al₂O₃ deposition, a relatively passive gate oxide/III–V interface is formed.     

Influence of the Germanium content on the amorphization of silicon–germanium alloys during ion implantation

We have studied by transmission electron microscopy the amorphization of silicon–germanium (SiGe) alloys by Ge⁺ implantation. We show that when implanted with the same amorphization dose, the resulting amorphous layers get narrower when the Ge content increases. The experimental results can be simulated using the critical damage energy density model assuming that the amorphization threshold rises linearly with the Ge content from 3 eV/at for pure Si to 5 eV/at for pure Ge. These results and simulations are needed to optimize the fabrication of highly doped regions in SiGe alloys.     

A study of the role of HBr and oxygen on the etch selectivity and the post-etch profile in a polysilicon/oxide etch using HBr/O2 based high density plasma for advanced DRAMs

The role of HBr and oxygen on the etch selectivity and the post-etch profile in a polysilicon/oxide etch using HBr/O₂ based high density plasma was studied. HBr/O₂-based polysilicon etch process used in this study seems to be highly selective to the underlying oxide and produce a dielectric fill-friendly post-etch profile depending on the flow rates of HBr and oxygen. When appropriate amounts of HBr and oxygen (∼30 sccm of HBr and ∼3 sccm of oxygen) are present in the etch plasma, brominated silicon oxide seems to be deposited on the original gate oxide and the gate stack sidewall from the reaction of SiBr_x (reaction product during polysilicon etch step) and oxygen during the HBr/O₂-based oxide etch process. The deposited brominated oxide on the thin gate oxide seems to make the HBr/O₂-based plasma etch process extremely selective to the thin gate oxide by protecting the underlying gate oxide. The deposited brominated oxide on the gate stack sidewall seems to prevent the notching by protecting the sidewall during gate stack etching. The etch rate of the brominated oxide seems to be much faster than that of the thermal oxide during the 200:1 diluted HF cleaning. However, the deposited brominated oxide on the thin gate oxide and the gate stack sidewall during the plasma etching survived the following 1 min 200:1 diluted HF cleaning, as was observed in a TEM micrograph (Fig. 2(a)).     

Inductively coupled plasma etchingof in-based compound semiconductorsin CH4/H2/Ar

Inductively coupled plasma etching of InP, InSb, InGaAs, InGaP and InGaAsP was performed in CH₄/H₂/Ar plasmas as a function of CH₄-to-H₂ ratio ICP source power and rf chuck power. Etch rates as high as 6,000 Å×min⁻¹ were obtained for InP, but the surface is extremely rough (>70 nm root-mean-square roughness) under all conditions due to preferential loss of P. Optical emission spectroscopy shows efficient H₂ dissociation at even moderate ICP source powers, leading to the preferential group V loss. By contrast ternary and quaternary materials show excellent morphologies over a wide range of plasma conditions.     

Germanium on sapphire by wafer bonding

This paper describes the creation of a germanium on sapphire platform, via wafer bonding technology, for system-on-a-chip applications. Similar thermal coefficients of expansion between germanium (5.8 × 10^?6 K^?1) and sapphire (5 × 10^?6 K^?1) make the bonding of germanium to sapphire a reality. Germanium directly bonded to sapphire results in microvoid generation during post bond annealing. Inclusion of an interface layer such as silicon dioxide layer by plasma enhanced chemical vapour deposition, prior to bonding, results in a microvoid free bond interface after annealing. Grinding and polishing of the subsequent germanium layer has been achieved leaving a thick germanium on sapphire (GeOS) substrate. Submicron GeOS layers have also been achieved with hydrogen/helium co-implantation and layer transfer. Circular geometry transistors exhibiting a field effect mobility of 890 cm²/V s have been fabricated onto the thick germanium on sapphire layer.     

Characterization of n-type Ge layers on Si (100) substrates grown by rapid thermal chemical vapor deposition

Phosphorus-doped n-type Ge layers were grown on p-type Si (100) wafers (8 in. in diameter, resistivity 5–15 Ω cm) using rapid thermal chemical vapor deposition (RTCVD). The surface morphology was very smooth, with a root mean square (RMS) surface roughness of 0.29 nm. The in-plane lattice constant calculated from high-resolution X-ray diffraction (HR-XRD) data was 0.5664 nm, corresponding to in-plane tensile strain of ～0.47%. The Raman Ge peak for each location indicates tensile strain from the Ge wafer. We estimated the in-plane strain as tensile strain of ～0.45%, in excellent agreement with the XRD analysis. Initial photocurrent spectrum experiments on the sample confirm valence band splitting of the direct gap induced by tensile strain. The temperature dependence of the direct bandgap energy E_Γ1 of Ge can be described by the empirical Varshni expression E_Γ1(T)=0.864–5.49×10^–4T ²/(T+296).     

Influence of crystallinity of as-deposited Ge film on formation of quantum dot in carbon-mediated solid-phase epitaxy

The influence of crystallinity of as-deposited Ge films on Ge quantum dot (QD) formation via carbon (C)-mediated solid-phase epitaxy (SPE) was investigated. The samples were fabricated by solid-source molecular beam epitaxy (MBE). Ge/C/Si structure was formed by sequential deposition of C and Ge at deposition temperature (T_D) of 150–400 °C, and it was heat-treated in the MBE chamber at 650 °C. In the case of amorphous or a mixture of amorphous and nano-crystalline Ge film grown for T_D ≤250 °C, density of QDs increased with increasing T_D due to the increase of C-Ge bonds in Ge layer. Ge QDs with diameter of 9.2±2.1 nm were formed in the highest density of 8.3×10¹¹ cm⁻² for T_D =250 °C. On the contrary, in the case of polycrystalline Ge film for T_D ≥300 °C, density of QDs decreased slightly. This is because C incorporation into Ge layer during SPE was suppressed due to the as-crystallized columnar grains. These results suggest that as-deposited Ge film in a mixture of amorphous and nano-crystalline state is suitable to form small and dense Ge QDs via C-mediated SPE.     

Ultra-low-energy ion-beam-synthesis of Ge nanocrystals in thin ALD Al2O3 layers for memory applications

Structural and electrical properties of ALD-grown 5 and 7 nm-thick Al₂O₃ layers before and after implantation of Ge ions (1 keV, 0.5–1 × 10¹⁶ cm^?2) and thermal annealing at temperatures in the 700–1050 °C range are reported. Transmission Electron Microscopy reveals the development of a 1 nm-thick SiO₂-rich layer at the Al₂O₃/Si substrate interface as well as the formation of Ge nanocrystals with a mean diameter of ～5 nm inside the implanted Al₂O₃ layers after annealing at 800 °C for 20 min. Electrical measurements performed on metal–insulator–semiconductor capacitors using Ge-implanted and annealed Al₂O₃ layers reveal charge storage at low-electric fields mainly due to location of the Ge nanocrystals at a tunnelling distance from the substrate and their spatial dispersion inside the Al₂O₃ layers.     

105 nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200 mm GeOI wafers

We report on the fabrication and electrical characterization of deep sub-micron (gate length down to 105 nm) GeOI pMOSFETs. The Ge layer obtained by hetero-epitaxy on Si wafers has been transferred using the Smart Cut^TM process to fabricate 200 mm GeOI wafers with Ge thickness down to 60–80 nm. A full Si MOS compatible pMOSFET process was implemented with HfO₂/TiN gate stack. The electrical characterization of the fabricated devices and the systematic analysis of the measured performances (I_ON, I_OFF, transconductance, low field mobility, S, DIBL) demonstrate the potential of pMOSFET on GeOI for advanced technological nodes. The dependence of these parameters have been analyzed with respect to the gate length, showing very good transport properties (μ_h ～ 250 cm²/V/s, I_ON = 436 μA/μm for L_G = 105 nm), and OFF current densities comparable or better than those reported in the literature.     

Low-temperature formation of self-assembled Ge quantum dots on Si(100) under high carbon mediation via solid-phase epitaxy

CMOS-compatible low-temperature formation of self-assembled Ge quantum dots (QDs) by carbon (C) mediation via a solid-phase epitaxy (SPE) has been demonstrated. The samples were prepared by a solid-source molecular beam epitaxy (MBE) system. C and Ge were successively deposited on Si(100) at 200 °C and Ge/C/Si heterostructure was annealed in the MBE chamber. Sparse Volmer-Weber mode Ge dots without a wetting layer were formed for C coverage (θ_C) of 0.25 and 0.5 ML by lowering SPE temperature (T_S) to 450 °C, but small and dense Stranski-Krastanov (SK)-mode Ge QDs with the wetting layer were obtained with increasing C coverage of 0.75 ML even at 450 °C. From the investigation of SPE temperature effect on Ge QD formation for θ_C of 0.75 ML, SK-mode Ge QDs of about 10 nm in diameter and of about 4.5×10¹¹ cm⁻² in density were formed at T_S≥400 °C. The wetting layer of SK-mode QDs was almost constant 0.2-nm thick at T_S≥450 °C. Measurements of chemical binding states of C in Ge QDs and at Ge/Si interface revealed that a large amount of C–Ge bonds were formed in the wetting layer for high C coverage, and the formation of C–Ge bonds, together with the formation of C–Si bonds, enabled the low-temperature formation of small and dense Ge QDs. These results suggest that the C-mediated solid-phase epitaxy is effective to form small and dense SK-mode QDs at low temperature.     

Effect of different sputtering gas mixtures on the structural,electrical, and optical properties of p-type NiO thin films

We investigated how mixtures of Ar and O₂ or N₂ gases affect the structural, electrical and optical properties of RF-magnetron-sputtered NiO films. It is shown that the addition of O₂ gas to Ar ambient (namely, Ar:O₂=2:1 to 1:2) slightly reduces the (2 0 0) texturing of the NiO films. The introduction of N₂ gas (from 0 to 2 sccm) to Ar:O₂ (2:1) mixture enhances the (2 0 0) texturing, while the addition of N₂ gas (from 0 to 2 sccm) to Ar ambient slightly weakens the (1 1 1) texturing. The deposition rate is reduced from 6.1 to 1.5 nm/min when O₂ gas is added to Ar ambient. The addition of N₂ gas to the Ar:O₂ (2:1) mixture slightly increases the deposition rate from 1.8 to 2.6 nm/min, whereas adding N₂ gas to Ar only ambient somewhat reduces the rate from 6.1 to 4.4 nm/min. The carrier concentration of the films is increased and the mobility is decreased as the O₂ flow rate in the Ar:O₂ mixture is increased. The addition of N₂ gas to the Ar:O₂ (2:1) mixture increases the resistivity of the films, while adding N₂ gas to Ar ambient decreases the resistivity. The transmittance and optical bandgap of the films are reduced (from 58.4 to 45.5% at 550 nm and from 3.5 to 3.3 eV, respectively) with increasing O₂ flow to Ar ambient. When N₂ gas is added to the Ar:O₂ (2:1) mixture, the transmittance in the visible wavelength range increases from 58.4 to 71.3% and the optical bandgap increases from 3.5 to 3.6 eV. However, adding N₂ gas to the Ar only ambient results in decrease in the transmittance in the visible wavelength region (from 69.3 to 56%) and the optical bandgap (from 3.7 to 3.5 eV).     

Thin films of silica imbedded silicon and germanium quantum dots by solution processing

Hydrophilic silicon (0.9 nm) and germanium (2.7 nm) quantum dots (QDs), synthesized utilizing micelles to control particle size, were coated with silica using liquid phase deposition. The use of dodecyltrimethylammonium bromide as a surfactant yielded uniform spheres (Si@SiO₂=57 nm; Ge@SiO₂=32 nm), which could then be arrayed in three dimensions using a vertical deposition method on quartz plates. The silica coated QDs were characterized by UV–visible spectroscopy, X-ray photoelectron spectroscopy, atomic force microscopy, and transmission electron microscopy. The thin films were characterized by UV–visible spectroscopy, scanning electron microscopy, and the measurement of a photocurrent.