带LCD驱动的三相多费率电度表芯片-SA9110A的原理与应用

SA9110A是SAMES公司推出的新型三相多费率（分时计费）电度表芯片。它内部集成了三相电能测量所需的电压/电流检测、A/D转换器、功率计算、LCD驱动等功能电路，因此，该芯片外接少量元件即可构成一个三相多费率电能表，文中给出了SA9110A的原理、特性及应用电路。     

一种带正序、负序、逆序显示功能的三相相序检测电路

设计了一种新颖的自带正序、负序、逆序显示功能的三相相序检测电路,介绍了三相相序检测的原理与方法,给出了三相相序检测的数学模型、算法分析和仿真电路。     

基于Multisim的三相电路仿真分析

在生产与生活中三相电路的应用最为广泛，针对三相电路运行工况的实验就显得重要而且必然，然而实际的三相电路实验不仅危险性较大，而且一些故障性试验较难进行。电路仿真软件Multisim提供了适用于三相电路仿真的各种元件模型及分析工具，利用该软件对三相电路的3种不对称短路故障进行了仿真分析，与理论分析比较的结果表明仿真软件效果理想。通过虚拟实验分析了负载变化对三相电路的影响，从而得出了照明线路为保持各相电压不变一般采用三相四线制的结论。两组实验表明利用Muttisim可以方便快捷地对三相电路进行各种实验分析。优点明显．适合在电工实验中推广。     

单极变换技术在通信电源中的应用

介绍一种新的实现三相有源功率因数校正电路一单极变换电路，本介绍的单级变换电路具有功率因数校正与DC／DC变换两个电路的功能，该主电路的特点是结构简单，工作可靠。     

采用三相交流电源的低功耗绝热时序电路

研究采用三相交流电源的绝热时序电路.首先介绍了采用三相交流电源的双传输门绝热电路并分析其工作原理，在此基础上提出了性能良好的低功耗绝热D、T与JK触发器.使用绝热触发器设计时序系统的实例被演示.SPICE程序模拟表明，设计的电路具有正确的逻辑功能及低功耗的优点。     

基于DSP的三相PWM整流器控制系统设计

结合三相电压型PWM整流器的数学模型，引入三相电源电压前馈补偿，提出三相电流解耦的双闭环PI调节控制方法。根据控制系统响应速度快、保护功能强的要求，设计了以TMs320LF2407A为核心的控制系统，给出具体硬件电路和详细软件流程。实验结果验证了控制方法和控制系统的有效性。     

基于MATLAB的高功率因数整流器仿真实验平台研究

以三相PWM整流电路为例，利用MATLAB的Simulink建立了仿真实验平台，将具有一定功能的模块群进行封装，用户不必了解其内部结构，只需了解其功能，输入相应参数，把各个功能模块按照原理连接即可观察结果，每个模块都可以进行移植，通过仿真验证，对工程中的三相可逆PWM整流器设计有实际意义。     

关于对称三相电路无功功率测量的讨论

三相电路功率及其测量是电路教学中三相电路部分的重要内容.本文结合教学实践讨论了教科书中的对称三相电路无功功率测量的两种方法,指出这两种方法都与三相电路的相序及电路的接法有关.通过在三相电路中接入由电容构成的对称三相负载,给出了在未知三相电路相序的情况下用功率表测量相序的方法.进一步讨论了测量对称三相电路功率的方法,该方法有别于教科书所介绍的方法.     

三相功率因数校正电路拓扑结构的研究

介绍了三相功率因数校正电路几种主要的拓扑结构——三相单开关功率因数校正电路、三相两开关PFC电路、三相三开关PFC电路、三相四开关PFC电路等;并分析了每种拓扑结构的特性、优点以及缺点,应用MATLAB软件对其中部分电路做了仿真。     

三相电路功率的测量方法

三相电路功率的测量是三相电路分析的重要内容,也是学生学习“电路原理”课程中三相电路部分的难点之一。本文按三相三线制和三相四线制分类,较详细地讨论了三相电路功率测量的接线问题。首先介绍了现有教材中已给出的三相电路功率的测量方法,进而提出了三相四线制三相电路功率测量的另三种接线方法。总结了两表法和三表法各自的适用范围及功率表读数在不同接线方式下的物理意义,指出了它们的联系与区别。最后,讨论了三相电路功率与三端和四端网络功率的联系以便更好地理解三相功率的测量方法。’     

有源滤波器的三相四线制谐波检测新方法研究

基于瞬时无功理论的传统有源滤波器在三相四线制电路中不适用,文章针对这个问题,综合运用瞬时无功理论中的p-q方法和ipi-q方法,提出了一种新的基于瞬时无功理论的有效的三相四线制谐波检测新方法,将三相电流中的零序电流剔除,完善了p-q方法和ip-iq方法的不足,通过计算验证了该方法适用于任何三相电路,包括三相四线制电路,并且三相电压波形的畸变不影响检测结果的准确性。并用MATLAB仿真验证了该方法的准确性和有效性。该方法有效地解决了传统有源滤波器不适用于三相四线制电路的缺陷。     

基于Matlab/Simulink的电力变换电路仿真

由于电力变换电路种类较多,在"电力电子"课程教学中,学生难以理解复杂电路.本文应用Matlab/Simulink强大的仿真功能,对各种电力电子变换电路进行建模仿真,并着重介绍了三相半波整流电路、三相桥式整流电路和直流斩波电路的仿真,并对其中的难点进行了详细分析.使学生对课堂上所学的内容有一个直观的认识,对加深学生的理解和后续学习有较大的作用.     

应用数字PWM器件SA4828的大功率直流电源

介绍一种智能型、高精度PWM控制器SA4828，其控制实行全数字化，产生三相脉宽调制波形。采用该器件设计大功率直流电源，应用于22kW的直流电机进行测试，对感性负载表现出具有纹波小、响应迅速、硬件电路简洁、控制简单易于编写的优点。     

A wide-locking range 6-phase divide-by-3 injection-locked frequency divider

A 6-phase divide-by-3 CMOS injection locked frequency dividers (ILFDs) have been proposed and implemented in a 0.35 μm CMOS process. The ILFD circuits are realised with a 3-stage double cross-coupled CMOS ring oscillator. The self-oscillating voltage controlled oscillator (VCO) is injection-locked by 3th-harmonic input to obtain the division factor of 3. Measurement results show that as the supply voltage varies from 1.2 to 3.5 V, the free-running frequency is from 0.136 to 0.7 GHz. At the incident power of ?5 dBm, the locking range in the divide-by-3 mode is from the incident frequency 0.38–2.31 GHz.     

A DC to 3-Phase Series-Resonant Converter with Low Harmonic Distortion

A type of dc to 3-phase series-resonant converter (s.r.converter) or potentially submegawatt industrial applications is presented. The converter provides variable-frequency sine-wave currents, with low harmonic distortion at the output terminals, and with the frequency ranging from -200 through dc to +200 Hz. The converter can transfer power in both forward and reverse power-flow directions to almost any type of load circuit. The methods of control are formulated such that they can be implemented easily with high-speed logical circuits. Test results for a 1-kW demonstration converter are supplied.     

三相整流器功率因数校正电路的现状与发展

对近年来几种典型三相整流器功率因数校正电路作了简要的比较和归纳总结，在此基础上分析了三相整流器功率因数校正电路今后的发展动向。     

A comparative study of charge pumping circuits for flash memory applications

Flash memories are now widely used in many portable electronic devices, in embedded systems and are even as replacement for computer hard disks. In flash memory systems, high-voltages (up to about 10 V) are indispensable for programming operations. In many cases, however, such programming voltages are not directly available from the supply, and are usually generated by embedded voltage converting or charge pumping circuits. These circuits produce the required programming voltage from available external supplies with voltages in the approximate range of 1–5 V. The power conversion efficiency, the chip size, the voltage regulation, as well as the loading characteristics have been the major concerns for such circuits. The present paper discusses some recently proposed charge pumping circuits for flash memory applications. We focus on the effects of the dynamic gate control, the 4-phase gate-boosting and cross-coupled configuration for enhancing the performance of the charge pump circuits. Several different charge pumps operated under different working conditions are then investigated in detail.     

基于Multisim的电力电子电路仿真技术

介绍了Multisim软件的功能和特点，提出运用Multisim实现电力电子电路的仿真方法。通过3个电力电子原理性电路的仿真实例阐述了仿真电路建立、元器件的选用和仿真参数的设置方法等关键问题，同时得到了正确的仿真结果。     

nMOS reversible energy recovery logic for ultra-low-energyapplications

We propose a new fully reversible adiabatic logic, nMOS reversible energy recovery logic (nRERL), which uses nMOS transistors only and a simpler 6-phase clocked power. Its area overhead and energy consumption are smaller, compared with the other fully adiabatic logics. We employed bootstrapped nMOS switches to simplify the nRERL circuits. With the simulation results for a full adder, we confirmed that the nRERL circuit consumed substantially less energy than the other adiabatic logic circuits at low-speed operation. We evaluated a test chip implemented with 0.8-μm CMOS technology, which included a chain of nRERL inverters integrated with a clocked power generator. The nRERL inverter chain of 2400 stages consumed the minimum energy at V_dd=3.5 V at 55 kHz, where the adiabatic and leakage losses are about equal, which is only 4.50% of the dissipated energy of its corresponding CMOS circuit at V_dd=0.9 V. In conclusion, nRERL is more suitable than the other adiabatic logic circuits for the applications that do not require high performance but low energy consumption     

Circuit implementation of high-resolution rational-powered membership functions in standard CMOS technology

This paper proposes the method to implement a general form of membership functions for fuzzy systems in CMOS technology. These membership functions are a general form of triangular types and those functions which are used in linguistic hedge fuzzy logic, hence can offer better performance in almost all applications. The comparison between the proposed method and previously reported works shows better performance in all parameters. Designed circuits to implement these types of membership functions are simulated using HSPICE by level 49 parameters (BSIM3v3) in 0.35 μm standard CMOS technology. Current mode realization of the circuits leads to simple and intuitive configurations. The Rational Power Generator Module (RPGM) generates powers with the resolution of 0.03125 and using seven programming bits. The simulation results of RPGM demonstrate a RMS error of 1.42% and a maximum power consumption of 1.05 mW.