脊波导变换在低噪声放大器中的应用

本文主要介绍采用脊波导实现波导-微带过渡的低噪声放大器的结构和脊波导变换器的设计过程。放大器基片直接安装在波导管内,脊波导变换器采用具有一定精度的近似公式进行计算。以CX591C型FET作为有源器件、中心频率为6.2GHz的两级脊波导变换低噪声放大器,带宽达1000MHz,500MHz通带内,增益为20±0.25dB,噪声系数小于1.8dB。     

一种220 GHz波导-悬置微带线过渡电路设计

波导-微带过渡电路是连接毫米波、太赫兹系统中平面电路与波导的重要结构,直接影响系统性能。设计了一种中心频率220 GHz的矩形波导-悬置微带线过渡电路。过渡采用探针耦合的形式,并使用渐变线结构实现宽带阻抗匹配,这种结构具有结构紧凑,易于加工,宽带和插入损耗低等优点。最终的仿真结果表明：在180~255 GHz的频带内回波损耗优于20 dB,插入损耗小于0.18 dB。这种结构可广泛应用于毫米波、太赫兹平面电路中。     

Ka波段低噪声放大器的研制

本文介绍了一种毫米波低噪声放大器的设计技术，应用CAD技术设计了波导到微带的过渡，结合其它电路设计和组装工艺，研制出了工作带宽为3GHz的Ka波段低噪声放大器，具有噪声低、带宽宽的特点。     

W波段对脊鳍线波导微带过渡设计与实现

波导到微带过渡经常被应用于微波毫米波电路当中,分析常见几种波导到微带电路的优缺点,仿真并制作了一款80GHz-100GHz的对脊鳍线波导到微带过渡,实现了80GHz-100GHz范围内,S21小于0. 4dB,驻波小于1. 5dB超宽带对脊鳍线波导到微带过渡,对比并分析了仿真结果与实测结果的不同,具有较强的实际意义。     

一种基于共面波导的0.14 THz低噪声放大器设计

为解决低噪声放大器设计中过渡电路的实现问题,对基于共面波导的波导-平面电路过渡形式进行改进和优化,设计了一种工作频率为0.14 THz,带宽10 GHz的低噪声放大器。通过仿真,得到了输入输出回波损耗小于-27 dB,插入损耗小于0.1 dB 的结果。此种方法能够很好地实现信号在不同传输线形式间的转换,并得到了无源测试验证。     

毫米波GaAs单片限幅低噪声放大器

设计了一款毫米波GaAs单片限幅低噪声放大器。限幅器采用两级反向并联二极管结构,通过优化限幅器匹配电路,增大了限幅器的耐功率,降低了限幅电路的插损。低噪声放大器为四级级联设计,输入端采用最小噪声匹配,偏置电路增加RC串联谐振电路,减小了噪声,提高了电路稳定性。测试结果表明,该毫米波GaAs单片限幅低噪声放大器在33～37 GHz频带内,增益达到22 dB,增益平坦为±1 dB,输入驻波小于2,输出驻波小于1.5,噪声小于3.0 dB,输出1 dB增益压缩点(P_(1dB))大于5 dBm,可以承受15 W的脉冲输入功率。     

V频段小型化集成接收前端技术

V频段小型化集成接收前端主要实现对V频段毫米波信号的低驻波、低噪声接收和产品小型化。采用多功能芯片与混合集成技术,实现了毫米波接收信道的小型化集成。引进了微带正交耦合器,构成平衡式分布放大优化射频接收端口输入驻波系数的设计思路,替换了体积笨重的波导宽带隔离器,减小了毫米波接收前端体积和重量。通过对V频段波导微带过渡探针的容错性设计,降低了V频段毫米波接收前端的组装难度,提高了接收前端的一次组装合格率。最终实现批量化V频段小型化集成接收前端射频的输入驻波系数优于1.6,噪声系数优于4.2 dB,外形尺寸(含插座)33.4 mm×30 mm×12 mm。     

W波段反对称渐变探针过渡转换的设计

介绍了一种反对称渐变波导微带探针过渡结构,采用高频仿真软件HFSS仿真分析了这个波导微带过渡结构在W频段的特性,并对影响过渡性能的几个因素进行了敏感性分析,得出了可供工程应用参考的设计曲线。在全波导带宽内,实现了插入损耗小于0.088 dB,回波损耗大于27 dB。该结构具有宽频带、结构简单和易加工等优点,可广泛用于毫米波固态电路系统中。     

硅基毫米波高增益LNA技术研究

针对W波段硅基工艺电路面临的功率增益低、效率低以及噪声差等挑战,本文研究硅基毫米波高增益低噪声放大器（Low Noise Amplifier,LNA）技术。该LNA采用带有射极电感反馈的共射放大器,并通过五级共射放大器级联构成。第一级电路通过提供最小噪声偏置电流,并利用最小噪声匹配实现低噪声性能,后级电路通过提供高增益偏置电流实现高增益性能。另外,为了减小射频信号到衬底的损耗以及信号与旁路元件的耦合,有效提高低噪声放大器的性能,用于匹配电路的电感全部采用传输线形式—接地共面波导。低噪声放大器在中心频率94 GHz处的增益S21达到25.2 dB,噪声系数NF小至5.1dB。在90～100 GHz频段内,输入反射系数S11小于-10 dB,输出反射系数S22稳定在-20 dB左右,芯片面积为500 μm×960 μm。     

辐射计宽带低噪放大模块的设计

该文详细分析了宽带低噪声放大器的几种设计方法,在此基础上介绍了一种用于毫米波辐射计中频放大的宽带低噪声放大模块的设计过程。该电路采用HP硅晶体管AT41586和MMIC器件INA10386,在设计中采用EDA软件Microwave office进行仿真优化,最后采用微带混合集成电路工艺实现该电路,实测结果和仿真结果吻合较好。     

12~18 GHz GaAs MMIC低噪声放大器设计

采用GaAs工艺设计了一个12~18 GHz毫米波单片集成电路(MMIC)低噪声放大器(LNA)。采用三级单电源供电放大结构,运用最小噪声匹配设计、共轭匹配技术和负反馈结构,同时满足了噪声系数、增益平坦度和输出功率等要求。仿真表明：在12~18 GHz的工作频带内,噪声系数为1.15~1.41 dB,增益为27.9~29.1 dB,输出1 dB压缩点达到15 dBm,输入、输出电压驻波比(VSWR)系数小于1.72。     

A Ka-band low-noise amplifier with a coplanar waveguide (CPW) structure with 0.15-μm GaAs pHEMT technology

This investigation explores a low-noise amplifier (LNA) with a coplanar waveguide (CPW) structure, in which a two-stage amplifier is associated with a cascade schematic circuit, implemented in 0.15-μm GaAs pseudo-morphic high electron mobility transistor (pHEMT) technology in a Ka-band (26.5-40.0 GHz) microwave monolithic integrated circuit (MMIC). The experimental results demonstrate that the proposed LNA has a peak gain of 12.53 dB at 30 GHz and a minimum noise figure of 3.3 dB at 29.5 GHz, when biased at a V_(ds) of 2 V and a V_(gs) of-0.6 V with a drain current of 16 mA in the circuit. The results show that the millimeter-wave LNA with coplanar waveguide structure has a higher gain and wider bandwidth than a conventional circuit. Finally, the overall LNA characterization exhibits high gain and low noise, indicating that the LNA has a compact circuit and favorable RF characteristics. The strong RF character exhibited by the LNA circuit can be used in millimeter-wave circuit applications.     

A novel simultaneous noise and input VSWR matching technique for broadband LNA

The Simultaneous Noise and Input Voltage Standing Wave Ratio (VSWR) Matching (SNIM) condition for Low Noise Amplifier (LNA), in principle, can only be satisfied at a single frequency. In this paper, by analyzing the fundamental limitations of the narrowband SNIM technique for the broadband application, the authors present a broadband SNIM LNA systematic design technique. The designed LNA guided by the proposed methodology achieves 10 dB power gain with a low Noise Figure (NF) of 0.53 dB. Meanwhile, it provides wonderful input matching of 27 dB across the frequency range of 3∼5 GHz. Therefore, broadband SNIM is realized.     

A sub-mW 2.9-dB noise figure Inductor-less low noise amplifier for wireless sensor network applications

In this paper, a low power differential inductor-less Common Gate Low Noise Amplifier (CG-LNA) is presented for Wireless Sensor Network (WSN) applications. New Shunt feedback is employed with noise cancellation and Dual Capacitive Cross Coupling (DCCC) techniques to improve the performance of common gate structures in terms of gain, Noise Figure (NF) and power consumption. The shunt feedback path boosts the input conductance of the LNA in current reuse scheme. Both shunt feedback and current reuse bring power dissipation down considerably. In addition, the positive feedback is utilized to cancel the thermal noise of the input transistor. The proposed LNA is designed and simulated in 0.18 µm TSMC CMOS technology. Post layout Simulation results indicate a voltage gain of 16.5 dB with −3 dB bandwidth of 100 MHz–3 GHz. Also third order Input Intercept Point (IIP3) is equal to + 1 dBm. The minimum NF is 2.8 dB and the value of NF at 2.4 GHz is 2.9 dB. S11 is better than −13 dB in whole frequency range. The core LNA consumes 985 µW from a 1.8 V DC voltage supply.     

一种新型的5GHz自适应偏置及可变增益低噪声放大器

该文提出了一种新型的自适应偏置及可变增益低噪声放大器(LNA),利用电荷泵(亦称电压倍增器)将LNA输出信号转换成与LNA射频输入信号功率成比例变化的直流信号,以此信号同时反馈控制LNA的偏置和增益,来实现自适应偏置以及可变增益低噪声放大器, 从而极大地改善了LNA的输入线性范围。鉴于5GHz频率下,Bipolar相对于CMOS更好的频率特性和低噪声特性,该项研究采用了BiCMOS工艺,实现了低于3.0dB的噪声系数(高增益状态下)和大约13dBm的输入三阶交调点IIP3的控制范围以及大于15dB的增益控制范围。     

SiGe HBT低噪声放大器的设计与制造

该文设计和制作了一款单片集成硅锗异质结双极晶体管(SiGe HBT)低噪声放大器(LNA)。由于放大器采用复合型电阻负反馈结构,所以可灵活调整不同反馈电阻,同时获得合适的偏置、良好的端口匹配和低的噪声系数。基于0.35 m Si CMOS平面工艺制定了放大器单芯片集成的工艺流程。为了进一步降低放大器的噪声系数,在制作放大器中SiGe器件时,采用钛硅合金(TiSi2)来减小晶体管基极电阻。由于没有使用占片面积大的螺旋电感,最终研制出的SiGe HBT LNA芯片面积仅为0.282 mm2。测试结果表明,在工作频带0.2-1.2 GHz内,LNA噪声系数低至2.5 dB,增益高达26.7 dB,输入输出端口反射系数分别小于-7.4 dB和-10 dB。     

毫米波接收机的研究与设计

由于毫米波在技术上的优势,使得工作在毫米波频段的接收机具有体积小、重量轻、携带信息容量大和抗干扰能力强等特点,受到越来越广泛的应用。论述了毫米波接收机主要工作原理、研制过程及研制结果。该毫米波接收机主要包括毫米波功和器、电调衰减器、开关、毫米波LNA以及毫米波混频器等多个单元。通过电路优化设计,研制出的毫米波接收机增益为23.2 dB;噪声系数为11 dB;开关隔离度为42 dB;开关速度为3 ns。     

3.1～10.6 GHz CMOS超宽带低噪声放大器设计

本文给出了一个低电压、低功耗增益连续可调CMOS超宽带低噪声放大器(Ultra-wideband Low Noise Amplifier,UWB LNA)设计。在0.85V工作电压下放大器的直流功耗约为10mW。在3.1～10.6GHz的超宽带频段内,增益S21为14±0.4dB,且随控制电压VC连续可调。输入、输出阻抗匹配S11、S22均低于-10dB,噪声系数(NF)最小值为3.3dB。设计采用TSMC 0.18μm RF CMOS工艺完成。     

220-GHz metamorphic HEMT amplifier MMICs for high-resolution imaging applications

In this paper, the development of 220-GHz low-noise amplifier (LNA) MMICs for use in high-resolution active and passive millimeter-wave imaging systems is presented. The amplifier circuits have been realized using a well-proven 0.1-/spl mu/m gate length and an advanced 0.05-/spl mu/m gate length InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor technology. Furthermore, coplanar circuit topology in combination with cascode transistors was applied, leading to a compact chip size and an excellent gain performance at high millimeter-wave frequencies. A realized single-stage 0.05-/spl mu/m cascode LNA exhibited a small-signal gain of 10 dB at 222 GHz, while a 0.1-/spl mu/m four-stage amplifier circuit achieved a linear gain of 20 dB at the frequency of operation and more than 10 dB over the bandwidth from 180 to 225 GHz.     

Design of Low Power 2.4GHz CMOS Cascode LNA with Reduced Noise Figure for WSN Applications

In this paper, a narrowband cascode Low Noise Amplifier (LNA) with shunt feedback is proposed. A typical inductively degenerated cascode LNA can be treated as a Common Source-Common Gate (CS-CG) two stage LNA. The series interstage inductance is connected between CS-CG stages to increase the power gain. An additional inductance which is connected at the gate of CG stage is used to cancel out the parasitic capacitance of CG stage therefore reduces the noise figure of CG stage. The shunt feedback is used to improve the stability and input impedance matching. This configuration provides better input matching, lower noise figure, low power consumption and good reverse isolation. The proposed LNA exhibits the gain of 13 dB, input return loss of ?11 dB, noise figure of 2.2 dB and good reverse isolation of ?42.8 dB at a frequency of 2.4GHz using TSMC 0.13 μm CMOS technology. It produces gain and noise figure better than conventional cascode LNA. The proposed LNA is biased in moderate inversion region for achieving sufficient gain with low power consumption of 1.5mW at a supply voltage of 1.5V.