A 0.8-dB insertion-loss, 17.4-dBm power-handling, 5-GHz transmit/receive switch with DETs in a 0.18-/spl mu/m CMOS process

An optimized single-pole double-throw (SPDT) transmit/receive (T/R) switch has been fabricated using depletion-layer-extended transistors (DETs) in a 0.18 /spl mu/m CMOS process. The switch features the highest performance to date of any switch using a CMOS process, of a 0.8 dB insertion-loss, 23 dB isolation and 17.4 dBm power-handling capability at 5 GHz. The low insertion-loss has been achieved with the effects of junction capacitance decrease and substrate resistance increase in the DET, the adoption of low-loss shielded-pads, and several layout optimizations. The high power-handling capability is owing to the combined effect of the adoption of the source/drain dc biasing scheme and the high substrate resistance in the DET.     

Managing subthreshold leakage in charge-based analog circuits with low-V/sub TH/ transistors by analog T- switch (AT-switch) and super cut-off CMOS (SCCMOS)

The analog T-switch (AT-switch) scheme is introduced to suppress subthreshold-leakage problems in charge-based analog circuits such as switched capacitors and sample-and-hold circuits. A 0.5-V sigma-delta modulator is manufactured in a 0.15-/spl mu/m FD-SOI process with low V/sub TH/ of 0.1 V using the concept. The scheme is compared with another leakage-suppression scheme based on super cut-off CMOS (SCCMOS) and the conventional circuit which are also fabricated. The sigma-delta modulator based on AT-switch greatly improves 8.1-dB SNDR through reducing nonlinear leakage effects while the modulator based on SCCMOS improves the dynamic range rather than the SNDR by comparing with the conventional sigma-delta modulator.     

Double channel field effect transistors (DCT) and demonstration of static single transistor bit cell

A double channel structure was implemented in standard field effect transistors (FET) by implants. The resulting transfer slopes of these modified FETs show a clear on and off-state as well as a local extreme in between, if the body is forced. Exploring the new functionality of these novel devices a static single transistor bit cell is built for demonstration, pin compatible to standard bit cells.     

Stacked field effect transistor integration in double channel transistors (DCT) with tri-state transfer slope and ballistic field effect behavior

Implants create isolated electric charge under the channel region of nFET and pFET. By this, a new local extrema in the transfer slope is obtained while maintaining low leakage in off state. The results are explained by electro-static field simulation and yield in a circuit model with two parallel channel resistors, indicating a double channel field effect transistor (DCT). The new DCTs allow complex functions in logic or small transistor bit cells in the future.     

Impact of nitrogen (N14) implantation into polysilicongate on high-performance dual-gate CMOS transistors

The effect of nitrogen (N₁₄)implant into dual-doped polysilicon gates was investigated. The electrical characteristics of sub-0.25-μm dual-gate transistors (both p- and n-channel), MOS capacitor quasi-static C-V curve, SIMS profile, poly-Si gate R_s , and oxide Q_bd were compared at different nitrogen dose levels. A nitrogen dose of 5×10¹⁵ cm^-2 is the optimum choice at an implant energy of 40 KeV in terms of the overall performance of both p- and n-MOSFETs and the oxide Q_bd. The suppression of boron penetration is confirmed by the SIMS profiles to be attributed to the retardation effect in bulk polysilicon with the presence of nitrogen. High nitrogen dose (1×10¹⁶ cm^-2) results in poly depletion and increase of sheet resistance in both unsilicided and silicided p⁺ poly, degrading the transistor performance. Under optimum design, nitrogen implantation into poly-Si gate is effective in suppressing boron penetration without degrading performance of either p- or n-channel transistors     

A high-efficiency CMOS image sensor with air gap in situ MicroLens (AGML) fabricated by 0.18-/spl mu/m CMOS technology

The air gap in situ microlens (AGML) above-pixel sensor with 0.18-/spl mu/m CMOS image sensor technology has been successfully developed to dramatically improve the optical crosstalk and pixel sensitivity. We demonstrated excellent crosstalk diminution with the structure on small pixels. Compared with conventional 2.8 /spl mu/m square pixel, adopting the AGML can reduce the optical crosstalk up to 64%, and provide 21% in enhancement of photosensitivity at 0/spl deg/ incident angle. Furthermore, under 20/spl deg/ incident angle the optical crosstalk reduction and sensitivity enhancement are increased to 89% and 122%, respectively. Therefore, the AGML structure makes pixel size be further scaled down to less than 2.8 /spl mu/m square and maintain good performance.     

Double heterojunction AlxGa1-xAs/GaAs bipolar transistors (DHBJT's) by MBE with a current gain of 1650

Double heterojunction AlGaAs/GaAs bipolar junction transistors (DHBJT's) grown by molecular beam epitaxy (MBE) were fabricated and tested. Devices with 0.2-µm and 0.1-µm base thicknesses exhibited common emitter current gains of up to 325 and 1650, respectively, in a wide range of collector currents. To obtain such high current gains, growth conditions had to be optimized and controlled. These high current gains, compared with the previous best value of 120 obtained in a MBE-grown transistor, make the HBJT's very promising for low-power high-speed logic application.     

(100) and (111) Si MOS transistors fabricated with low growthtemperature (400°C) gate oxide by Kr/O2 microwave-excitedhigh-density plasma

A drastic reduction in the growth temperature (400°C) of highly reliable SiO₂ gate oxides grown by a Kr/O₂ microwave-excited high-density plasma technique is shown to yield MOS I-V characteristics comparable to those obtained in transistors with conventionally grown dry gate oxides at 900°C. The benefits of this technique are summarized     

Comparison of heterostructure-emitter bipolar transistors (HEBTs) with InGaAs/GaAs superlattice and quantum-well base structures

The characteristics of InGaP/GaAs heterostructure-emitter bipolar transistors (HEBTs) including conventional GaAs bulk base, InGaAs/GaAs superlattice-base, and InGaAs quantum-well base structures are presented and compared by two-dimensional simulation analysis. Among of the devices, the superlattice-base device exhibits a highest collector current, a highest current gain and a lowest base–emitter turn-on voltage attributed to the increased charge storage of minority carriers in the InGaAs/GaAs superlattice-base region by tunneling behavior. The relatively low turn-on voltage can reduce the operating voltage and collector–emitter offset voltage for low power consumption in circuit applications. However, as to the quantum-well base device, the electrons injecting into the InGaAs well are blocked by the p⁺-GaAs bulk base and it causes a great quantity of electron storage within the small energy-gap n-type GaAs emitter layer, which significantly increases the base recombination current as well as degrades the collector current and current gain.     

(In,Ga)As/InP n-p-n heterojunction bipolar transistors grown by liquid phase epitaxy with high DC current gain

Experimental results on heterojunction bipolar transistors made in liquid phase epitaxial (In,Ga)As and InP layers on InP substrates are described. The (In,Ga)As base layer was doped with manganese during growth and contacts were made to it by beryllium ion implantation. The maximum measured dc current gain β of these devices was in excess of 500. These devices also demonstrate for the first time in an InP-based system, the inverted emitter-down heterojunction transistor structure with a base contact, which yields a minimized collector-base junction area and should significantly improve high-frequency performance.     

Improved reliability of AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) with high density silicon nitride passivation

We have systematically studied the effects of Si_xN_1 − x passivation density on the reliability of AlGaN/GaN high electron mobility transistors. Upon stressing, devices degrade in two stages, fast-mode degradation and followed by slow-mode degradation. Both degradations can be explained as different stages of pit formation at the gate-edge. Fast-mode degradation is caused by pre-existing oxygen at the Si_xN_1 − x/AlGaN interface. It is not significantly affected by the Si_xN_1 − x density. On the other hand, slow-mode degradation is associated with Si_xN_1 − x degradation. Si_xN_1 − x degrades through electric-field induced oxidation in discrete locations along the gate-edges. The size of these degraded locations ranged from 100 to 300 nm from the gate edge. There are about 16 degraded locations per 100 μm gate-width. In each degraded location, low density nano-globes are formed within the Si_xN_1 − x. Because of the low density of the degraded locations, oxygen can diffuse through these areas and oxidize the AlGaN/GaN to form pits. This slow-mode degradation can be minimized by using high density (ρ = 2.48 g/cm³) Si₃₆N₆₄ as the passivation layer. For slow-mode degradation, the median time to failure of devices with high density passivation is found to increase up to 2× as compared to the low density (ρ = 2.25 g/cm³) Si₄₃N₅₇ passivation. A model based on Johnson-Mehl-Avrami theory is proposed to explain the kinetics of pit formation.     

Molecular beam epitaxial GaAs/Al0.2Ga0.8Asp-channel field-effect transistors on (311)A facets of patterned (100)GaAs obtained by silicon doping

P-channel and n-channel heterostructure field effect transistors (HFETs) have been simultaneously fabricated by one-step molecular beam epitaxial growth of Si-doped Al_0.2Ga_0.8As/GaAs heterostructures on patterned (100) GaAs substrates. The p-HFETs were made on the etched (311)A facets and the n-HFETs on the planar (100) surface. A transconductance value of 23 mS/mm at 300 K for a p-HFET with a 1.1×50-μm gate is measured. The same size n-HFET made with the same structure and same level of Si doping has a transconductance value of 250 mS/mm at room temperature     

Model generation of the silicon-germanium (Si1−xGex) bipolar inversion channel field effect transistor utilizing a two-dimensional device simulator

The development of an accurate model for an inversion base transistor in the bipolar inversion channel field effect transistor (BICFET) configuration is investigated in this report. Simulations were accomplished through the use of the Medici software, acquired from Avant! Corporation of Sunnyvale, California. This software, which is capable of modeling semiconductor devices comprised of conventional and/or user-defined materials, impurities, structures and operating conditions, was used to develop a model based on experimental device results from Stanford University.     

Temperature dependent current–voltage (I–V) characteristics of Au/n-Si (1 1 1) Schottky barrier diodes with PVA(Ni,Zn-doped) interfacial layer

Current–voltage (I–V) characteristics of Au/PVA/n-Si (1 1 1) Schottky barrier diodes (SBDs) have been investigated in the temperature range 80–400 K. Here, polyvinyl alcohol (PVA) has been used as interfacial layer between metal and semiconductor layers. The zero-bias barrier height (Φ_B0) and ideality factor (n) determined from the forward bias I–V characteristics were found strongly dependent on temperature. The forward bias semi-logarithmic I–V curves for different temperatures have an almost common cross-point at a certain bias voltage. The values of Φ_B0 increase with the increasing temperature whereas those of n decrease. Therefore, we have attempted to draw Φ_B0 vs. q/2kT plot in order to obtain evidence of a Gaussian distribution (GD) of the barrier heights (BHs). The mean value of BH and standard deviation (σ₀) were found to be 0.974 eV and 0.101 V from this plot, respectively. Thus, the slope and intercept of modified vs. q/kT plot give the values of and Richardson constant (A^?) as 0.966 eV and 118.75 A/cm²K², respectively, without using the temperature coefficient of the BH. This value of A^* 118.75 A/cm²K² is very close to the theoretical value of 120 A/cm²K² for n-type Si. Hence, it has been concluded that the temperature dependence of the forward I–V characteristics of Au/PVA/n-Si (1 1 1) SBDs can be successfully explained on the basis of the Thermionic Emission (TE) theory with a GD of the BHs at Au/n-Si interface.     

Wide-wavelength-band (30 nm) 10-Gb/s operation of InP-based Mach-Zehnder modulator with constant driving voltage of 2 V/sub pp/

Wide-wavelength-band operation of InP-based Mach-Zehnder modulators is investigated. From the measured dependences of the half-wavelength voltage on operating wavelength and applied-bias voltage, it is shown that wide-wavelength operation with a constant driving voltage can be realized by adjusting the bias voltage for each operating wavelength. Ten-gigabits/second clear eye openings are demonstrated over a 30-nm wavelength range with a constant driving voltage of 2 V/sub pp/.     

充气平衡法减小超轻反射镜加工中的网格效应（特邀）

对于传统蜂窝夹芯结构的反射镜,因加工过程中网格效应的存在,反射镜的面板厚度和蜂窝尺寸之间彼此关联制约着,严重影响反射镜的轻量化设计。针对蜂窝夹芯结构的超轻ULE反射镜,提出了一种充气平衡式减小网格效应的加工方法,运用控制变量法,通过实验比对了正常加工和充气平衡式两种研抛状态下网格效应的变化。实验结果表明:当反射镜面形精度RMS达到1/10λ （λ=632.8 nm）以上时,正常加工的面形图存在明显的网格效应,而充气加工则没有,可见反射镜内部充气可有效平衡加工压力,使反射镜在加工过程中有筋区域和无筋区域的变形趋于一致,从而有效减小网格效应。     

Promotion of piezoelectric properties of lead zirconate titanate ceramics with (Zr,Ti) partially replaced by Nb2O5

This study investigated the correlation of sintering effects on piezoelectric properties of Nb modified lead zirconate titanate (PZT) piezoceramics produced by the conventional solid reaction sintering. Samples were prepared at a composition Zr/Ti=53/47, contiguous to a morphotropic phase boundary (MPB) for 1 mol% Nb₂O₅. Replacement of Ti⁺⁴ by Nb⁺⁵ in such perovskite type solid solutions was accomplished by the creation of cation vacancies. These created vacancies seemed to facilitate material transport and benefit sintering. Calcined at 850 °C/2 h and sintered at 1250 °C/2 h, the PZT ceramics yielded a minimum value of the mechanical quality factor (Q_m) 50, and exhibited a maximum electromechanical coupling factor κ_p 0.62, in accordance with the relationship between the mechanical quality factor and electromechanical coupling factor. In addition, during the sintering process a piezoelectric charge constant at d₃₃ was found to be of 385 pC/N. It was noted that the fundamental resonance frequency was around 200 kHz, which was suitable for piezoelectric nebulizer (fluid atomizer), ultrasonic cleaning transducer applications.     

Photoelectric and luminescence properties of GaSb-Based nanoheterostructures with a deep Al(As)Sb/InAsSb/Al(As)Sb quantum well grown by metalorganic vapor-phase epitaxy

The luminescence and photoelectric properties of heterostructures with a deep Al(As)Sb/InAsSb/Al(As)Sb quantum well grown on n-GaSb substrates by metalorganic vapor-phase epitaxy are investigated. Intense superlinear luminescence and increased optical power as a function of the pump current in the photon energy range of 0.6–0.8 eV are observed at temperatures of T = 77 and 300 K. The photoelectric, current-voltage, and capacitance characteristics of these heterostructures are studied in detail. The photosensitivity is examined with photodetectors operating in the photovoltaic mode in the spectral range of 0.9–2.0 μm. The sensitivity maximum at room temperature is observed at a wavelength of 1.55 μm. The quantum efficiency, detectivity, and response time of the photodetectors were estimated. The quantum efficiency and detectivity at the peak of the photosensitivity spectrum are as high as η = 0.6–0.7 and D _λmax ^* = (5–7) × 10¹⁰ cm Hz^1/2 W^?1, respectively. The photodiode response time determined as the rise time of the photoresponse pulse from 0.1 to the level 0.9 is 100–200 ps. The photodiode transmission bandwidth is 2–3 GHz. Photodetectors with a deep Al(As)Sb/InAsSb/Al(As)Sb quantum well grown on n-GaSb substrates are promising foruse in heterodyne detection systems and in information technologies.