摄谱仪

300J是一款由马达驱动，控制杆操纵，用于300mm晶圆应用的探针台。该系统采用马达驱动来实现对探针台、倾角、平面和显微镜的手动控制。该探针台的特点是精选的动态高、低速范围，可以提供高分辨率的精确定位和对300mm范围的快速扫描。     

一种微型探针台的设计和应用

介绍了一种便携式探针台,其结构小巧,功能实用,成本较低,可以满足基本的试验需求。特别之处在于显微镜和探针台采用分体结构设计,使得探针台部分能从整个探针台系统中独立出来,可以应用于辐照试验中。固定在探针台上的芯片可以与探针台一起放置于空间任意位置,方便将芯片对准辐照源中心。该探针台也可放置在高低温箱中,用于芯片的三温测试。加上显微镜固定采用多角度云台支架设计,支持全方位观察,可以使得观察更加立体直观。探针卡采用多探针结构,可实现多路测试,并且探卡及其信号连接线采用了低漏电及EMI设计,测试精度可以达到0.1 n A以下,配合接地良好的铝制屏蔽盒,增加了抗干扰能力,其测试数据更加精确。     

浙江大学求是公司教学仪器介绍

浙江大学求是科学技术开发公司是一家集科研、生产、经营于一体的合格企业 ,专业生产物理、电工、电机、控制系统等教学仪器设备。在本刊上已先后介绍过多种教学实验台产品的内容 ,本文再对我公司产品 MEL - I型电机系统教学实验台作一简要介绍。1　MEL- I型电机系统教学实验台简介　　 1 )概述MEL - I型电机系统教学实验台主要依据高校教材《电机实验》及中专教材《电机及拖动实验》,同时也参考了近几年有关院校使用的电机及拖动实验教材的要求而研制。因此该装置完全能满足各有关院校实验大纲的要求。该产品采用组件式结构 ,小型美观…     

移动台适用的平面型紧凑极化分集天线

给出一种适用于移动台的平面型紧凑极化分集天线。该天线由两个十字交叉的微带分支提供极化分集。每一分支都有单独的微带一垂直探针馈电系统，并在分支上蚀刻有一个细槽以提高两个端口的隔离度。通过电容加载大大缩短了分支长度。利用时域有限差分法，在900MHz频段对该天线进行了分析和优化。天线模型的测量结果与仿真结果基本吻合，在约5％的带宽内两个端口的隔离度大于20dB、回波损耗均低于-10dB。该天线两端口的包络相关系数远小于0．1，能够满足分集的要求。     

离合器耦合传动型压电电机传动机理的研究

设计和制作了一台离合器耦合传动型压电电机。分析了离合器回程间隙的大小与电机的性能密切相关，即减小回程间隙可提高电机的堵转扭矩和速度。该文对离合器部件作了运动和弹性变形分析，认为回程间隙由两部分组成，一部分为设计和装配形成的回程间隙，可以消除，另一部分为离合器部件弹性变形引起的回程间隙，不能消除。离合器的结构参数决定了回程间隙大小。     

南通富士通微电子股份有限公司采购美国伊智公司Sidewinder机械手实现新型Strip测试

半导体行业晶片探针台和基于探针台技术的机械手测试解决方案的主要供应商美国伊智国际有限公司(纳斯达克：EGLS)近天宣布：他们向中国南通富士通微电子股份有限公司(NFME)出售了一台Sidewinder测试机械手，为其提供Strip格式的器件封装测试。该系统将扩展NFME现有测试能力并在中国江苏省的南通市使用。     

可编程承片台

可编程承片台是全自动探针测试台的关键部件。它的优劣直接影响到整机的性能 ,因此采用可编程承片台 ,可起到在保证整机质量的同时 ,提高设备生产效率。     

提高探针台测试效率的方法研究

分析探针台的自动测试流程,从减少运动次数和时序重合两方面提出了几种提高探针台测试效率的方法,说明其实现原理,并用实际测试的数据,证明这些方法对效率确有提高。     

光刻机掩模台宏动定位系统的控制器设计

为给步进扫描光刻机的设计研究提供理论指导,解决光刻机掩膜台宏动平台的控制问题,采用直线电机设计了高速、高精密步进扫描光刻机的掩模台模拟宏动定位系统,并建立了整个直线运动平台的数学模型。根据该系统的特点和模型,还设计了一种不完全微分PID+干扰观测器的控制方式。运用MATLAB软件进行仿真,结果表明,在具有相同的扰动下,仅采用普通PID控制,系统跟踪误差在±0.025 mm范围内变化,而采用该控制方式,系统跟踪误差在±0.015 mm的范围内变化,后者比前者具有更好的控制性能,因而可以使系统得到较好的抗干扰能力、跟踪性能和控制效果。     

一种小型重力补偿器的研究

光刻机工件台的小型重力补偿器是光刻技术中关于硅片调焦调平的关键技术,其性能直接影响机器焦深误差。针对一种主动小型重力补偿器展开研究,给出了机械结构、驱动电机和隔振性能的设计,通过实验表明了设计符合需求。     

Silicon cantilever arrays with by-pass metal through-silicon-via (TSV) tips for micromachined IC testing probe cards

In this paper, an integrated probe card is proposed and developed for wafer-level IC testing. Based on micromachining technology, totally about 26,000 cantilever-tip probes can be formed simultaneously in one 4-in. silicon wafer, with the minimum pitch of 35 μm for adjacent probing tips. The probe card is designed with a novel composite structure that combines both single-crystalline silicon and electroplated metals. In the composite structure, a novel bypass through-silicon-via with a low aspect ratio can be high-yield fabricated for transferring the testing signals from the probing sided (at the wafer bottom side) to the I/O interface (at the front side). The probe card makes full use of the advantages of the single-crystal silicon and the electroplated nickel and copper. Bulk micromachined silicon cantilevers behave uniform probing height and a good elastic deformation property, while the electroplated nickel probing tips promise high hardness and satisfactory electric contact performance with the dies-under-test (DUT). Measurements show that the fabricated cantilever is able to withstand a contact force of 80mN by a tip displacement of 20 μm. The measured contact resistances on metal pads (Al, Cu, and Au) are all below 1 Ω, whereas the maximum current leakage is 64 pA for 3.3 V voltage across two adjacent tips. After a probing reliability test of 100,000 cycles, the cantilever-tip shows no sign of any performance degradation.     

避免探针扎穿铝层方法初探

在芯片测试中,若引线焊盘上的铝层被探针扎穿,就会影响引线键合的牢固性和器件的可靠性。为了解决这个问题,我们作了一些分析和探索。本文打算在1034探针台上针对如何避免探针扎穿铝层问题作一讨论。     

Manufacturability issues related to transient thermal annealing oftitanium silicide films in a rapid thermal processor

Transient thermal annealing of sputtered titanium films in a rapid thermal processor (RTP) is critically evaluated from the viewpoint of manufacturability-related considerations. In particular, the thin-film properties of the resulting titanium silicide on polysilicon and silicon, process uniformity, and unit step wafer yield of high-density scaled device structures are investigated. The experimental results suggest that RTP silicides show good thin-film properties for manufacturability on planar wafer surfaces. Transient thermal gradients in an RTP system are shown to cause substantial variations in the electrical and structural properties of TiSi_x films formed on silicon substrates with varying substrate thicknesses. Closed-loop temperature control in an RTP reactor provided stoichiometrically identical TiSi_x films with negligible substrate thickness dependence. The experimental results also suggest that careful wafer surface temperature control is needed when forming titanium silicide films on nonplanar silicon surfaces, silicon trenches, and process monitor wafers without predetermined wafer thicknesses     

封闭式匀胶显影设备的结构与技术优势

介绍了KINGSEMI封闭式晶片处理系统。它是满足深亚微米光刻工艺要求的Cluster结构。有占地小,采用空气过滤(MFC)及气流导向穴FFU雪等控制系统,对局部环境进行温湿度控制等优点;智能型化学品自动供应站精确地控制光刻胶、显影液等化学试剂的用量。片盒站机械手和工艺单元机器人联合传送晶片,准确、安全、快捷;备有容纳4个片架盒的片盒站,可同时处理两种不同尺寸的晶片。嵌入式控制软件,WindowsNT操作系统,构成良好的人机界面熏操作方便。     

Experimental method and FE simulation model for evaluation of wafer probing parameters

Wafer probing technology is a critical testing technology that is used in the semiconductor manufacturing and packaging process. A well-designed probing system must enable low and stable contact resistance when each needle-like probe makes contact with the IC chip-bonding pad. Mechanical contact using excessive probe force causes over-sized scrub marks that may damage the die pad and sizably deform the probe tip. In this paper, an experimental setup of a single tungsten needle probe making contact with an Al pad was employed to investigate the relationships between the overdrive, contact force, and scrub mark length. A three-dimensional computational probing simulation model was developed for analyzing dynamic deformations of the contact phenomena during wafer testing. The mechanical tensile strength of the tungsten needle was tested with a micro-tester to examine the tensile stress-strain relationship. The elastoplastic behaviors of the probe and die were taken into account in the simulation model. The resultant scrub lengths from the simulation were verified against the experimental data. Additional critical data, such as data of the scrub mark sinking on the die surface and the maximum Von-Mises stress level location at the probe tips, can be predicted. The experimental and numerical methods presented here can be used as useful performance evaluation tools to support the choice of suitable probe geometry and wafer probe testing parameters.     

Metaheuristic scheduling of 300-mm lots containing multiple orders

The standard unit of transfer in new semiconductor wafer fabrication facilities is the front opening unified pod (FOUP). Due to automated material handling system concerns, the number of FOUPs in a wafer fab is kept limited. Moreover, a certain number of new and larger 300-mm wafers will be placed in these FOUPs and this makes grouping orders from multiple customers into a job a necessity. Thereby, efficient utilization of the FOUP capacity while attaining good system performance is a challenge. We previously investigated optimization-based solution approaches for minimizing total weighted completion time and maximizing on-time delivery performance for the single machine multiple orders per job scheduling problem. We present two metaheuristic solution approaches for this scheduling problem under two different typical wafer fab machine environments: single unit processing and single lot processing. Experimental results demonstrate that the metaheuristic approaches can find near-optimal solutions for realistic-sized 300-mm scheduling problems in an acceptable amount of computation time.     

SiC晶圆背面激光退火工艺研究

降低芯片背面金属-半导体欧姆接触电阻是有效提高器件性能的方式之一。采用650 V SiC肖特基势垒二极管(SBD)工艺,使用波长355 nm不同能量的脉冲激光进行退火实验,利用X射线衍射(XRD)和探针台对晶圆背面镍硅合金进行测量分析,得出最佳能量为3.6 J/cm²。退火后采用扫描电子显微镜(SEM)观察晶圆背面碳团簇,针对背面的碳团簇问题,在Ar;气氛下对晶圆进行了表面处理,使用SEM和探针台分别对两组样品的表面形貌和电压-电流特性进行了对比分析。实验结果表明,通过表面处理可以有效降低表面的碳含量,并且使器件正向压降均值降低了6%,利用圆形传输线模型(CTLM)测得芯片的比导通电阻为9.7×10^-6Ω·cm²。器件性能和均匀性都得到提高。     

装片机晶片台运动控制系统的分析

论述了装片机晶片台伺服电机选型计算和运动控制技术,采用伺服电机构成了半闭环反馈控制系统,实现了晶片台的高速、高精度定位控制。     

A new technique for fabrication of OEICs-the etched back planarprocess-and its application to the fabrication of planar embeddedInP-InGaAs p-i-n photodiodes

The etched back planar process utilizes a nonselective reactive ion beam etching (RIBE) technique both for semiconductor layers and for photoresist. Application of the technique to the fabrication of a planar InP-InGaAs embedded p-i-n photodiode is discussed. The groove depth on the wafer was reduced from 5.3 μ to 0.6 μm, and the wafer was nearly planarized. Estimates based on photoluminescence intensity variation and the characteristics of the fabricated p-i-n photodiode indicate that little damage was incurred during the process. These results indicate that fabrication of planar OEICs by means of this process is feasible     

In situDiagnostics of Plasma Processes in Microelectronics: The Current Status and Immediate Prospect,Part III

Techniques to monitor plasma processing by the real-time inspection of the wafer surface are reviewed. The focus is on optical probing, since this strategy is the most suitable for plasma reactors. The in situinspection of wafer patterns by interferometry and single-wavelength and spectroscopic ellipsometry is analyzed. Much attention is given to measurements of wafer temperature in real time. The advantages and disadvantages of various approaches to the monitoring of plasma patterning are shown.