GaAs表面处理及其椭圆偏振仪、俄歇电子能谱与X-光电子谱的特性测定

用椭圆偏振仪、俄歇电子能谱仪(AES)和X-光电子谱仪(XPS)等对经pH=7±0.05的H_2O_2-NH_40H溶液化学腐蚀或用NH_4OH:H_20=1:10和HCl:H_2O=1:1进行清洗后的GaAs表面残余氧化层厚度、折射率、纵向组分分布和Ga(3d)与As(3d)结合能变化等进行测定.三者实验结果对应很好.化学腐蚀后的GaAs表面有一层氧化物层,然后是氧化物与GaAs混合的过渡层,直至GaAs衬底.从NH_4OH:H_2O=1:10清洗后GaAs表面残余氧化层厚度,表面C吸附量和Ga/As的波动看,它均比用HCl:H_2O=1:1清洗为优,故用它作为GaAs在化学腐蚀后的清洗是可取的.     

砷化镓合金型的肖特基势垒接触

已研制了GaAs合金型的肖特基势垒接触。用蒸发含有镍(5～20原子％)的鉑膜和GaAs衬底之间的固—固反应来形成合金层。肖特基势垒接触的电性质和冶金性质是:(1)φ_(BO)=0.95±0.01电子伏和n=1.04±0.02,(2)在高温时接触是稳定的,(3)没有沾污的麻烦问题和氧化物的介入层,(4)没有观察到的由于鉑和镍扩散所引起的不良效应,(5)在介面形成如GaPt,Ga_2Pt和PtAs_2的合金,(6)这些合金型接触对于肖特基势垒器件是有希望的。     

GaAs超薄层腐蚀与非线性光学器件制作

用液相外延生长与H_2O_2选择腐蚀制备了GaAs—GaAlAs非线性光学器件。研究了H_2SO_4:H_2O_2:H_2O腐蚀液的快速腐蚀和H_2O_2—NH_3·H_2O的GaAs选择腐蚀过程。适宜pH值的H_2O_2腐蚀液对GaAs具有～1μm/小时的腐蚀速度,而对Ga_1-xAlxAs(x≥0.25)不产生腐蚀。分析和讨论了腐蚀过程和速择腐蚀机理。     

用于GaAs的新腐蚀液的腐蚀特性和动力学

系统地研究了新的GaAs腐蚀液HCl-H_2O_2-H_2O.用它腐蚀的GaAs表面具有的残留氧化物膜较薄,且不易引起杂质沾污.给出了等腐蚀速率的三元图和各区中的激活能.研究了对于GaAs及常用于GaAs器件工艺中之金属的各种腐蚀特性以及对于器件工艺中常用的各种光刻胶的溶解性,并与其他腐蚀液系统作了对比.实验表明,腐蚀是依照氧化随后溶解氧化物的过程进行的.考虑到溶液中组分间的化学反应 pA+qB→产物,提出了一般的腐蚀速率方程.用于HCl-H_2O_2-H_2O系统的计算结果与实验数据一致.     

半导体及其氧化物的氢等离子体腐蚀

用氢等离子体腐蚀了半导体材料(如:GaAs、GaSb、InP、Si等)及其氧化物和氮化硅的表面。采用光谱椭圆仪、俄歇波谱仪和扫描电子显微镜(SEM)等综合分析技术,研究了刻蚀速率、表面组分和形态。实验证明:氢等离子体对于SiO_2上的硅和GaAs上的GaAs氧化物的选择刻蚀速率分别为30和2左右。还表明,经氢等离子体腐蚀的(曝露在空气中)GaAs表面上Ga/As的浓度比近似等于GaAs空气解理面上的Ga/As的浓度比。对于GaSb也得到了类似的结果。氢等离子体腐蚀过的InP表面呈现出偏析现象,即富In的表面结构。椭圆仪和电子显微镜测量的结果表明:半导体及其氧化物的腐蚀速率与被蚀物质的种类有关,对不同种类的化合物,腐蚀速率有几个数量级的差别。实验还证明:扫描椭圆仪可以用于表面腐蚀过程的监控。讨论了使用氢等离子体对材料表面制备的一些优缺点及在刻蚀方面的应用。     

时间分辨热透镜法研究多原子分子的振动弛豫

本文用时间分辨热透镜技术研究多原子分子的 V-T/R 弛豫过程。选频的脉冲 TEA CO_2激光器用作激发光源,单模稳频 He—Ne 激光器用作探测光源,实验得到以下结果:1.测得 C_2H_4在高振动激发时的总包 V—T/R 弛豫速率和低振动激发时的弛豫速率在误差范围内无差异。表明高振动激发的 C_2H_4分子对总包 V—T/R 弛豫影响不大。2.激发 C-2H_4(v_7,949cm~(-1)),CCl_2F_2(v_6,922cm~(-1)),C_2Cl_3F_3(v_(16),1046cm~(-1),CH_3OH(v_4,1034cm~(-1))分子,测出它们的 V—T/R 弛豫速率分别为7.9ms~(-1)·torr~(-1)(±15%),21.4ms~(-1)·torr~(-1)(±15%),196ms~(-1)·torr~(-1)(±25%)和206ms~(-1)·torr~(-1)(±25%)。弛豫速率间的     

印刷线路板快速翻版技术

染色方法是在清洁的线路上浇上染色剂.试验结果(见上表)表明,将线路化学镀银后,用硫化铵溶液染色效果良好,这是因为Na_2S染色效果差,因形成硫化物少,且Cu_2S暗灰色,只有CuS显棕色,但能生成两价铜的硫化物更少.为么什银和(NH-4)_2S反应效果良好,我们认为反应是分两步进行的.①银和(NH_4)_2S溶液中的NH_4OH形成银氨络合物:4Ag+8NH_4OH+O_2—→4Ag(NH_3)_2OH+6H_2O②银氨络合物与(NH_4)_2S形成黑色硫化银沉淀:2Ag(NH_3)_2OH+(NH_4)_2S—→Ag_2S↓+2NH_4OH+4NH_3↑ └→2NH_3↑+2H_O一天时间就可以做好双面黑白反差大的线路板,完全能满足制版要求,翻拍出的照相     

大面积砷化镓的等离子体氧化及氧化层的AES和XPS分析

用高频辉光放电产生氧等离子体进行GaAs阳极氧化,直径40mm的晶片上可生长出均匀的无定形氧化膜,击穿电场强度±10~6V·cm~(-1),电阻率 10~(15)Q-cm,折射率1.83-1.85(λ=6328(A|°)). 根据AES-XPS的分析,刚生长的阳极氧化层,沿深度可分为三层,第一是缺砷层,靠近表面,厚度～100(A|°);第二层是中心区,组成几乎不随深度变化,Ga/As原子比1.2—1.6,用XPS发现此层的As为未氧化的砷和As_2O_3的砷,第三层是从氧化物到GaAs的过渡区,氧浓度开始下降,此层富砷,而且存在元素砷.在300℃氮氛下退火一小时,可得到过渡区变薄且组成匀一的层.     

GaAs表面旋转超声雾化清洗新技术

研究了一种新型湿法化学清洗半导体GaAs表面的方法。通过简单设计清洗工艺能使GaAs表面产生最低的损伤。GaAs表面清洗必须满足三个条件：(1)清除热力学不稳定因素和表面粘附的杂质,(2) 除去GaAs表面氧化层,(3)提供一个光滑平整的GaAs表面。本文采用旋转超声雾化方式用有机溶剂除去GaAs表面的杂质,再用NH4OH:H2O2:H2O= 1:1:10和HCl:H2O2:H2O=1:1:20顺次腐蚀非常薄的GaAs层,去除表面的金属污染,并在GaAs表面形成一个非常薄的氧化层表面,最后用NH4OH:H2O= 1:5溶液来清除GaAs表面氧化层。测试GaAs表面的特性,分别用X射线光电光谱仪、X射线全反射荧光光谱仪和原子力显微镜测试了GaAs表面氧化的组分、GaAs表面金属污染和GaAs表面形貌,测试结果表明通过旋转超声雾化技术清洗可提供表面无杂质污染、金属污染和表面非常光滑的GaAs衬底,以供外延生长。     

利用C6H8O7/H2O2溶液对AlxGa1-xAs/GaAs的

针对MEMS(micro-electro-mechanical svstem)工艺中牺牲层的选择性腐蚀问题,提出了一种判断牺牲层是否完全腐蚀的新方法,解决了这一工艺难点.测定了C6H8O7/H2O2溶液对GaAs的腐蚀速率,并采用这种方法选择性腐蚀了一个带有GaAs牺牲层的DBR(distributed bragg reflector)结构,得到一个空气腔结构,结合GaAs的晶体结构,分析了GaAs的各向异性腐蚀特性,为实际MEMS器件的制作奠定了基础.     

Selective wet etch of a TaN metal gate with an amorphous-silicon hard mask

The appropriate wet etch process for the selective removal of TaN on the HfSiON dielectric with an amorphous-silicon(a-Si) hardmask is presented.SCI(NH_4OH:H_2O_2:H_2O),which can achieve reasonable etch rates for metal gates and very high selectivity to high-k dielectrics and hardmask materials,is chosen as the TaN etchant. Compared with the photoresist mask and the tetraethyl orthosilicate(TEOS) hardmask,the a-Si hardmask is a better choice to achieve selective removal of TaN on the HfSiON dielectric be...     

GaAs抛光片腐蚀过程初步研究

采用Ｘ射线衍射、Ｘ射线双晶衍射和Ｘ射线荧光三种手段对经Ｈ２ＳＯ４：Ｈ２Ｏ２：Ｈ２Ｏ＝１６：１：１和３：１：１腐蚀液,在不腐蚀条件下得到的ＧａＡｓ片子进行近表层结晶完整性、片子表面的残留产物以及发射二次Ｘ射线情况测量,并初步分析了这些数据。     

A novel trench capacitor enhancement approach by selective liquid-phase deposition

For the first time, a novel and simple trench bottle integrated process is demonstrated on dynamic random access memory (DRAM) manufacturing by selective liquid phase deposition (S-LPD) oxide. After photoresist (PR) filled into a deep trench (DT) and was recess etched at around 1.3 /spl mu/m depth, LPD oxide can be selected as a deposit onto the DT sidewall but not as a deposit on the PR surface. This S-LPD oxide is formed by using hexa-fluosilic acid (H/sub 2/SiF/sub 6/) and water without H/sub 3/BO/sub 3/. After the PR is removed, the LPD oxide becomes a protective layer on DT upper portion. Thus, the DT bottom area can be enlarged to form a trench bottle by NH/sub 4/OH wet etching. Compared to conventional DT trench, 20% of capacitance was enhanced by this S-LPD process. This novel and low-cost method is for the first time demonstrated on 200-mm wafer 110-nm trench DRAM technology.     

无图形损伤的选择性去除微小尘粒的湿法清洗技术

The drastic shrinking of semiconductor linewidths has led to a need for new wafer cleaning strategies in the FEOL. For past technology generations, particle removal has been accomplished typically using the SC 1 (NH4OH/H2O2/H2O) solution in conjunction with megasonic energy in a wet bench, or by DI water with a high pressure jet or megasonic nozzle in a wafer scrubber. However, such techniques have been found to damage patterns, particularly narrow polysilicon gate lines. Furthermore, the etching of oxide associated with SC 1, which facilitates particle removal by an undercutting mechanism, has recently become a concern due to increasingly strict oxide budgets. An alternative technique using an atomized liquid spray nozzle on a single wafer platform is proposed. Small droplets are able to effect particle removal without damage to sensitive patterns, by control of their carrier gas (N2) flow rate. Mechanisms for particle removal will be discussed.Results using this technique show particle removal comparable to megasonics can be achieved. Furthermore, 90 nm and 65 nm polysilicon gate structures were processed with high particle removal efficiency and no damage, as were A1 lines. Effects of the N2 flow rate on particle removal and damage performance will be presented. The physical mechanism of atomized spray enables chemical etching of oxides to be minimized without sacrificing particle removal efficiency. Results using this technique in conjunction with chemistry, to further improve particle removal, will be presented. Results over a large range of particle sizes will be shown. Specific applications will be discussed.     

GaAs surface wet cleaning by a novel treatment in revolving ultrasonic atomization solution

A novel process for the wet cleaning of GaAs surface is presented. It is designed for technological simplicity and minimum damage generated within the GaAs surface. It combines GaAs cleaning with three conditions consisting of (1) removal of thermodynamically unstable species and (2) surface oxide layers must be completely removed after thermal cleaning, and (3) a smooth surface must be provided. Revolving ultrasonic atomization technology is adopted in the cleaning process. At first impurity removal is achieved by organic solvents; second NH_4OH : H_2O_2 : H_2O =1:1:10 solution and HCl : H_2O_2 : H_2O = 1:1:20 solution in succession to etch a very thin GaAs layer, the goal of the step is removing metallic contaminants and forming a very thin oxidation layer on the GaAs wafer surface;NH_4OH : H_2O =1:5 solution is used as the removed oxide layers in the end. The effectiveness of the process is demonstrated by the operation of the GaAs wafer. Characterization of the oxide composition was carried out by X-ray photoelectron spectroscopy. Metal-contamination and surface morphology was observed by a total reflection X-ray fluorescence spectroscopy and atomic force microscope. The research results show that the cleaned surface is without contamination or metal contamination. Also, the GaAs substrates surface is very smooth for epitaxial growth using the rotary ultrasonic atomization technology.     

(中国微米纳米)一种牺牲层工艺中金属电极保护方法研究

为了在牺牲层工艺中保护金属电极不被腐蚀,提出了一种利用铝层保护金属电极的方法。在试验中采用了两种铝保护层厚度300nm和1μm,在两种腐蚀液体4NH4F:1HF:2甘油和1HAC: 1NH4F中进行了试验,通过试验表明,铝金属层在两种腐蚀液体中都能够有效保护金属电极,延长牺牲层的腐蚀时间。最后,通过SOI微加速度计加工工艺进一步验证了该方法的有效性。     

酸性CuCl2蚀刻液动态蚀刻均匀性与蚀刻速率研究

对酸性CuCl2蚀刻液在HCl/H2O2和HCl/NH4Cl两种体系下进行了水平动态蚀刻研究,分别对蚀刻均匀性和蚀刻速率进行了分析,结果表明面铜粗糙度和上下喷淋对蚀刻均匀性有很大影响,HCl/NH4Cl系统相对于HCl/H2O2系统具有更高的蚀刻速率,为工业生产提供相关的数据参考。     

TaN wet etch for application in dual-metal-gate integration technology

Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O_3/H_2O and NH_4OH/H_2O_2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO_3/H_2O solution due to HF being included in HF/HNO_3/H_2O, and the fact that TaN is difficult to etch in the NH_4OH/H_2O_2 solution at the first stage due to the thin TaO_xN_y layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO_3/H_2O solution first and the NH_4OH/H_2O_2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and J_g-V_g characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.