Stackable nonvolatile memory with ultra thin polysilicon film and low-leakage (Ti, Dy)xOy for low processing temperature and low operating voltages

We report the fabrication process as well as material and electrical characterization of ultra thin body (UTB) thin film transistors (TFTs) for stackable nonvolatile memories by using in situ phosphorous doped low-temperature polysilicon followed by the chemical mechanical polishing (CMP) process. The resulting polysilicon film is about 13 nm thick with approximately 10¹⁹ cm⁻³ doping. Root mean square surface roughness below 1 nm is achieved. Metal nanocrystals and high-k dielectric are selected for storage nodes and tunneling barriers to achieve low operating voltages. The number density and average diameter of nanocrystals embedded in the gate stack are 7.5 × 10¹¹ cm⁻² and 5.8 nm, respectively. Furthermore, scanning transmission electron microscopy (STEM), convergent beam electron diffraction (CBED) and electron energy loss spectroscopy (EELS) are performed for material characterization. The dielectric constant of the (Ti, Dy)_xO_y film is 35, and the off-state leakage current at −1 V bias and 2.8 nm equivalent oxide thickness is 5 × 10⁻⁷ A/cm². We obtain a memory window of about 0.95 V with ±6 V program/erase voltages. Our results show that UTB TFT is a promising candidate for the three-dimensional integration in high-density nonvolatile memory applications.     

Characterizations of high resistivity TiNxOy thin films for applications in thin film resistors

We report about developing high resistivity thin film resistors using titanium oxy-nitride. Titanium nitride films of different thicknesses ranging from 50 to 300 nm were deposited on SiO₂/Si substrates using the reactive magnetron sputtering method. After deposition, these films were annealed in the air ambient. The structural and electrical properties of the films were examined as a function of annealing temperature. The samples with various thicknesses show TiN(1 1 1) phase. The sheet resistance increases from 150 up to 420 Ω/□ when the film thickness decreases from 300 to 50 nm. Temperature coefficience of resistance (TCR) of the films significantly decreased with decreasing the film thickness. The TCR of 50-nm thick film is quite low, about 49 ppm/K.     

Electrical properties of metal-ferroelectric-insulator-semiconductor structure using BaxSr1−xTiO3 for ferroelectric-gate field effect transistor

Perovskite ferroelectric Ba_xSr_1−xTiO₃ (x = 0.5, 0.6, 0.7 and 0.8) thin films have been fabricated as metal-ferroelectric-insulator-semiconductor (MFIS) configurations using a sol-gel technique. The C-V characteristics for different Ba-Sr ratios and different film thicknesses have been measured in order to investigate the ferroelectric memory window effect. The results show that the memory window width increases with the increase both of Ba content and film thickness. This behavior is attributed to the grain size and dipole dynamics effect. It is found also that the memory window increases as the applied voltage increases. In addition, the leakage current density for the films is measured and it is found to be of the order of 10⁻⁸ A/cm² for all tested samples, indicating that the films have good insulating characteristics.     

MOCVD fluorine free WSix metal gate electrode on high-k dielectric for NMOS technology

We report material and electrical properties of tungsten silicide metal gate deposited on 12 in. wafers by chemical vapor deposition (CVD) using a fluorine free organo-metallic (MO) precursor. We show that this MOCVD WSi_x thin film deposited on a high-k dielectric (HfSiO:N) shows a N+ like behavior (i.e. metal workfunction progressing toward silicon conduction band). We obtained a high-k/WSi_x/polysilicon “gate first” stack (i.e. high thermal budget) providing stable equivalent oxide thickness (EOT) of ∼1.2 nm, and a reduction of two decades in leakage current as compared to SiO₂/polysilicon standard stack. Additionally, we obtained a metal gate with an equivalent workfunction (EWF) value of ∼4.4 eV which matches with the +0.2 eV above Si midgap criterion for NMOS in ultra-thin body devices.     

High performance TaYOx-based MIM capacitors

TaYO_x-based metal-insulator-metal (MIM) capacitors with excellent electrical properties have been fabricated. Ultra-thin TaYO_x films in the thickness range of 15-30 nm (EOT ∼ 2.4-4.7 nm) were deposited on Au/SiO₂ (100 nm)/Si (100) structures by rf-magnetron co-sputtering of Ta₂O₅ and Y₂O₃ targets. TaYO_x layers were characterized by X-ray photoelectron spectroscopy (XPS), energy dispersive X-ray (EDX) and X-ray diffraction (XRD) to examine the composition and crystallinity. An atomic percentage of Ta:Y = 58.32:41.67 was confirmed from the EDX analysis while XRD revealed an amorphous phase (up to 500 °C) during rapid thermal annealing. Besides, a high capacitance density of ∼3.7-5.4 fF/μm² at 10 kHz (ε_r ∼ 21), a low value of VCC (voltage coefficients of capacitance, α and β) have been achieved. Also, a highly stable temperature coefficient of capacitance, TCC has been obtained. Capacitance degradation phenomena in TaYO_x-based MIM capacitors under constant current stressing (CCS at 20 nA) have been studied. It is observed that degradation depends strongly on the dielectric thickness and a dielectric breakdown voltage of 3-5 MV/cm was found for TaYO_x films. The maximum energy storage density was estimated to be ∼5.69 J/cm³. Post deposition annealing (PDA) in O₂ ambient at 400 °C has been performed and further improvement in device reliability and electrical performances has been achieved.     

Electrodepositing ZnxMnyOz alloys from zinc oxide to manganese oxide

Electrodeposition has emerged as a practical and simple method to synthesise semiconductor materials under different forms, thin films or nanostructured layers. This work reports on the cathodic electrodeposition of ZnMnO thin layers using both zinc and manganese chlorides as precursors. The composition of thin films can be varied from binary zinc oxide to manganese oxide varying the Mn/(Mn+Zn) ratio between 0 and 1. The composition of Zn_xMn_yO_z films was obtained by energy dispersive spectroscopy. Zn_1−xMn_xO films with Mn/Zn ratio less than 10% exhibit a crystalline wurtzite structure typical of ZnO fully oriented in the (0 0 2) direction. Higher Mn content leads to deformation of the ZnO lattice and the wurtzite structure is no longer maintained. X-ray photoelectron spectroscopy points out that Mn₃O₄ tends to be deposited when a high Mn/Zn ratio is used in the starting solution. Magnetic measurements on films with Mn/(Zn+Mn) ratio near 1 reveal magnetic characteristics similar to Mn₃O₄ compounds. The transmission spectra of Zn_xMn_yO_z show the typical absorption edge of crystalline ZnO while the wurtzite structure is maintained and it shifts to higher wavelengths when Mn content increases.     

Effect of a critical percolation threshold in purified short carbon nanotube-polymer/ZnS:Cu,Cl composite on electroluminescence

AC driven inorganic electroluminescence (EL) of the carbon nanotube (CNT)-polymer/phosphor composite was fabricated to investigate the effect of the critical percolation threshold by CNT concentration on EL performance. In order to control the appropriate CNT condition in EL device, CNTs were shortened by cryogenic crushing and purified by thermal treatment. Among various CNT concentrations in the composite film, the critical percolation threshold can be found to be 0.0925 wt.% by fitting conductivity data of the composite film. Near the critical percolation threshold of a CNT concentration, the EL performances of the composite EL were greatly increased compared to the reference EL. The tunneling barrier thickness at the ZnS–Cu_xS contact could become thin to induce more charge carrier tunneling into ZnS host lattice by the local field enhancement of CNTs, resulting in increased electron–hole recombination to produce more light emission.     

Study of electrical and optical properties of CNx thin films deposited by reactive magnetron sputtering

The study concerns the CN_x thin films deposited by Low Pressure Hot Target Reactive Magnetron Sputtering (LP-HTRMS). The thin film resistance changes with relative humidity (RH) and optical properties have been studied in the range of 300-653 K. The temperature coefficients of resistivity changes were −2.5%/K at 300 K and −0.5%/K at 500 K. The activation energy of conductivity E_ρ was found to be 0.21 eV in the case of unannealed sample and 0.44 eV when the sample was annealed at 653 K. The CN_x thin films fastness to light was tested in the range of 200-2500 nm by measuring their transmittance. The calculations of absorption carrying out with Tauc formula proved the dominance of indirect optical transitions with Eg energy of 1.04 eV and direct transitions of Eg 2.05 eV. The UV radiation was fully absorbed and light transmission was ca. 90% in the range from visible radiation to far infrared of 1000-2500 nm. The CN_x thin films showed the high resistance sensitivity to RH changes. At T = 300 K resistance changed from 882 M Ω for 36% RH to 386 k Ω for 85% RH. The CN_x thin films susceptibility to humidity was observed in case of both DC and AC current (100 Hz to 10 kHz) measurements. The Si₃N₄ or SiC buffer adhesive layer was incorporated between CN_x film and substrate and its influence on CN_x electrical properties was observed.     

Investigation of the electrical transport mechanism in VOx thin films

Vanadium oxide VO₂ is a material that transforms from semiconductor to a metal state at a temperature of 67 °C. This phase transformation is accompanied by a dramatic change in its electrical and optical properties. Therefore, vanadium oxide thin films are most attractive for switching applications. Non-stoichiometric thin films of VO_x, including VO₂, also present such thermal response.This paper presents the optical and electrical properties of vanadium oxide thin films deposited by vacuum thermal evaporation of a metal vanadium with follows oxidation. We have studied the electro-physical behavior of these films during their phase transition. It was shown that the electrical transport mechanism of the obtained vanadium oxide films differ in low and high electrical fields. In low electrical fields, conductivity is obtained by the Schottky transport mechanism, whereas in high electrical fields, conductivity ranges from Ohmic, for medium fields, to Poole-Frenkel for higher fields. Also, FTIR and near IR reflectance characteristics of the obtained films are presented.     

Comparison of radio frequency physical vapor deposition target material used for LaOx cap layer deposition in 32 nm NMOSFETs

The MOSFET gate length reduction down to 32 nm requires the introduction of a metal gate and a high-K dielectric as gate stack, both stable at high temperature. Here we use a nanometric layer of Lanthanum to shift the device threshold voltage from 500 mV. Because this layer plays a key role in the device performance and strongly depends on its deposition process, we have compared two LaO_x deposition methods in terms of physical properties and influence on electrical NMOS device parameters. Chemical characterizations have shown a different oxidization state according to Lanthanum thickness deposited. It has been related to threshold voltage shift and gate leakage current variations on NMOS transistors. Furthermore mobility extractions have shown that Lanthanum is a cause of mobility degradation.     

The TCR of Ni24.9Cr72.5Si2.6 thin films deposited by DC and RF magnetronsputtering

The temperature coefficient of resistance (abbreviated as TCR) of thin film resistors on some sensor chips,such as thermal converters,should be less than several ppm/℃.However,the TCR of reported thin films is larger than 5 ppm/℃.In this paper,Ni_24.9Cr_72.5Si_2.6 films are deposited on silicon dioxide film by DC and RF magnetron sputtering.Then as-deposited films are annealed at 450℃ under different durations in N₂ atmosphere. The sheet resistance of thin films with various thickness and annealing time are measured by the four probe resistivity test system at temperature of 20,50,100,150,and 200℃ and then the TCR of thin films are calculated. Experimental results show that the film with the TCR of only-0.86 ppm/℃ can be achieved by RF magnetron sputtering and appropriate annealing conditions.     

TaNx thin films as copper barriers sputter-deposited at various NH3-to-Ar flow ratios

To optimize the performance of copper diffusion barriers, we deposited TaN_x thin films through radio frequency (RF) sputtering at various flow ratios of the reactive gases NH₃ and Ar. The composition of the film changed from Ta₂N to TaN, as evidenced from deposition rates and N-to-Ta ratios, when we increased the NH₃-to-Ar flow ratio from 0.075 to 0.3. Furthermore, the structure of the TaN_x thin film transformed from body-centered cubic (BCC) to face-centered cubic (FCC) to nanocrystalline upon increasing the NH₃-to-Ar flow rate, as revealed by the three steps in the rate of formation of the TaN_x films during the sputtering process. When incorporated in Cu/TaN_x/n⁺np⁺ diodes, the thermal stability of the TaN_x thin film—measured in terms of the leakage current remaining below 3 μA—increased from 450 to 550 °C upon increasing the NH₃-to-Ar flow ratio from 0.075 to 0.3. It appears that the NH₃-to-Ar flow ratio influences the properties of TaN_x films predominantly through modification of the crystal structure.     

SrO capping effect for La2O3/Ce-silicate gate dielectrics

The chemical bonding states and electrical characteristics of SrO capped La₂O₃/CeO_x gate dielectric have been examined. Angle-resolved X-ray photoelectron spectroscopy measurement has revealed that Sr atoms diffuse into silicate layer to form SrLa-silicate after annealing. Owing to the incorporation of Sr atoms into silicate layer, a transistor operation with an equivalent oxide thickness (EOT) below 0.5 nm has been demonstrated. A strongly degraded effective electron mobility of 78 cm²/V s at 1 MV/cm has been obtained, which fit well with the general trend in small EOT range below 1 nm. Although process optimization is needed to improve the performance of transistors, Sr capping technique can be useful for EOT scaling.     

Electrical demonstration of thermally stable Ni silicides on Si1−xCx epitaxial layers

In this paper we report on electrical demonstration of thermally stable Ni silicides. It has been shown that when a sacrificial Si_1−xC_x epilayer is grown in the source-drain areas of NMOS transistors prior to silicidation, Ni silicides can withstand a 30 min anneal at 750 °C and demonstrate excellent electrical performance. We have observed carbon segregation at the NiSiC/Si_1−xC_x interface which can explain the increased NiSiC thermal stability. We have experimentally demonstrated feasibility of CMOS device implementation of thermally stable Ni silicides.     

Structural and electrical properties of stable ni/cr thin films

The electrical and structural properties of nickel-chrome (NiCr) thin film resistors were studied for the effect of post-deposition annealing on stability. The temperature coefficient of resistance (TCR) of sheet resistivities in the range of 100 to 200 Ω/□ could be improved by both air and vacuum annealing to achieve 5 ± 5 ppm/°C over the temperature range of -180° C to +100° C. With stability tests, air annealing proved to be more favorable for stable TCR. Studies via SIMS and ESCA identified surface segregation of Cr whereas TEM micrographs revealed correlating structural transformation of the films upon annealing. An intentional impurity, Si, played an important role in achieving a low TCR.     

Influence of rapid thermal annealing temperature on structure and electrical properties of high permittivity HfTiO thin film used in MOSFET

HfTiO thin films were prepared by r.f. magnetron co-sputtering on Si substrate. To improve the electrical properties, HfTiO thin films were post heated by rapid thermal annealing (RTA) at 400 °C, 500 °C, 600 °C and 700 °C in nitrogen. It was found that the film is amorphous below 700 °C and at 700 °C monoclinic phase HfO₂ has occurred. With the increase of the annealing temperature, the film becomes denser and the refractive index increases. By electrical measurements, we found at 500 °C annealed condition, the film has the best electrical property with the largest dielectric constant of 44.0 and the lowest leakage current of 1.81 × 10⁻⁷ A/cm², which mainly corresponds to the improved microstructure of HfTiO thin film. Using the film annealed at 500 °C as the replacement of SiO₂ dielectric layer in MOSFET, combining with TiAlN metal electrode, a 10 μm gate-length MOSFET fabricated by three-step photolithography processes. From the transfer (I_DS–V_G) and output (I_DS–V_DS) characteristics, it shows a good transistor performance with a threshold voltage (V_th) of 1.6 V, a maximum drain current (I_ds) of 9 × 10⁻⁴ A, and a maximum transconductance (G_m) of 2.2 × 10⁻⁵ S.     

热环境对微机械多晶硅薄膜电阻电特性的影响

将 CMOS工艺和微机械加工技术相结合 ,制作出悬空式微桥支撑、薄膜支撑以及无悬空结构的微机械多晶硅薄膜电阻。通过对样品的电阻温度系数 ( TCR)和电流 ( I) -电压 ( V)特性的测量 ,研究了热隔离程度、工作气压等热环境对多晶硅薄膜电阻电学特性的影响程度     

硅基高精度镍铬薄膜电阻的制备和性能表征

集成无源元件（IPD）技术可以将分立的无源元件集成在衬底内部,提高系统的集成度。为了获得高精度的薄膜电阻,采用多层薄膜电路工艺在硅晶圆上制备了不同线宽的镍铬薄膜电阻,利用显微镜和半导体参数测试仪对薄膜电阻的图形线宽及电学特性进行了表征及测试。结果表明,制备出的镍铬薄膜电阻线宽精度在±5%以内,电阻精度在±0.5%以内,具有稳定的电学特性。基于镍铬的高精度硅基无源集成电阻器在系统集成中有广泛的应用价值。     

Epitaxial ferroelectric PbZrxTi1–xO3 thin films for non-volatile memory applications

Epitaxial ferroelectric PbZr_xTi_1–xO₃ (PZT) thin film capacitors with SrRuO₃ (SRO) bottom electrodes have been fabricated by pulsed laser deposition on LaAlO₃ (0 0 1) substrates. X-ray diffraction measurements revealed that epitaxial heterostructures with a high crystalline quality were obtained. Ferroelectric capacitors were defined by thermal evaporation of aluminium contact pads onto the PZT films. Remnant polarizations of about 13 μC/cm² and coercive fields of about 150 kV/cm are obtained at a frequency of 10 Hz. The capacitors show very little fatigue of the remnant polarization with cumulative switching. A tendency to imprint, arising from the use of asymmetric electrodes, is observed.     

Polycrystalline silicon resistors for integrated circuits

The suitability of thin films of doped polycrystalline silicon on SiO₂ substrates for the production of high value resistors for monolithic integrated circuits is considered. Resistors fabricated from this material posses the advantages of high sheet resistivity and dielectric isolation while still preserving an all silicon technology compatible with conventional production techniques.Relevant structural and electrical properties of doped polycrystalline films produced by both vacuum evaporation onto hot substrates with gas-doping and by diffusion-annealing of amorphous films have been investigated. Sheet resistivities and TCR values measured on 2500 Å polycrystalline films have proved superior to those encountered with conventional diffused resistors. Typically films with sheet resistivities of 1 kΩ/□ had TCR's of ?1000 ppm/°C while conventional diffused resistors are generally made from material of 200 Ω/□ and +2000 ppm/°C TCR. Etched resistor line widths of 0·25 mil. have been obtained in the polycrystalline material employing conventional photolithographic techniques. The temperature stability and linearity of doped polycrystalline resistors have been investigated.