A new model for the low-frequency noise and the noise levelvariation in polysilicon emitter BJTs

Presents a new, physically-based model for the low-frequency noise in high-speed polysilicon emitter bipolar junction transistors (BJTs). Evidence of the low-frequency noise originating mainly from a superposition of generation-recombination (g-r) centers is presented. Measurements of the equivalent input noise spectral density (SIB) showed that for BJTs with large emitter areas (AE) S(I_B) is proportional to 1/f, as expected. In contrast, the noise spectrum for BJTs with submicron A_E showed a strong variation from a 1/f-dependence, due to the presence of several g-r centers. However, the average spectrum 〈S(I_B)〉 has a frequency dependence proportional to 1/f for BJTs with large as well as small A_E. The proposed model, based only on superposition of g-r centers, can predict the frequency-, current-, area-, and variation-dependency of 〈S(I_B)〉 with excellent agreement to the measured results     

Polysilicon emitter p-n-p transistors

In-situ boron-doped polysilicon has been used to form the emitter in p-n-p transistors. Various polysilicon deposition conditions, interface preparation treatments prior to deposition, and post-deposition anneals were investigated. Unannealed devices lacking a deliberately grown interfacial oxide gave effective emitter Gummel numbers G_E of 7-9×10^-12s cm^-4 combined with emitter resistances R_E of approximately 8 μΩcm². Introduction of a chemically grown interfacial oxide increased G_E to 2×10 ¹⁴s cm^-4, but also raised R_E by a factor of three. Annealing at 900°C following polysilicon deposition raised G_E values for transistors lacking deliberate interfacial oxide to approximately 6×10¹³s cm^-4, but had little effect of G_E for devices with interfacial oxide. Both types of annealed devices gave R_E values in the range 1-2 μΩcm²     

Design study of AlGaAs/GaAs HBTs

The frequency performance of AlGaAs/GaAs heterojunction bipolar transistors (HBTs) having different layouts, doping profiles, and layer thicknesses was assessed using the BIPOLE computer program. The optimized design of HBTs was studied, and the high current performances of HBTs and polysilicon emitter transistors were compared. It is shown that no current crowding effect occurs at current densities less than 1×10⁵ A/cm² for the HBT with emitter stripe width S_E<3 μm, and the HBT current-handling capability determined by the peak current-gain cutoff frequency is more than twice as large as that of the polysilicon emitter transistor. An optimized maximum oscillation frequency formula has been obtained for a typical process n-p-n AlGaAs/GaAs HBT having base doping of 1×10 ¹⁹ cm^-3     

Fluorine effects in n-p-n double-diffused polysilicon emitterbipolar transistors

We demonstrate that fluorine incorporation in the polysilicon emitter of n-p-n double-diffused bipolar transistors during BF₂ implantation at a dose of 1×10¹⁵ cm^-2 significantly alters the device electrical characteristics. In particular, tunneling emitter/base currents are observed at both forward and reverse voltages, due to excessive base dopant concentration at the junction. Fluorine-enhanced interfacial oxide break-up and epitaxial realignment of the poly-Si emitter are shown to be responsible for these results     

The effects of geometrical scaling on the frequency response andnoise performance of SiGe HBTs

We examine the geometrical scaling issues in SiGe HBT technology. Width Scaling, length scaling, and stripe-number scaling are quantified from a radio frequency (RF) design perspective at 2 GHz. We conclude that a SiGe HBT with emitter area A_E=0.5×20×6 μm² is optimum for low noise applications at J_c=0.1 mA/μm² and f=2 GHz using the design methodology, which guarantees optimal noise and input impedance matching with the simplest matching network. Finally, the optimal device sizes at f=4 and 6 GHz for low noise applications are also obtained using the same method     

Optimization of silicon bipolar transistors for high current gainat low temperatures

Bipolar transistors designed specifically for operation at liquid-nitrogen (LN₂) temperature are discussed. It is found that for high-gain LN₂ bipolar transistors, the emitter concentration should be around 5×10¹⁸ cm^-3. Compensating impurities in the base should be kept to minimum. Test bipolar transistors with polysilicon emitter contacts were fabricated using these criteria. The devices show very little current degradation between room temperature and 77 k. Polysilicon emitter contacts are also shown to be somewhat more effective at lower temperatures     

Emission cross sections and spectroscopy of Ho3+ laserchannels in KGd(WO4)2 single crystal

The spectroscopic properties of Ho³⁺ laser channels in KGd(WO₄)₂ crystals have been investigated using optical absorption, photoluminescence, and lifetime measurements. The radiative lifetimes of Ho³⁺ have been calculated through a Judd-Ofelt (JO) formalism using 300-K optical absorption results. The JO parameters obtained were Ω₂=15.35×10^-20 cm², Ω ₄=3.79×10^-20 cm², Ω₆ =1.69×10^-20 cm². The 7-300-K lifetimes obtained in diluted (8·10¹⁸ cm^-3) KGW:0.1% Ho samples are: τ(⁵F₃)≈0.9 μs, τ( ⁵S₂)=19-3.6 μs, and τ(⁵F₅ )≈1.1 μs. For Ho concentrations below 1.5×10²⁰ cm^-3, multiphonon emission is the main source of non radiative losses, and the temperature independent multiphonon probability in KGW is found to follow the energy gap law τ_ph ^-1(0)=βexp(-αΔE), where β=1.4×10^-7 s^-1, and α=1.4×10³ cm. Above this holmium concentration, energy transfer between Ho impurities also contributes to the losses. The spectral distributions of the Ho³⁺ emission cross section σ_EM for several laser channels are calculated in σ- and π-polarized configurations. The peak a σ_EM values achieved for transitions to the ⁵I₈ level are ≈2×10^-20 cm² in the σ-polarized configuration, and three main lasing peaks at 2.02, 2.05, and 2.07 μm are envisaged inside the ⁵I₇→⁵I₈ channel     

Measurements and modeling of MOSFET I-V characteristics withpolysilicon depletion effect

The authors study the degradation of MOSFET current-voltage (V-I) characteristics as a function of polysilicon gate concentration (N_p ), oxide thickness (t_ox) and substrate impurity concentration (N_D) using measured and modeled results. Experimentally it is found that for MOSFETs with thin gate oxide (t_ox≈70 Å) and high substrate concentration (N_D ≈1.6×10¹⁷ cm^-3) the reduction in the drain current I_DS can be as large as 10% to 20% for devices with insufficiently doped polysilicon gate (5×10¹⁸ ⩽N_p⩽1.6×10¹⁹ cm^-3). Theoretically it is shown that the drain current degradation becomes more pronounced as N_p decreases, t_ox decreases, or N_D, increases. A modified Pao-Sah model that takes into account the polysilicon depletion effect and an accurate gate-field-dependent mobility model are used to compute I-V characteristics for various values of N_p, t_ox, and N_D. Good agreement between experimental and modeled results is observed over a wide range of devices     

Metal migration into polysilicon emitter after very high currentstress

TEM analyses show metal migration into the polysilicon emitter of a bipolar transistor after high current stress. At the edges of the polysilicon emitter where the current density was expected to be the highest, a metal filament was seen penetrating into the edge of the polysilicon emitter after stressing at a current density of 16.3 mA/μm² for 1.68×10⁵ s at 90°C. The metal penetration into polysilicon offers a possible cause for an electrical measurement reported by D.D. Tang et al. (1990), in which a slight lowering of the emitter contact resistance occurs after the same stress     

Impact of nitrogen (N2+) implantation intopolysilicon gate on thermal stability of cobalt silicide formed onpolysilicon gate

A novel process which uses N₂⁺ implantation into polysilicon gates to suppress the agglomeration of CoSi₂ in polycide gated MOS devices is presented. The thermal stability of CoSi₂/polysilicon stacked layers can be dramatically improved by using N₂⁺ implantation into polysilicon. The sheet resistance of the samples without N₂⁺ implantation starts to increase after 875°C RTA for 30 s, while the sheet resistance of CoSi₂ film is not increased at all after 950 and 1000°C RTA for 30 s if the dose of nitrogen is increased up to 2×10¹⁵ cm^-2 and 6×10¹⁵ cm², respectively, and TEM photographs show that the agglomeration of CoSi₂ film is completely suppressed. It is found that the transformation to CoSi₂ from CoSi is impeded by N₂⁺ implantation such that the grain size of CoSi₂ with N₂⁺ implantation is much smaller than that without N₂⁺ implantation. As a result, the thermal stability of CoSi₂ is significantly improved by N₂⁺ implantation into polysilicon     

High-frequency dependence of channel noise in short-channel RFMOSFETs

Using a two-dimensional (2-D) Green's function technique, similar to Shockley's impedance field technique, simulation results of the drain i_d and gate induced i_g channel noise are presented for an nMOS transistor as a function of frequency. The simulation results show that for frequencies much lower than the cutoff frequency of the transistor f_t the correlation factor (i.e., i¯ _g¯i¯*_d¯/√i_g^-2 i_g^-2) between the drain and gate channel noise is equal to approximately 0.4j. For frequencies near the f_t of the device the correlation factor approximately equals 0.3j. For f/f_t~0.3, the contribution of the gate induced noise compared to the drain noise was found to be on the order of 1% (i.e., i _g^-2/i_d^-2(f_t/f) ²)     

Steady-state and transient forward current-voltage characteristicsof 4H-silicon carbide 5.5 kV diodes at high and superhigh currentdensities

Steady-state and transient forward current-voltage I-V characteristics have been measured in 5.5 kV p⁺-n-n⁺ 4H-SiC rectifier diodes up to a current density j≈5.5×10 ⁴ A/cm². The steady-state data are compared with calculations in the framework of a model, in which the emitter injection coefficient decreases with increasing current density. To compare correctly the experimental and theoretical results, the lifetime of minority carriers for high injection level, τ_ph, has been estimated from transient characteristics. At low injection level, the hole diffusion length L_pl has been measured by photoresponse technique. For a low-doped n-base, the hole diffusion lengths are L_pl≈2 μm and L_ph≈6-10 μm at low and high injection levels respectively. Hole lifetimes for low and high injection levels are τ_pl≈15 ns and τ_ph≈140-400 ns. The calculated and experimental results agree well within the wide range of current densities 10 A/cm ²3 A/cm². At j>5 kA/cm², the experimental values of residual voltage drop V is lower than the calculated ones. In the range of current densities 5×10³ A/cm²4 A/cm², the minimal value of differential resistance R_d =dV/dj is 1.5×10^-4 Ω cm². At j>25 kA/cm², R_d increases with increasing current density manifesting the contribution of other nonlinear mechanisms to the formation steady-state current-voltage characteristic. The possible role of Auger recombination is also discussed     

Impact of nitrogen (N14) implantation into polysilicongate on high-performance dual-gate CMOS transistors

The effect of nitrogen (N₁₄)implant into dual-doped polysilicon gates was investigated. The electrical characteristics of sub-0.25-μm dual-gate transistors (both p- and n-channel), MOS capacitor quasi-static C-V curve, SIMS profile, poly-Si gate R_s , and oxide Q_bd were compared at different nitrogen dose levels. A nitrogen dose of 5×10¹⁵ cm^-2 is the optimum choice at an implant energy of 40 KeV in terms of the overall performance of both p- and n-MOSFETs and the oxide Q_bd. The suppression of boron penetration is confirmed by the SIMS profiles to be attributed to the retardation effect in bulk polysilicon with the presence of nitrogen. High nitrogen dose (1×10¹⁶ cm^-2) results in poly depletion and increase of sheet resistance in both unsilicided and silicided p⁺ poly, degrading the transistor performance. Under optimum design, nitrogen implantation into poly-Si gate is effective in suppressing boron penetration without degrading performance of either p- or n-channel transistors     

Studies of diffused boron emitters: saturation current, bandgapnarrowing, and surface recombination velocity

The emitter saturation current density, J₀ was measured on diffused boron emitters in silicon for the case in which the emitter surface is passivated by a thermal oxide and for the case in which Al/Si is deposited on the emitter surface. The oxide-passivated emitters have a surface recombination velocity, s, which is near its lowest technologically achievable value. In contrast, the emitters with Al/Si on the surface have surface recombination velocities which approach the maximum possible value of s. From the J ₀ measurements, the apparent bandgap narrowing as a function of boron doping was found. Using this bandgap narrowing data, the surface recombination velocity at the Si/SiO₂ interface was extracted for surface boron concentrations from 3×10¹⁷ to 3×10¹⁹ cm^-3     

1/f noise reduction in PMOSFETs by an additional preoxidationcleaning with an ammonia hydrogen peroxide mixture

1/f noise magnitude in a 15 μm×0.5 μm PMOSFET was remarkably reduced by simply adding a cleaning step using an ammonia hydrogen peroxide mixture (APM) prior to gate oxidation. Gate input-referred noise level for APM-finished PMOSFETs at f=10 Hz was around -128 dBV²/Hz whereas for standard, HF-finished devices, the level was around -114 dBV²/Hz. Flat-band voltages (V_FBs) determined by a capacitance-voltage (C-V) measurement were -0.19 V for an APM-finished PMOS and -0.34 V for a HF-finished PMOS. Based on the V_FB values, interface state densities were determined to be N_it=3.02×10¹¹ cm^-2 for APM-finished PMOS and N_it=6.47×10¹¹ cm^-2 for HF-finished PMOS. Lower interface state density obtained by the APM preoxidation cleaning is consistent with the remarkable reduction in the 1/f noise magnitude     

Pnp HBT with 66 GHz fmax

The total emitter to collector delay for a Pnp AlGaAs/GaAs HBT has been reduced to 4.8 ps by employing a thin base (325 Å) and collector (2300 Å). Simultaneously, a low base sheet resistance of 170 ohms/square was achieved with tellurium doping. A higher collector doping than is typically used permitted operation at collector current densities in excess of 5×10⁴ A/cm². A single emitter (2×4 μm²) and a single base contact device topology has an f_t and f_max of 33 and 66 GHz, respectively     

Increasing the current density of dielectric-base transistors withan MgO emitter-base barrier

We measured the current-voltage characteristics of YBa₂Cu₃O_7-x/oxide/n-SrTiO₃ diodes using NdGaO₃, LaAlO₃, CeO₂, and MgO as the oxide. MgO films had the highest current density. We then fabricated dielectric-base transistors with a YBa₂Cu₃ O_7-x(YBCO) emitter/collector on a SrTiO₃ dielectric base with an MgO barrier. The transistors had both voltage and current gains exceeding unity at 4.2 K. The emitter current density was about 4×10³ A/cm² at a collector-emitter voltage of 10 V and base-emitter voltage 10 V; this is 2 to 3 orders of magnitude larger than that of transistors with NdGaO₃ emitter-base barrier. We obtained a transconductance of around 0.4 mS at a collector-emitter voltage of 10 V for a device with a 6-μm-diameter emitter     

High-speed performance of Si/Si1-xGexheterojunction bipolar transistors

A theoretical investigation of Si/Si_1-xGe_x heterojunction bipolar transistors (HBTs) undertaken in an attempt to determine their speed potential is discussed. The analysis is based on a compact transistor model, and devices with self-aligned geometry, including both extrinsic and intrinsic parameters, are considered. For an emitter area of 1×5 μm², an f_t of over 75 GHz and f_max of over 35 GHz were computed at a collector current density of 1×10 ⁵ A/cm² and V_CB of 5 V     

Fully-planar AlGaAs/GaAs HBT's achieved by selective CBE regrowth

This paper describes a novel fully planar AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology using selective chemical beam epitaxy (CBE). Planarization is achieved by a selective regrowth of the base and collector contact layers. This process allows the simultaneous metallization of the emitter, base and collector on top of the device. For the devices with an emitter-base junction area of 2×6 μm² and a base-collector junction area of 14×6 μm², a current gain cut off frequency of 50 GHz and a maximum oscillation frequency of 30 GHz are achieved. The common emitter current gain h_FE is 25 for a collector current density J_c of 2×10⁴ A/cm²     

Identification of a corner tunneling current component in advancedCMOS-compatible bipolar transistors

A corner tunneling current component in the reverse-biased emitter-base junction of advanced CMOS compatible polysilicon self-aligned bipolar transistors has been identified by measuring base current as a function of temperature, bias voltage, and emitter shape. This current is found to be an excess tunneling current caused by an increase in defect density in the corners of the emitter and gives rise to three-dimensional effects in small-geometry devices. The devices used for this study were selected from batches aimed at optimizing the emitter-base system. For this reason, the starting material was n-type (~10¹⁶ cm^-3) and provided the collector regions of the transistors. The intrinsic base and lightly doped extrinsic base regions were both implanted at 30 keV to a dose of 1×10¹³ cm^-2. The activation anneal was performed at 1060°C for 20 s in a rapid thermal annealer. Under such conditions, the emitter-base junction is located about 600 Å below the polysilicon-substrate interface