On the Use of Wavelet-Based Denoising to Improve Power Delay Profile Estimates from 1.8 GHz Indoor Wideband Measurements

This work presents an alternative processing scheme to improve measurement-based power delay profiles (PDP) estimates, using wavelet-based denoising. The usual PDP processing comprises cutting off all the data below a previously determined flat noise threshold. The proposed method is a more refined approach, since it tries to extract the noise from the measured data, keeping only the estimated signal. Wavelet denoising can be performed in many different ways, for it depends on several parameters, like the noise threshold selection rule, the wavelet function, the choice or not for a wavelet coefficients shrinkage and the number of decomposition levels. Several parameter combinations have been tested, in special for the Visu selection rule, which presented the best performance for the available data in the overall. Denoising was applied to real data from indoor environments, collected from wideband channel sounding surveys, centered at 1.8 GHz. Since frequency domain sounding has been carried out, denoising has been tested both directly over the frequency domain, and over the time–delay domain (PDP). The major result of the proposed processing was a qualitative improvement of the PDP, with smoother noise floors, and also with increases up to 8 dB on signal-to-noise ratios, in special for delay domain denoising.Maurício H.C. Dias was born in São Paulo, SP, Brazil on 25 July 1970. He received a degree of Telecommunication Engineer and his M.Sc. degree from Military Institute of Engineering (IME) in 1992 and 1998 respectively. In 2003, he received the degree of D.Sc. from Pontifical Catholic University of Rio de Janeiro (PUC/Rio). Since then he is back to the Electrical Engineering Department (DE/3) at Military Institute of Engineering (IME), also in Rio de Janeiro, this time as teacher and researcher. He has published a few engineering papers on national periodicals, and has also presented some articles on national and international conferences. In 2001, he has been awarded together with professor Gláucio L. Siqueira for having presented the best graduate paper on the IEEE International Microwave and Optoelectronics Conference, at Belém, Brazil. His present research interests include wave propagation, electromagnetic compatibility, space-time signal processing and wavelet theory.Gláucio L. Siqueira was born in Belo Horizonte, MG, Brazil on August, 1952. He received a degree of Electronic and Telecommunication Engineer from Pontifical Catholic University of Minas Gerais and a degree of Mathematician from Federal University of Minas Gerais in 1977 and 1978 respectively. In 1982 he received a degree of MSc from Campinas State University (UNICAMP). He received his Ph.D. degree in Electrical Engineering from University College London, England in 1989. Since them he is with Center for Telecommunication Studies (CETUC) at Pontifical Catholic University of Rio de Janeiro (PUC/Rio). He has published several research papers including two IEEE transactions, and was awarded a number of lecturing distinctions. His research interests include random media propagation, rain induced attenuation and mobile radio channel characterization and modeling. He is a member of IEEE since 1989.     

Secure Authentication System for Public WLAN Roaming

A serious challenge for seamless roaming between independent wireless LANs (WLANs) is how best to confederate the various WLAN service providers, each having different trust relationships with individuals and each supporting their own authentication schemes, which may vary from one provider to the next. We have designed and implemented a comprehensive single sign-on (SSO) authentication architecture that confederates WLAN service providers through trusted identity providers. Users select the appropriate SSO authentication scheme from the authentication capabilities announced by the WLAN service provider, and can block the exposure of their privacy information while roaming. In addition, we have developed a compound Layer 2 and Web authentication scheme that ensures cryptographically protected access while preserving pre-existing public WLAN payment models. Our experimental results, obtained from our prototype system, show that the total authentication delay is about 2 seconds in the worst case. This time is dominated primarily by our use of industry-standard XML-based protocols, yet is still small enough for practical use. Ana Sanz Merino received her B.S. degree in Electrical Engineering from Universidad Politécnica de Madrid (Spain) in 1999. She was the recipient of the Fundación Telefónica award to the best final thesis in telecommunications networks and services published in Spain in the 1999–2000 academic year. Her area of expertise is data communications, a field in which she has worked in R&D since 1998, first at Universidad Politécnica de Madrid, and later for two companies in the telecom sector, Telefónica and Ericsson. Presently, she is a student of the M.S. in Computer Science and a researcher at University of California, Berkeley, where she works on wireless network security with Professor Randy H. Katz. Yasuhiko Matsunaga is a researcher at NEC Corporation, Japan. He specializes in resource and security management in wireless and broadband networks. He received B.S and M.S degrees from the University of Tokyo in 1992 and 1994. He was a visiting researcher at the computer science division at the University of California, Berkeley from Dec. 2002 to Dec. 2003. Manish Shah is a third year undergraduate student at University of California, Berkeley Computer Science Department. He has been doing research with Prof. Katz and the Sahara Group since May 2003. His research interests are networking related focusing on wireless systems and technologies. He has recently been involved in sensor network related research. Takashi Suzuki received B.E and M.E. degrees in communication engineering from Osaka University, Japan, in 1994 and 1996, respectively. In 1996, he joined NTT DoCoMo, Japan, where he was engaged in research and development of mobile multimedia communication protocols. He was a visiting industrial fellow at University of California, Berkeley from 2001 to 2003, where he worked on web service security and WLAN security. He is now engaged in research on secure mobile terminal architecture at Multimedia Laboratories of NTT DoCoMo. Randy Howard Katz received his undergraduate degree from Cornell University, and his M.S. and Ph.D. degrees from the University of California, Berkeley. He joined the faculty at Berkeley in 1983, where he is now the United Microelectronics Corporation Distinguished Professor in Electrical Engineering and Computer Science. He is a Fellow of the ACM and the IEEE, and a member of the National Academy of Engineering. He has published over 200 refereed technical papers, book chapters, and books. His hardware design textbook, Contemporary Logic Design, has sold over 85,000 copies worldwide, and has been in use at over 200 colleges and universities. He has supervised 35 M.S. theses and 21 Ph.D. dissertations, and leads a research team of over a dozen graduate students, technical staff, and industrial visitors. He has won numerous awards, including seven best paper awards, one “test of time” paper award, one paper selected for a 50 year retrospective on IEEE communications publications, three best presentation awards, the Outstanding Alumni Award of the Computer Science Division, the CRA Outstanding Service Award, the Berkeley Distinguished Teaching Award, the Air Force Exceptional Civilian Service Decoration, the IEEE Reynolds Johnson Information Storage Award, the ASEE Frederic E. Terman Award, and the ACM Karl V. Karlstrom Outstanding Educator Award. With colleagues at Berkeley, he developed Redundant Arrays of Inexpensive Disks (RAID), a $25 billion per year industry sector today. While on leave for government service in 1993–1994, he established whitehouse.gov and connected the White House to the Internet. His current research interests are Internet Services Architecture, Mobile Internet, and the technologies underlying the convergence of telecommunications and packet networks. Prior research interests have included: database management, VLSI CAD, and high performance multiprocessor and storage architectures.This revised version was published online in August 2005 with a corrected cover date.     

Testing Biquad Filters under Parametric Shifts Using X-Y Zoning

Testing mixed-signal circuits is a difficult task due to defect modeling challenges, observability and controllability restrictions and ATE bandwidth limitations. In this paper, the X-Y Zoning test of a Biquad filter is addressed to select the optimal excitation frequency and the best partition of the X-Y plane. Thus we obtain the best sensitivity of the BIST scheme to parametric shifts of the parameters defining the filter. The study has been particularized to shifts in the natural frequency f₀ of the Biquad filter. Analytical results on the best input as well as the best partition of the observed X-Y Lissajous plots are obtained. Extensive MATLAB simulations validate the proposal, which has also been validated experimentally. For these experiments, multiple implementations of the Biquad with nominal and shifted parameters have been performed using a commercial Field Programmable Analog Array (FPAA). The experimental measures show good correlation with the analytical expressions and the simulations performed, and validate the proposed testing methodology.Ricard Sanahuja is Associate Professor in the Electronic Engineering Department of the Universitat Politècnica de Catalunya in Manresa (Barcelona), with teaching responsibilities in microelectronics. His current research interest is centred in Mixed-Signal Testing which offers the bases of his Ph.D. Sanahuja received his Electronic Engineering degree in 1997 from the Universitat Autònoma de Barcelona and Universitat Politècnica de Catalunya.Victor Barcons is Associate Professor in the Electronic Engineering Department of the Universitat Politècnica de Catalunya in Manresa (Barcelona), with teaching responsibilities in analog electronics. His current research interest are in Mixed-Signal Testing and Vibration Test Control Systems. Barcons received his Industrial Engineering degree in 1994 from the Universitat Politècnica de Catalunya.Luz Balado received the degree in Industrial Engineering in 1980 from the Universitat Politècnica de Catalunya (UPC) and the Doctor degree in Electronic Engineering in 1986. She is presently Associate Professor at the Electronic Engineering Department of the UPC where teaches Electronics and Electronic Instrumentation and is involved in its Microelectronics and Test research Group. Her main research interests are Design and Test of digital and mixed-signal circuits and defect modeling.Joan Figueras received his Ph.D. degrees from the Universitat Politecnica de Catalunya (UPC), and the University of Michigan in Ann Arbor, Mich. where he was a Fulbright Scholar and worked in the Systems Engineering Laboratory. Currently he is Professor at the the Electronics Engineering Dpt. of the UPC in Barcelona, Spain, with teaching and research responsibilities in the area of electronics and VLSI design. His present research interests include emerging design and test techniques for high performance and low power electronic circuits. He is at present, member of the Editorial Board of the Journal of Electronic Testing (JETTA), Editor of a special issue of the IEEE Transactions on Computer Aided Design, and Chair of the European IEEE Test Technology Technical Council.     

Design of a Class E Power Amplifier with LDMOS in Standard CMOS

This paper describes the development of a high-voltage transistor in a standard 0.35 μm CMOS technology and its application on a class E power amplifier for mobile communications. The use of a higher voltage already available in the battery has the benefit of reducing the electromigration constrains and having lower voltage drops in the interconnects due to the use of a lower current.Measured results on the active device and simulation show that is possible to achieve a higher power added efficiency using a lateral double diffused MOS, while reducing the current draining the battery.João Ramos (S’02) was born in Angola, in 1974. He received the Licenciatura degree in Electrical Engineering and Computer Science from Instituto Superior Técnico, Lisbon, Portugal.Currently, he is a research assistant at the ESAT-MICAS group of the Katholieke Universiteit Leuven. He is working towards a Ph.D. degree on RF CMOS Power Amplifiers. For this work, he obtained a scholarship from the FCT, Portugal.Michiel S.J. Steyaert (S’85–A’89–SM’92–F’03) was born in Aalst, Belgium, in 1959. He received the M.Sc. degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (KU Leuven), Heverlee, Belgium, in 1983 and 1987, respectively.From 1983 to 1986, he was a Research Assistant with the Laboratory ESAT at KU Leuven, funded by an IWNOL fellowship (Belgian National Foundation for Industrial Research). In 1987, as an IWONL Project Researcher, he was responsible for several industrial projects in the field of analog micropower circuits with the Laboratory ESAT. In 1988, he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989, he was a Research Associate appointed by the National Fund of Scientific Research (Belgium); in 1992, he was promoted to a Senior Research Associate, and in 1996, he became Research Director at the Laboratory ESAT, KU Leuven. Between 1989 and 1996, he was also a part-time Associate Professor. He is currently a Full Professor at the KU Leuven. His current research interests include high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing.Prof. Steyaert received the European Solid-State Circuits Conference Best Paper Award in 1990 and 2001. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone Award for innovative work in integrated circuits for telecommunications. In 1995 and 1997, he received the IEEE-ISSCC Evening Session Award, and the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award.     

Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems

In this paper, a novel reconfigurable discrete wavelet transform processor architecture is proposed to meet the diverse computing requirements of future generation multimedia SoC. The proposed architecture mainly consists of reconfigurable processing element array and reconfigurable address generator, featuring dynamically reconfigurable capability where the wavelet filters and wavelet decomposition structures can be reconfigured as desired at run-time. The lifting-based reconfigurable processing element array possesses better computation efficiency than convolution-based architectures, and a systematic design method is provided to generate the hardware configurations of different wavelet filters for it. The reconfigurable address generator handles flexible address generation for data I/O access in different wavelet decomposition structures. A prototyping chip has been fabricated by TSMC 0.35 μm 1P4M CMOS process. At 50 MHz, this chip can achieve at most 100 M pixels/sec transform throughput, together with energy efficiency and unique reconfigurability features, proving it to be a universal and extremely flexible computing engine for heterogeneous reconfigurable multimedia systems.Po-Chih Tseng was born in Tao-Yuan, Taiwan in 1977. He received the B.S. degree in Electrical and Control Engineering from National Chiao Tung University in 1999 and the M.S. degree in Electrical Engineering from National Taiwan University in 2001. He currently is pursuing the Ph.D. degree at the Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University. His research interests include VLSI design and implementation for signal processing systems, energy-efficient reconfigurable computing for multimedia systems, and power-aware image and video coding systems.Chao-Tsung Huang was born in Kaohsiung, Taiwan, R.O.C., in 1979. He received the B.S. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 2001. He currently is working toward the Ph.D. degree at the Graduate Institute of Electronics Engineering, National Taiwan University. His major research interests include VLSI design and implementation for signal processing systems.Liang-Gee Chen (S’84–M’86–SM’94–F’01) received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C., in 1979, 1981, and 1986, respectively. In 1988, he joined the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C. During 1993–1994, he was a Visiting Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department of Electrical Engineering, University of Washington, Seattle. Currently, he is Professor at National Taiwan University, Taipei, Taiwan, R.O.C. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY since 1996, as Associate Editor of the IEEE TRANSACTIONS ON VLSI SYSTEMS since 1999, and as Associate Editor of IEEE TRANSACTIONS CIRCUITS AND SYSTEMS II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of VLSI Signal Processing Systems. He is also the Associate Editor of the PROCEEDINGS OF THE IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001–2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.     

Throughput Scalability of Wireless Hybrid Networks over a Random Geometric Graph

In this paper, we consider the transport capacity of ad hoc networks with a random flat topology under the present support of an infinite capacity infrastructure network. Such a network architecture allows ad hoc nodes to communicate with each other by purely using the remaining ad hoc nodes as their relays. In addition, ad hoc nodes can also utilize the existing infrastructure fully or partially by reaching any access point (or gateway) of the infrastructure network in a single or multi-hop fashion. Using the same tools as in [9], we show that the per source node capacity of Θ(W/log(N)) can be achieved in a random network scenario with the following assumptions: (i) The number of ad hoc nodes per access point is bounded above, (ii) each wireless node, including the access points, is able to transmit at W bits/sec using a fixed transmission range, and (iii) N ad hoc nodes, excluding the access points, constitute a connected topology graph. This is a significant improvement over the capacity of random ad hoc networks with no infrastructure support which is found as in [9]. We also show that even when less stringent requirements are imposed on topology connectivity, a per source node capacity figure that is arbitrarily close to Θ(1) cannot be obtained. Nevertheless, under these weak conditions, we can further improve per node throughput significantly. We also provide a limited extension on our results when the number of ad hoc nodes per access point is not bounded.Ulaş C. Kozat was born in 1975, in Adana, Turkey. He received his B.Sc. degree in Electrical and Electronics Engineering from Bilkent University, Ankara, Turkey and his M.Sc. in Electrical Engineering from The George Washington University, Washington D.C. in 1997 and 1999 respectively. He has received his Ph.D. degree in May 2004 from the Department of Electrical and Computer Engineering at University of Maryland, College Park. He has conducted research under the Institute for Systems Research (ISR) and Center for Hybrid and Satellite Networks (CSHCN) at the same university. He worked at HRL Laboratories and Telcordia Technologies Applied Research as a research intern. His current research interests primarily focus on wireless and hybrid networks that span multiple communication layers and networking technologies. Mathematical modelling, resource discovery and allocation, vertical integration of wireless systems and communication layers, performance analysis, architecture and protocol development are the main emphasis of his work. E-mail: kozat@isr.umd.eduLeandros Tassiulas (S′89, M′91) was born in 1965, in Katerini, Greece. He obtained the Diploma in Electrical Engineering from the Aristotelian University of Thessaloniki, Thessaloniki, Greece in 1987, and the M.S. and Ph.D. degrees in Electrical Engineering from the University of Maryland, College Park in 1989 and 1991 respectively.He is Professor in the Dept. of Computer and Telecommunications Engineering, University of Thessaly, Greece and Research Professor in the Dept. of Electrical and Computer Eng and the Institute for Systems Research, University of Maryland College Park since 2001. He has held positions as Assistant Professor at Polytechnic University New York (1991–95), Assistant and Associate Professor University of Maryland College Park (1995–2001) and Professor University of Ioannina Greece (1999–2001).His research interests are in the field of computer and communication networks with emphasis on fundamental mathematical models, architectures and protocols of wireless systems, sensor networks, high-speed internet and satellite communications.Dr. Tassiulas received a National Science Foundation (NSF) Research Initiation Award in 1992, an NSF CAREER Award in 1995 an Office of Naval Research, Young Investigator Award in 1997 and a Bodosaki Foundation award in 1999 and the INFOCOM′94 best paper award. E-mail: leandros@isr.umd.edu     

Design and Performance of 155 Mbps Clock/Data Recovery Circuits on Heavy Loaded PLDs

This paper discusses the design and performance of all-digital clock and data recovery mechanisms integrated in low-cost PLDs. Two designs have been explored and analyzed, using data sampling systems with phase detection and decision logic to select either the most appropriate sample as the recovered data or the most appropriate phase as the recovered clock. These mechanisms have been implemented in low cost PLDs from two major manufacturers. These PLDs have been further heavily loaded with typical communications functions, and the performance of the clock/data recovery circuits has been analyzed. The results show that different architectures behave differently, and that internal noise can significantly impair the performance of the circuit for high operating frequencies. This poses large difficulties to the re-usage of these blocks as generic virtual components. Nevertheless their overall performance typically exceeds regular telecommunications requirements.Rui L. Aguiar concluded his Licenciatura, M.Sc. and his PhD at the University of Aveiro, Portugal, in the years of 1990, 1995 and 2001 respectively. He is currently a professor at the Universidade de Aveiro and a researcher at Instituto de Telecomunicações. He has published over 100 papers in national and international Journals and conferences in electronics and telecommunications systems and networks. He has been involved in several national and European projects and has been active in the technical committee of several conferences. His current main interests lie in communication circuits and systems, focusing especially in high complexity and strict timings problems.Mónica Figueiredo received the Licenciatura degree in Electrical Engineering from University of Coimbra, Portugal, and the M.Sc. degree in Electronics and Telecommunications Engineering from University of Aveiro, Portugal, in 1999 and 2003, respectively. Since 1999, she is an Assistant Lecturer in the Department of Electrical Engineering, Instituto Politécnico de Leiria, Portugal and a researcher at Instituto de Telecomunicações. Her research interests include PLL, DLL and synchronization systems.     

An On-Chip Spectrum Analyzer for Analog Built-In Testing

This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses a digital frequency synthesizer and a simple signal generator synchronized with a switched capacitor bandpass filter. A general methodology for the use of this structure in the functional verification of a DUT is also provided. The circuit-level design and experimental results of an integrated prototype in standard CMOS 0.5 m technology are presented to demonstrate the feasibility of the proposed BIT technique.Marcia G. Mendez-Rivera was born in Irapuato, Mexico in 1972. She received the Communications and Electronics Engineering Degree from the Universidad de Guanajuato, Guanajuato, Mexico. in 1996, the M.Sc. degree from the Instituto Nacional de Astrofisica, Optica y Electronica (INAOE), Puebla, Mexico in 1998 and the M.Sc. from Texas A&M University, College Station in 2002. Her research interest is in the design and fabrication of analog and mixed-signal circuits.Alberto Valdes-Garcia born in 1978, grew up in San Mateo Atenco, Mexico. He received the B.S. in Electronic Systems Engineering degree from the Monterrey Institute of Technology (ITESM), Campus Toluca, Mexico in 1999 (with honors as the best score from all majors). Since the fall of 2000 he has been working towards the Ph.D. degree at Analog and Mixed-Signal Center (AMSC), Texas A&M University. During the spring and summer of 2000 he was a Design Engineer with Motorola Broadband Communications Sector. In the summer of 2002 he was with the Read Channel Design Group at Agere Systems where he investigated wide tuning range GHz LC VCOs for mass storage applications. During the summer of 2004 he was with the Mixed-Signal Communications IC Design Group at the IBM T. J. Watson Research Center, where worked on design and analysis of SiGe power amplifiers for millimeter wave radios. Since the fall of 2001 he has been a Semiconductor Research Corporation (SRC) research assistant at the AMSC working on the development of analog built-in testing techniques. Since the fall of 2000, Alberto has been the recipient of a scholarship from the Mexican National Council for Science and Technology (CONACYT). He represented Mexico in the 1994 Odyssey of the Mind World Creativity Contest and in the 1997 International Exposition for Young Scientists. His present research interests include built-in testing implementations for analog and RF circuits, system level design for wireless receivers and RF circuit design for UltraWideBand (UWB) communications.Jose Silva-Martinez was born in Tecamachalco, Puebla, México. He received the B.S. degree in electronics from the Universidad Autónoma de Puebla, México, in 1979, the M.Sc. degree from the Instituto Nacional de Astrofísica Optica y Electrónica (INAOE), Puebla, México, in 1981, and the Ph.D. degree from the Katholieke Univesiteit Leuven, Leuven Belgium in 1992. From 1981 to 1983, he was with the Electrical Engineering Department, INAOE, where he was involved with switched-capacitor circuit design. In 1983, he joined the Department of Electrical Engineering, Universidad Autonoma de Puebla, where he remained until 1993; He was a co-founder of the graduate program on Opto-Electronics in 1992. From 1985 to 1986, he was a Visiting Scholar in the Electrical Engineering Department, Texas A&M University. In 1993, he re-joined the Electronics Department, INAOE, and from May 1995 to December 1998, was the Head of the Electronics Department; He was a co-founder of the Ph.D. program on Electronics in 1993. He is currently with the Department of Electrical Engineering (Analog and Mixed Signal Center) Texas A&M University, at College Station, where He holds the position of Associate Professor. His current field of research is in the design and fabrication of integrated circuits for communication and biomedical application. Dr. Silva-Martinez has served as IEEE CASS Vice President Region-9 (1997–1998), and as Associate Editor for IEEE Transactions on Circuits and Systems part-II from 1997–1998 and May 2002–December 2003. Since January 2004 is serving as Associate Editor of IEEE TCAS Part-I. He was the main organizer of the 1998 and 1999 International IEEE-CAS Tour in region 9, and Chairman of the International Workshop on Mixed-Mode IC Design and Applications (1997–1999). He is the inaugural holder of the TI Professorship-I in Analog Engineering, Texas A&M University. He was a co-recipient of the 1990 European Solid-State Circuits Conference Best Paper Award.Edgar Sánchez-Sinencio was born in Mexico City, Mexico. He received the degree in communications and electronic engineering (Professional degree) from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree from Stanford University, CA, and the Ph.D. degree from the University of Illinois at Urbana-Champaign, in 1966, 1970, and 1973, respectively. In 1974 he held an industrial Post-Doctoral position with the Central Research Laboratories, Nippon Electric Company, Ltd., Kawasaki, Japan. From 1976 to 1983 he was the Head of the Department of Electronics at the Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Puebla, Mexico. He was a Visiting Professor in the Department of Electrical Engineering at Texas A&M University, College Station, during the academic years of 1979–1980 and 1983-1984. He is currently the TI J Kilby Chair Professor and Director of the Analog and Mixed-Signal Center at Texas A&M University. He was the General Chairman of the 1983 26th Midwest Symposium on Circuits and Systems. He was an Associate Editor for IEEE Trans. on Circuits and Systems, (1985–1987), and an Associate Editor for the IEEE Trans. on Neural Networks. He is the former Editor-in-Chief of the Transactions on Circuits and Systems II. He is co-author of the book Switched Capacitor Circuits (Van Nostrand-Reinhold 1984), and co-editor of the book Low Voltage/Low-Power Integrated Circuits and Systems (IEEE Press 1999). In November 1995 he was awarded an Honoris Causa Doctorate by the National Institute for Astrophysics, Optics and Electronics, Mexico. The first honorary degree awarded for Microelectronic Circuit Design contributions. He is co-recipient of the 1995 Guillemin-Cauer for his work on Cellular Networks. He is a former IEEE CAS Vice President-Publications. He was also the co-recipient of the 1997 Darlington Award for his work on high-frequency filters He received the Circuits and Systems Society Golden Jubilee Medal in 1999. He was the IEEE Circuits and Systems Society, Representative to the Solid-State Circuits Society (2000–2002). He is presently a member of the IEEE Solid-State Circuits Fellow Award Committee. His present interests are in the area of RF-Communication circuits and analog and mixed-mode circuit design. He is an IEEE Fellow Member since 1992.     

Characteristic Investigation of New Pathological Elements

A characteristic investigation of the new pathological elements (i.e voltage mirror and current mirror) has been presented. Many nullor-mirror equivalences are explored. The circuit cascadability is discussed with nullor and mirror concepts. Also, the conventional inverse network transformation has been extended for applying to the circuits with current mirror output. To demonstrate the use of presented properties, practical examples have been given. The derived circuits have been verified with HSPICE simulation and the simulation results confirm with our theoretical prediction.Hung-Yu Wang was born in Kaohsiung, Taiwan, Republic of China, on January 4, 1969. He received the Ph.D. degree in optical sciences from National Central University, Chung-Li, Taiwan in 2002.Since 1993 he has worked on promoting the prototyping IC implementation of academic researches, and propelling the collaboration of the academia and industries in Chip Implementation Center (CIC), National Science Council of the Republic of China. In 2003 he became a researcher and the deputy director in Division of Chip Implementation Service of CIC. He is currently working on South Region Office of National Chip Implementation Center, National Applied Research Laboratories as a researcher and the department manager. His research interests are in current-mode circuits design, analog IC design and analog IP design.Ching-Ting Lee was born in Taoyuan, Taiwan, R.O.C., on November 1, 1949. He received his B.S. and M.S. in Electrical Engineering Department of the National Cheng-Kung University, Taiwan, in 1972 and 1974, respectively. He received Ph.D. degree in Electrical Engineering Department from the Carnegie-Mellon University, Pittsburgh, PA, in 1982.He worked on Chung Shan Institute of Science and Technology, before he joined the Institute of Optical Sciences, National Central University, Chung-Li, Taiwan, as a Professor in 1990. He works on National Cheng-Kung University as the dean of Electrical Engineering and Computer Science and the professor or the Institute of Microelectronics, Department of Electrical Engineering in 2003. His current research interests include theory, design, and application of guided-wave structures and devices for integrated optics and waveguide lasers. His research activities have also involved in the research concerning semiconductor lasers, photodetectors and high-speed electronic devices, and their associated integration for electrooptical integrated circuits. He received the outstanding Research Professor Fellowship from the National Science Council (NSC), R.O.C. in 2000 and 2002. He also received the Optical Engineering Medal from Optical Engineering Society and Distinguish Electrical Engineering professor award from Chinese Institute of Electrical Engineering Society in 2003.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of Department of Electronic Engineering. His biography is included in the 7th Edition (2003–2004) of Who’s Who in Science and Engineering.His current researches include current-mode circuits design, VLSI design, analog IC design and analog IP design.     

Performance Simulation of a Microwave Micro-Electromechanical System Shunt Switch Using Chatoyant

In this paper we demonstrate the capabilities of our mixed-signal, multi-domain system level simulation tool, Chatoyant, to model and simulate an RF MEMS shunt switch. We verify our mechanical simulations and analysis by comparison to results from commercial simulation packages, ANSYS and CoventorWare. We show that our modeling accuracy and simulation speed are comparable to these commercial tools for specific analysis. We conclude by showing the unique capabilities of a system tool based on a modular hierarchal approach that allows one to model not only the individual components of the system but also the subtle interactions resulting in specific system behaviors.Michael Bails received his B.A. in Economics from the University of Vermont in 1995 and a B.S. in Electrical Engineering from the University of Pittsburgh in 2002 (cum laude). He worked as an undergraduate researcher in optical MEMS for Benchmark Photonics, a Pittsburgh-based start-up company from 2001 to 2002. Mr. Bails is currently pursuing his M.S. in the Department of Electrical and Computer Engineering at the University of Pittsburgh, where he is a recipient of the Rath Fellowship. His interests are in MEMS modeling with an emphasis on statistical process variations. Mr. Bails is a student member of IEEE.José A. Martínez is an Electrical Engineering Ph.D. student at the University of Pittsburgh. He received his MS from the University of Pittsburgh (2000) in Electrical Engineering. He received the BS (magna cum laude) in Electrical Engineering from the Universidad de Oriente (UDO), Venezuela, in 1993. Mr. Martínez was granted the José Feliz Rivas’ medal for high academic achievement by the Venezuelan government (1993), and scholarships by the Venezuelan Fundayacucho Society (1993) and CONICIT-UDO (1994) institution. Since 1997 he has been working in the Optoelectronic computing group at the University of Pittsburgh. His research interests include behavioral simulation, reduction order techniques, modeling of MEMs and OMEMs, CAD, VLSI and computer architecture. Mr. Martínez is a member of IEEE/LEOS, and OSA.Steven P. Levitan is the John A. Jurenko Professor of Computer Engineering in the Department of Electrical and Computer Engineering. He received the B.S. degree from Case Western Reserve University in 1972. From 1972 to 1977 he worked for Xylogic Systems designing hardware for computerized text processing systems. He received his M.S. and Ph.D. in Computer Science from the University of Massachusetts, Amherst. During that time he also worked for Digital Equipment Corporation, and Viewlogic Systems, as a consultant in HDL simulation and synthesis. He was an Assistant Professor from 1984 to 1986 in the Electrical and Computer Engineering Department at the University of Massachusetts. In 1987, Dr. Levitan joined the Electrical Engineering faculty at the University of Pittsburgh where he holds a joint appointment in the Department of Computer Science. He is Past Chair of the ACM Special Interest Group on Design Automation (SIGDA). He was awarded the ACM/SIGDA Distinguished Service Award for over a decade of service to ACM/SIGDA and the EDA Industry in 2002. He is on the technical advisory board for The Technology Collaborative. He is a senior member of the IEEE/Computer Society and a member of the Optical Society of America, the Association for Computing Machinery, and the International Society for Optical Engineering. He is a member of the ACM/IEEE Design Automation Conference Executive Committee.Jason Boles received the B.S. degree in computer engineering from the University of Pittsburgh, Pittsburgh, PA, in 2001, where he is currently pursuing the M.S. degree in electrical engineering. His research interests include hardware acceleration techniques for simulation, system level modeling, computer-aided design (CAD), as well as systems-on-chip design and verification. Mr. Boles is a student member of IEEE.Ilya V. Avdeev is currently with ANSYS, Inc (Canonsburg, PA). He received his B.S. and M.S. degrees both in mechanical engineering from St. Petersburg State Polytechnical University (Russia) in 1997 and 1999 respectively. He received his Ph.D. in mechanical engineering from the University of Pittsburgh in 2003. His dissertation was on modeling strongly-coupled MEMS. He has been an inaugural John Swanson Doctoral Fellow and was awarded numerous scholarships and personal grants during his undergraduate and graduate studies. His research interests include mathematical modeling of coupled-field effects, new finite element techniques and methods, design and simulation of MEMS/NEMS, and acoustics. He is a member of ASME and IEEE.Michael R. Lovell is the Associate Dean for Research and an Associate Professor of Industrial and Mechanical Engineering in the School of Engineering at the University of Pittsburgh. Dr. Lovell received his PhD in Mechanical Engineering in 1994 from the University of Pittsburgh. He joined the Mechanical Engineering Department at Pittsburgh in January of 2000 after three years of service as an Assistant Professor at the University of Kentucky and four years of service as a senior development engineer at ANSYS Inc. Professor Lovell is a W. K. Whiteford Endowed Faculty Fellow, has served as the Executive Director of the Swanson Center for Product Innovation since May of 2000, and has been the Director of the Swanson Institute for Technical Excellence since September of 2002. Among his accomplishments, Professor Lovell is a recipient of the NSF CAREER award (1997), the SME Outstanding Young Manufacturing Engineer Award (1999), and won the FAG Outstanding International Publication on Bearings (1998). Dr. Lovell’s primary research interests are in the areas of tribology, advanced computation, and micro and nano systems.Donald M. Chiarulli, Professor of Computer Science. Dr. Chiarulli received his BS degree (Physics, 1976) from Louisiana State University, MSc (Computer Science, 1979) from Virginia Polytechnic Institute, and PhD (Computer Science, 1986) from Louisiana State University. He was an Instructor/Research Associate at LSU from 1979 to 1986, and has been at the University of Pittsburgh since 1986. Dr. Chiarulli’s research interests are in photonic and optoelectronic computing systems architecture. Dr Chiarulli’s research has been recognized with Best Paper Awards at the International Conference on Neural Networks (ICNN-98) and the Design Automation Conference (DAC-00). He is also the co-inventor on three patents relating to computing systems and optoelectronics. He has served on the technical program committees of numerous conferences for both research and education issues. Dr. Chiarulli serves on the editorial board of the Journal of Parallel and Distributed Systems and is a member of the IEEE. SPIE, and OSA.     

Low Cost BIST for Static and Dynamic Testing of ADCs

This paper presents a low cost test method for the static and dynamic characterization of analog-to-digital converters. The method is suitable for implementation in a SoC environment, as a built-in self test (BIST) solution. In the proposed approach, noise is used as the test signal. Theory of operation and practical results demonstrating the effectiveness of the method for INL, DNL, THD and SINAD characterization are presented. The BIST surface overhead caused by the noise generator is only 7.4% of the ADC total area. The reduced number of data samples required allows a reduction of about 7.5× in test time, in comparison to the histogram method.Maria da Gloria Cataldi Flores was born in Santa Maria, Brazil, in 1978. She received the electrical engineering degree in 2000 from Universidade Federal de Santa Maria (UFSM) and the M.S. degree engineering in 2003 from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then, she has been working as a design engineer in an EAS Supply brazilian company. Her main research interests include mixed-signal and analog testing and digital signal processing.Marcelo Negreiros was born in Porto Alegre, Brazil, in 1969. He received the electrical engineering degree in 1992 and the M.S. degree engineering in 1994, both from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then he was been working as an associate researcher in the Signal Processing Lab. (LaPSI) of the Electrical Engineering Department at UFRGS. Since 2000 he also works toward a Ph.D. in Computer Science from UFRGS. His main research interests include mixed-signal and analog testing and digital signal processing.Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the M.Sc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Ph.D. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design and Digital Signal processing disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in Embedded Systems, Digital Signal Processing, and VLSI Design. His primary research interests include mixed-signal design, digital signal processing, mixed-signal and analog testing, and fast system prototyping. He has published more than 90 technical papers in those topics and is the author of the book Digital Systems Design and Prototyping (in portuguese).Altamiro A Susin was born in Vacaria-RS, Brazil, in 1945. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1972 and 1977, respectively. Since 1968 he worked in the start up of Computer Centers of two local Universities. In 1981 he got his Dr. Eng degree from Institut National Polytechnique de Grenoble-France. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible by courses in VLSI Architecture and is also thesis director. His main research interests are Integrated Circuit Architecture, Embedded Systems, Signal Processing with more than 50 technical papers published in those domains. He is/was responsible for several R&D projects either funded with public and/or industry resources.Felipe Ricardo Clayton received the B.S. degree in Electrical Engineering from State University of Campinas (UNICAMP), Brazil, in 1986. He worked at CPqD (Brazilian PTT R&D Center) till 1996 designing analog and mixed signal circuits for telecom and automotive applications. From 1997 to the second half of 1998, he worked at Instituto Superior Técnico (IST), Lisbon, Portugal, under the guidance of Prof. Carlos Azeredo Leme on development of CMOS RF circuits. Since October 1998 he had worked for Motorola SPS. Now he is head of the Power Managment Group at Freescale.Cristiano Benevento received his B.S. degree in Electrical Engineering from Universidade Estadual de Campinas (Unicamp), Brazil, in 1997. He worked at Motorola Cellular Infrastructure Group until August 2000 as a Systems Engineer. He joined Motorola Semiconductor Product Sector in August 2000 as IC Designer for Power Management Group and is now at Freescale.     

Algorithmic Aspects of the Time Synchronization Problem in Large-Scale Sensor Networks

We study the time synchronization problem for large-scale wireless sensor networks in the high-density regime. Our interest in this problem arises from a sensor networking application, where a large number of power-constrained radio transmitters coordinate their access to a Gaussian multiple access channel to cooperate in generating a waveform stronger than any individual node would be able to generate. In a companion paper to this one, we study theoretical aspects of a time synchronization mechanism that is optimal in the limit of asymptotically high network densities. In this work we summarize those results, and explore practical implementation issues of that mechanism in the context of networks with large, but finite, numbers of nodes. Through simulations, we find that the synchronization mechanism performs very well for finite (and relatively small) networks, maintaining tight clock synchronization indefinitely.Work supported by the National Science Foundation, under awards CCR- 0238271 (CAREER), CCR-0330059, and ANR-0325556. An-swol Hu was born in Mt. Kisco, New York on February 24, 1980. He received his B.S. in Electrical Engineering from Stanford University in 2002. Currently he is a Ph.D. candidate in the School of Electrical and Computer Engineering at Cornell University. His research interests include information theory and statistical signal processing, with applications to sensor networks. Sergio D. Servetto was born in Argentina, on January 18, 1968. He received a Licenciatura en Informática from Universidad Nacional de La Plata (UNLP, Argentina) in 1992, and the M.Sc. degree in Electrical Engineering and the Ph.D. degree in Computer Science from the University of Illinois at Urbana-Champaign (UIUC), in 1996 and 1999. From 1991 to 1994 he worked as a programmer for IBM Argentina. From 1994 to 1999 he was a Graduate Research Assistant at UIUC. From 1999 to 2001 he worked at the Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland. Since Fall 2001, he has been an Assistant Professor in the School of Electrical and Computer Engineering, Cornell University. He is also a member of the field of Applied Mathematics at Cornell. His research interests are centered around information theoretic aspects of networked systems, with a current emphasis on problems that arise in the context of large-scale sensor networks.Sergio was the recipient of the 1998 Ray Ozzie Fellowship, given to “outstanding graduate students in Computer Science”, and of the 1999 David J. Kuck Outstanding Thesis Award, for the best doctoral dissertation of the year, both from the Dept. of Computer Science at UIUC. He is also the recipient of a 2003 NSF CAREER Award. He has served on the technical program committee of various conferences (IEEE Infocom, Globecom, ICC, SECON; ACM MobiCom, MobiHoc, SenSys, WSNA). He will present a tutorial at ACM MobiHoc 2004, on the topic of “Efficient Architectures for Information Transport in Wireless Sensor Networks”. He is currently writing a book, tentatively entitled “Digital Communications over Packet-Switched Networks”, to be published by Kluwer.This revised version was published online in August 2005 with a corrected cover date.     

A Novel CMOS Realization of the Differential Input Balanced Output Current Operational Amplifier and its Applications

In this paper a new realization of the differential input balanced output current opamp is proposed, operating with ±1.5 V supplies. Its architecture is based on the use of current inverters to sense the input currents while providing a very low input resistance, 23 Ω. The opamp provides a maximum output swing of 700 μA, with an input offset current of 3.5 nA. The differential gain achieved is 65.5 dB, and the differential structure adopted in the design provided a high CMRR, 89.5 dB, the proposed circuit is compared to other realizations with single and differential inputs. The applications of the current opamp are exploited some new applications are presented such as: MOSFET-C integrators, full non-linearity cancellation for MOS transistors, and finally a digitally tuned current-mode variable gain amplifier, which has a gain tuning range of 25 dB with a 0.05 dB step.Ahmed M. Soliman was born in Cairo Egypt, on November 22, 1943. He received the B.Sc. degree with honors from Cairo University, Cairo, Egypt, in 1964, the M.S. and Ph.D. degrees from the University of Pittsburgh, Pittsburgh, PA, U.S.A., in 1967 and 1970, respectively, all in Electrical Engineering.He is currently Professor and Chairman Electronics and Communications Engineering Department, Cairo University, Egypt. From 1985–1987, Dr. Soliman served as Professor and Chairman of the Electrical Engineering Department, United Arab Emirates University, and from 1987–1991 he was the Associate Dean of Engineering at the same University. He has held visiting academic appointments at San Francisco State University, Florida Atlantic University and the American University in Cairo.He was a visiting scholar at Bochum University, Germany (Summer, 1985) and with the Technical University of Wien, Austria (Summer, 1987).In 1977, Dr. Soliman was decorated with the First Class Science Medal, from the President of Egypt, for his services to the field of Engineering and Engineering Education. Dr. Soliman is a member of the Editorial Board of Analog Integrated Circuits and Signal Processing. Presently Dr. Soliman is Associate Editor of the IEEE Transactions on Circuits and Systems I (Analog Circuits and Filters).     

VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters

In this paper, a VLSI architecture for lifting-based shape-adaptive discrete wavelet transform (SA-DWT) with odd-symmetric filters is proposed. The proposed architecture is comprised of a stage-based boundary extension strategy and the shape-adaptive boundary handling units. The former could reduce the complexity of multiplexers that are introduced to solve the shape-adaptive boundary extension. The latter consists of two multiplexers and can solve the shape-adaptive boundary extension locally without any additional register. Two case studies are presented, including the JPEG 2000 default (9, 7) filter and MPEG-4 default (9, 3) filter. According to comparison results with previous architectures, the efficiency of the proposed architectures is proven.Chao-Tsung Huang was born in Kaohsiung, Taiwan in 1979. He received the B.S. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan in 2001. He is currently working toward the Ph.D. degree at the Graduate Institute of Electronics Engineering, National Taiwan University. His major research interests include VLSI design and implementation for 1-D, 2-D, and 3-D Discrete Wavelet Transform. cthuang@video.ee.ntu.edu.twPo-Chih Tseng was born in Tao-Yuan, Taiwan in 1977. He received the B.S. degree in Electrical and Control Engineering from National Chiao Tung University in 1999 and the M.S. degree in Electrical Engineering from National Taiwan University in 2001. He currently is pursuing the Ph.D. degree at the Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University. His research interests include VLSI design and implementation for signal processing systems, energy-efficient reconfigurable computing for multimedia systems, and power-aware image and video coding systems. pctseng@video.ee.ntu.edu.twLiang-Gee Chen (S84–M86–SM94–F01) received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C., in 1979, 1981, and 1986, respectively.In 1988, he joined the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C. During 1993–1994, he was a Visiting Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department of Electrical Engineering, University of Washington, Seattle. Currently, he is Professor at National Taiwan University, Taipei, Taiwan, R.O.C. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY since 1996, as Associate Editor of the IEEE TRANSACTIONS ON VLSI SYSTEMS since 1999, and as Associate Editor of IEEE TRANSACTIONS CIRCUITS AND SYSTEMS II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the PROCEEDINGS OF THE IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001–2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi. lgchen@video.ee.ntu.edu.tw     

Programmable SC Biquad Using One Single Capacitor Bank

This paper presents a new technique for programming SC circuits using a single time-multiplexed capacitor bank, achieving a significant reduction in capacitance area. Simulation and experimental results obtained with a programmable biquad low pass filter show the validity of the proposed method.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

A New CMOS Current-Mode Multiplexer for l0 Gbps Serial Links

This paper presents an in-depth study of the pros and cons of voltage-mode multiplexers for Gbps serial links and exploits the advantages of multiplexing in current domain. In addition, it proposes a new fully differential CMOS current-mode multiplexer where a high multiplexing speed is achieved by multiplexing at a low-impedance node. Multiplexing speed is further improved by inductive shunt peaking with active inductors. The differential configuration of the multiplexer minimizes the effect of common-mode disturbances, particularly those coupled from the power and ground rails. The flow of the output currents in the opposite directions minimizes the effect of electro-magnetic interference from channels, making the multiplexer particularly attractive for high-speed data transmission over long interconnects and printed-circuit-board (PCB) traces. The proposed multiplexer draws a constant current from the supply voltage, thereby minimizing both switching noise and noise injected to the substrate. A fully differential CMOS current-mode 8-to-l multiplexer has been implemented in TSMC’s 1.8 V 0.18 μm CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3.3v device models. Simulation results demonstrate that the multiplexer offers sufficiently large eye-opening when multiplexed at 10 Gbps.Jean Jiang received the B.Eng. degree in Electrical Engineering from Wuhan University of Technology, Wuhan, China in 1995. From 1999 to 2001, she worked for Ericsson Global IT Services where she was a technical staff to maintain computer networks. Since 2002, she has been a research assistant with the System-on-Chip research lab of Ryerson University. She is currently a M.A.Sc candidate under the supervision of Dr. Fei Yuan in the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Canada. Her research interests are in analog CMOS circuit design for high-speed data communications. She was awarded the Ontario Graduate Scholarship (OGS) in 2003–2005 for academic excellence.Fei Yuan received the B.Eng. degree in electrical engineering from Shandong University, Jinan, China in 1985, the MASc. degree in chemical engineering and PhD. degree in electrical engineering from University of Waterloo, Waterloo, Ontario, Canada in 1995 and 1999, respectively.During 1985–1989, he was a Lecturer in the Department of Electrical Engineering, Changzhou Institute of Technology, Jiangsu, China. In 1989 he was a Visiting Professor at Humber College of Applied Arts and Technology, Toronto, Canada. During 1989–1994, he worked for Paton Controls Limited, Sarnia, Ontario, Canada as a Controls Engineer. Since July 1999 he has been with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada, where he is currently an Associate Professor and the Associate Chair for Undergraduate Studies and Faculty Affairs. He is the co-author of the book “Computer Methods for Analysis of Mixed-Mode Switching Circuits” (Kluwer Academic Publishers, 2004, with Ajoy Opal). Dr. Yuan received an “Excellence of Teaching” award from Changzhou Institute of Technology in 1988, a post-graduate scholarship from Natural Science and Engineering Research Council (NSERC) of Canada during 1997–1998. He is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada.     

Design of Square-Root Domain Filters

In this paper, a square-root domain band-pass filter and biquad filter which are based on the MOSFET square law are proposed. Both of the square-root domain filters operated at 2.5 V supply voltage are constituted by current mirrors, current-mode square-root circuits and capacitors. The circuits presented have been simulated and fabricated using 0.25 m CMOS process. Both of simulation and measured results which are in good agreement indicate that the center frequency f₀ is not only attainable at megahertz frequencies but also tunable electronically. The proposed circuits have the merits of high frequency operation, tuneability, low power supply voltage operation, low third order intermodulation distortion and low total harmonic distortion.Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C.Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000.His current researches include current-mode circuits design, analog IC design and VLSI circuit design.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design.Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively.Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang, Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordón, F. Herrera, and L. Magdalena, Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits {&} Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002.