Base coupled differential amplifier: a new topology for RF integrated LNA

A new topology of bipolar low noise amplifier (LNA) for RF applications, named base coupled differential (BCD), is presented. The proposed approach is compared by simulation against most classical topologies. The BCD configuration has the key advantage to join an integrated matching on a single‐ended input with a differential output. This is done by using down‐bond wiring, so that no integrated inductors are needed. The main advantages of this new topology are a drastic area reduction and an increased linearity range (or a reduced biasing current with the same linearity) together with a noise figure (NF) and voltage supply reduction. Particularly, the BCD LNA presented in this paper has been designed for 2.44GHz frequency operation. It is characterized by a NF of 1.93dB, a voltage gain (Av) of 19.5dB, an input impedance of 50Ωa third Input‐referred Intercept Point (IIP3) of ‐7.25dBm and a dissipated power (PD) equal to 19mW. Copyright © 2003 John Wiley & Sons, Ltd.     

低噪声放大器的集成设计及测试

根据低噪声放大器的设计原理、结合南京电子器件研究所提供的器件模型,设计了S波段单片低噪声放大器,并在该所的砷化镓(GaAs)工艺线上流片生产,最后进行了测试.在2.2～2.8 GHz,增益大于21 dB,噪声系数小于1.95 dB,输入、输出驻波比小于1.45,在2.5 GHz处1 dB压缩输出功率大于11 dBm.测试结果表明,该电路易于集成、性能可靠,但驻波比还有待改善.     

0.03～4.5GHz超宽带低噪声放大器设计与实现

采用负反馈和均衡器结构,选用Avago公司生产的增强型高电子迁移率晶体管ATF55143,利用ADS软件设计、仿真和优化,最终实现了一款覆盖0.03~4.5 GHz频段的低噪声放大器,该模块中的低噪声放大器使用分立元件搭建,匹配电路调试灵活,满足了模块对输入输出驻波的高要求。其增益大于25 d B,平坦度小于等于±0.9 d B,噪声系数小于1.2 d B,输入输出驻波比小于1.75。该放大器模块体积小巧,成本较低,调试灵活,可望在通讯领域得到广泛应用。     

Smith圆图辅助设计低噪声宽频带放大器

接收微弱射频信号需要研究低噪声放大器的设计,文中在分析传统低噪声放大器设计的基础上引入对放大器匹配电路品质因数,扩宽放大器的频带;通过加入电流负反馈及在负载端并联电阻,提高放大器的稳定性、降低放大器驻波比,得到宽频带低噪声放大器的设计方法.仿真结果表明设计的放大器工作绝对稳定.     

A novel low‐power receiver topology for RF and microwave applications

A novel low‐power receiver topology for radio‐frequency and microwave applications is presented. The proposed solution exploits a simple connection between the low‐noise amplifier and the subsequent mixer, which is realized by means of a high‐value resistor and a current mirror, achieving low noise and high linearity performance with an extremely low power consumption. The criteria for its optimal design are derived in order to accomplish the main trade‐offs among noise figure (NF), linearity, and current consumption performance. As a case of study, the new topology has been designed in the case of I/Q direct conversion receiver for IEEE 802.15.4 standard (ZigBee) applications at 2.45 GHz. The receiver exhibits a NF of 8.7 dB, 50Ω input impedance, a voltage gain of 26 dB, an input‐referred third‐order intercept point of ?13 dBm, and a power consumption of 8.6 mW, which represent one of the best performance trade‐offs obtained in the literature. Copyright © 2008 John Wiley & Sons, Ltd.     

Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption

In this paper we extend the figures of merit for class AB symmetrical OTAs to the fully differential case and compare topologies from the literature. This analysis shows that the power consumption of the CMFB can have a significant role in determining the efficiency of the OTA, but on the other hand a CMFB is needed both to set the desired output common mode voltage and to improve the CMRR. We propose the complementary triode CMFB, i.e. a triode CMFB applied both at the NMOS and PMOS current mirrors, as suitable for class AB symmetrical OTAs, and show some case studies in deep submicron CMOS technology to assess the effectiveness of the proposed solution. Copyright © 2015 John Wiley & Sons, Ltd.     

Figures‐of‐merit genetic extraction for InGaAs lasers,SiGe low‐noise amplifiers,and ZnSe/Ge/GaAs HBTs

In this paper, we have successfully developed an intellectual parameter‐extraction methodology on the basis of a genetic algorithm (GA), involving the efficient search‐space separation and local‐minima‐convergence prevention schemes. Via an evolutionary simulation tool complemented with appropriate analytic equations, the enhanced approach has been applied to determine the significant figures‐of‐merit (FoMs), including internal quantum efficiency (η_i) as well as transparency current density (J_tr) of semiconductor lasers, minimum noise figure (NF_min) as well as associated available gain (G_A,assoc) of low‐noise amplifiers (LNAs), and DC as well as AC characteristics of heterojunction bipolar transistors (HBTs). For the first time, demonstrated FoM‐extraction results, which coincide well with the actually measured data, for state‐of‐the‐art InGaAs quantum‐well lasers, advanced SiGe LNAs, and abrupt ZnSe/Ge/GaAs HBTs are simultaneously presented to validate this multi‐parameter analysis and robust optimization. Copyright © 2011 John Wiley & Sons, Ltd.     

Multiple output differential OTA with linearizing bulk‐driven active‐error feedback loop for continuous‐time filter applications

A CMOS circuit realization of a highly linear multiple‐output differential operational transconductance amplifier (OTA) has been proposed. The presented approach exploits a differential pair as an input stage with both the gate and the bulk terminals as signal ports. For the proposed OTA, improved linearity is obtained by means of the active‐error feedback loop operating at the bulk terminals of the input stage. SPICE simulations of the OTA show that, for 0.35 µm AMS process, total harmonic distortion at 1.36Vpp is less than 1% with dynamic range equal to 60.1 dB at power consumption of 276 μW from 3.3 V supply. As an example, both single output and dual differential OTAs are used to design third‐order elliptic low‐pass filters. The cut‐off frequency of the filters is 1 MHz. The power consumption of the OTA‐C filter utilizing the dual output differential OTA is reduced to 1.24 mW in comparison to 2.2 mW consumed by the single output differential OTA‐C filter counterpart. Copyright © 2014 John Wiley & Sons, Ltd.     

Quadrature VCOs based on direct second harmonic locking: Theoretical analysis and experimental validation

We propose a theoretical analysis of the class of quadrature VCOs (QVCOs) based on two LC‐oscillators directly coupled by means of the second harmonic. The analysis provides the conditions for the existence and stability of steady‐state quadrature oscillations and a simplified model for the phase noise (PN) transfer function with respect to a noise source in parallel to the tank. We show that the figure of merit defined as the product between PN and current equals that of the single VCO, confirming that quadrature generation is achieved by this class of QVCO without degrading that figure of merit. An analytical model for the phase quadrature error due to tank mismatches is also proposed. The validity of all analytical models is discussed against numerical simulations. A practical implementation at 3.26 GHz with ±20% tuning range in a 0.13µm CMOS technology is also presented, confirming the main theoretical findings. Copyright © 2009 John Wiley & Sons, Ltd.     

一种新型海洋电场传感器的研究与设计

提出一种用于测量海洋电场信号的低噪声电场传感器,传感器包含一对钽电极和一块低噪声斩波放大器.钽电极通过将钽粉压制、烧结并经过阳极氧化制成.引入电化学阻抗谱以建立钽电极与海水两相界面的等效电路模型,建立斩波放大器的等效噪声电路并分析.测试结果表明,所设计的斩波放大器的等效输入电压噪声为0.42 nV/√Hz,钽电极的自噪声为0.67 nV/√Hz,传感器总体噪声为0.83 nV/√Hz.所设计传感器可用于微弱海洋电场信号的测量.