An FFT Performance Model for Optimizing General-Purpose Processor Architecture |
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| Authors: | Ling Li Yun-Ji Chen Dao-Fu Liu Cheng Qian Wei-Wu Hu |
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| Affiliation: | (1) Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China;(2) Loongson Technologies Corporation Limited, Beijing, 100190, China |
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| Abstract: | General-purpose processor (GPP) is an important platform for fast Fourier transform (FFT), due to its flexibility, reliability
and practicality. FFT is a representative application intensive in both computation and memory access, optimizing the FFT
performance of a GPP also benefits the performances of many other applications. To facilitate the analysis of FFT, this paper
proposes a theoretical model of the FFT processing. The model gives out a tight lower bound of the runtime of FFT on a GPP,
and guides the architecture optimization for GPP as well. Based on the model, two theorems on optimization of architecture
parameters are deduced, which refer to the lower bounds of register number and memory bandwidth. Experimental results on different
processor architectures (including Intel Core i7 and Godson-3B) validate the performance model. |
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