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基于准浮栅技术的超低压运算放大器

杨银堂;任乐宁;付俊兴   

  1. (西安电子科技大学 微电子研究所,陕西 西安 710071)

  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2005-08-20 发布日期:2005-08-20

Ultra-low voltage operational amplifier based on quasi-floating gate transistors

YANG Yin-tang;REN Le-ning;FU Jun-xing

  

  1. (Research Inst. of Microelectronics, Xidian Univ., Xi′an 710071, China)
  • Received:1900-01-01 Revised:1900-01-01 Online:2005-08-20 Published:2005-08-20

摘要: 分析了准浮栅晶体管的工作原理、电气特性及其等效电路,基于准浮栅PMOS晶体管,设计了超低压低功耗运算放大器.基于台积电的0.25μm CMOS工艺,利用Hspice对所设计的运放进行了模拟仿真.仿真结果显示,在0.8V的单源电压下,运算放大器的最大开环增益为76.5dB,相位裕度为62°,单位增益带宽为2.98MHz,功耗仅为9.45μW.

关键词: 准浮栅, 超低压, 运算放大器, CMOS

Abstract: The fundamental principle of quasi-floating gate transistors, along with the electrical characteristics and equivalent circuits, are discussed. An ultra-low voltage operational amplifier is proposed using the PMOS quasi-floating gate transistors. Based on the TSMC 0.25μm CMOS process, the whole circuit is simulated by using the Hspice simulator. The simulation result shows that, with a single power supply of 0.8V, the maximal open-loop gain of the amplifier is 76.5dB, the phase margin is 62°, the unit gain band width is 2.98MHz and the power dissipation is only 9.45μW.

Key words: quasi-floating gate, ultra-low voltage, operational amplifier, CMOS

中图分类号: 

  • TN402